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Searched refs:mce_command_handler (Results 1 – 6 of 6) sorted by relevance

/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_psci_handlers.c124 (void)mce_command_handler((uint64_t)MCE_CMD_ENTER_CSTATE, (uint64_t)val, in tegra_soc_pwr_domain_suspend()
154 val = (uint32_t)mce_command_handler( in tegra_soc_pwr_domain_suspend()
162 (void)mce_command_handler((uint64_t)MCE_CMD_ENTER_CSTATE, in tegra_soc_pwr_domain_suspend()
214 ret = mce_command_handler((uint64_t)MCE_CMD_IS_CCX_ALLOWED, in tegra_get_afflvl1_pwr_state()
233 ret = mce_command_handler((uint64_t)MCE_CMD_IS_CCX_ALLOWED, in tegra_get_afflvl1_pwr_state()
364 (void)mce_command_handler((uint64_t)MCE_CMD_ONLINE_CORE, target_cpu, 0U, 0U); in tegra_soc_pwr_domain_on()
448 (void)mce_command_handler((uint64_t)MCE_CMD_ENTER_CSTATE, in tegra_soc_pwr_domain_off()
Dplat_sip_calls.c115 mce_ret = mce_command_handler(local_smc_fid, local_x1, local_x2, local_x3); in plat_sip_handler()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/
Dplat_psci_handlers.c106 (void)mce_command_handler((uint64_t)MCE_CMD_ENTER_CSTATE, in tegra_soc_cpu_standby()
159 val = (uint32_t)mce_command_handler( in tegra_soc_pwr_domain_suspend()
167 ret = mce_command_handler( in tegra_soc_pwr_domain_suspend()
336 ret = mce_command_handler((uint64_t)MCE_CMD_ONLINE_CORE, target_cpu, 0U, 0U); in tegra_soc_pwr_domain_on()
479 ret = mce_command_handler((uint64_t)MCE_CMD_ENTER_CSTATE, in tegra_soc_pwr_domain_off()
/external/arm-trusted-firmware/plat/nvidia/tegra/include/drivers/
Dmce.h67 int mce_command_handler(uint64_t cmd, uint64_t arg0, uint64_t arg1,
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/drivers/mce/
Dmce.c41 int32_t mce_command_handler(uint64_t cmd, uint64_t arg0, uint64_t arg1, in mce_command_handler() function
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/mce/
Dmce.c156 int32_t mce_command_handler(uint64_t cmd, uint64_t arg0, uint64_t arg1, in mce_command_handler() function