| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_state_shaders.c | 45 void si_get_ir_cache_key(struct si_shader_selector *sel, bool ngg, bool es, in si_get_ir_cache_key() argument
69 if (ngg) in si_get_ir_cache_key()
73 if (si_get_wave_size(sel->screen, sel->info.stage, ngg, es, false, false) == 32) in si_get_ir_cache_key()
947 shader->ctx_reg.ngg.ge_max_output_per_subgroup); in gfx10_emit_shader_ngg_tail()
949 shader->ctx_reg.ngg.ge_ngg_subgrp_cntl); in gfx10_emit_shader_ngg_tail()
951 shader->ctx_reg.ngg.vgt_primitiveid_en); in gfx10_emit_shader_ngg_tail()
953 shader->ctx_reg.ngg.vgt_gs_onchip_cntl); in gfx10_emit_shader_ngg_tail()
955 shader->ctx_reg.ngg.vgt_gs_instance_cnt); in gfx10_emit_shader_ngg_tail()
958 shader->ctx_reg.ngg.vgt_esgs_ring_itemsize); in gfx10_emit_shader_ngg_tail()
960 shader->ctx_reg.ngg.spi_vs_out_config); in gfx10_emit_shader_ngg_tail()
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| D | si_pipe.h | 841 unsigned ngg : 1; /* gfx10+ */ member
847 unsigned ngg : 1;
1116 bool ngg : 1; member
1908 gl_shader_stage stage, bool ngg, bool es, in si_get_wave_size() argument
1918 (stage == MESA_SHADER_VERTEX && es && !ngg) || in si_get_wave_size()
1919 (stage == MESA_SHADER_TESS_EVAL && es && !ngg) || in si_get_wave_size()
1920 (stage == MESA_SHADER_GEOMETRY && !ngg)) /* legacy GS only supports Wave64 */ in si_get_wave_size()
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| D | si_shader.h | 749 } ngg; member
791 } ngg; member
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| D | gfx10_shader_ngg.c | 2085 shader->ngg.hw_max_esverts = max_esverts - max_verts_per_prim + 1; in gfx10_ngg_calculate_subgroup_info()
2086 shader->ngg.max_gsprims = max_gsprims; in gfx10_ngg_calculate_subgroup_info()
2087 shader->ngg.max_out_verts = max_out_vertices; in gfx10_ngg_calculate_subgroup_info()
2088 shader->ngg.prim_amp_factor = prim_amp_factor; in gfx10_ngg_calculate_subgroup_info()
2089 shader->ngg.max_vert_out_per_gs_instance = max_vert_out_per_gs_instance; in gfx10_ngg_calculate_subgroup_info()
2094 shader->ngg.ngg_emit_size = max_gsprims * gsprim_lds_size; in gfx10_ngg_calculate_subgroup_info()
2096 assert(shader->ngg.hw_max_esverts >= min_esverts); /* HW limitation */ in gfx10_ngg_calculate_subgroup_info()
2101 shader->ngg.hw_max_esverts >= min_esverts; in gfx10_ngg_calculate_subgroup_info()
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| D | si_state.h | 560 void si_get_ir_cache_key(struct si_shader_selector *sel, bool ngg, bool es,
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| D | si_state_draw.c | 582 if (unlikely(gs_out_prim != sctx->last_gs_out_prim && (sctx->ngg || sctx->gs_shader.cso))) { in si_emit_rasterizer_prim_state()
590 if (sctx->ngg) { in si_emit_rasterizer_prim_state()
684 if (sctx->ngg) { in gfx10_emit_ge_cntl()
2035 if (sctx->ngg && !dispatch_prim_discard_cs && rast_prim == PIPE_PRIM_TRIANGLES && in si_multi_draw_vbo()
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| D | si_descriptors.c | 1928 if (sctx->ngg || sctx->gs_shader.cso) { in si_shader_change_notify()
1942 if (sctx->ngg || sctx->gs_shader.cso) { in si_shader_change_notify()
2634 if (sctx->ngg) { in si_init_all_descriptors()
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| D | si_pipe.c | 550 sctx->ngg = sscreen->use_ngg; in si_create_context()
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| D | si_shader.c | 821 sym->size = shader->ngg.ngg_emit_size * 4; in si_shader_binary_open()
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| /external/mesa3d/src/amd/compiler/ |
| D | aco_instruction_selection_setup.cpp | 1057 bool ngg = args->shader_info->is_ngg && args->options->chip_class >= GFX10; in setup_isel_context() local
1059 if (sw_stage == SWStage::VS && args->shader_info->vs.as_es && !ngg) in setup_isel_context()
1061 else if (sw_stage == SWStage::VS && !args->shader_info->vs.as_ls && !ngg) in setup_isel_context()
1063 else if (sw_stage == SWStage::VS && ngg) in setup_isel_context()
1073 else if (sw_stage == SWStage::VS_GS && gfx9_plus && !ngg) in setup_isel_context()
1075 else if (sw_stage == SWStage::VS_GS && ngg) in setup_isel_context()
1083 else if (sw_stage == SWStage::TES && !args->shader_info->tes.as_es && !ngg) in setup_isel_context()
1085 else if (sw_stage == SWStage::TES && !args->shader_info->tes.as_es && ngg) in setup_isel_context()
1087 else if (sw_stage == SWStage::TES && args->shader_info->tes.as_es && !ngg) in setup_isel_context()
1089 else if (sw_stage == SWStage::TES_GS && gfx9_plus && !ngg) in setup_isel_context()
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| /external/jsoncpp/ |
| D | AUTHORS | 55 Gergely Nagy <ngg@ngg.hu>
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_pipeline.c | 1937 struct gfx10_ngg_info *ngg) in gfx10_get_ngg_info() argument
2133 ngg->hw_max_esverts = max_esverts - max_verts_per_prim + 1; in gfx10_get_ngg_info()
2134 ngg->max_gsprims = max_gsprims; in gfx10_get_ngg_info()
2135 ngg->max_out_verts = max_out_vertices; in gfx10_get_ngg_info()
2136 ngg->prim_amp_factor = prim_amp_factor; in gfx10_get_ngg_info()
2137 ngg->max_vert_out_per_gs_instance = max_vert_out_per_gs_instance; in gfx10_get_ngg_info()
2138 ngg->ngg_emit_size = max_gsprims * gsprim_lds_size; in gfx10_get_ngg_info()
2141 ngg->esgs_ring_size = in gfx10_get_ngg_info()
2145 ngg->vgt_esgs_ring_itemsize = es_info->esgs_itemsize / 4; in gfx10_get_ngg_info()
2147 ngg->vgt_esgs_ring_itemsize = 1; in gfx10_get_ngg_info()
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| /external/icu/icu4c/source/data/translit/ |
| D | my_my_Latn.txt | 275 # င\u103A\u1039ဂ > ngg ;
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| D | ko_ko_Latn_BGN.txt | 182 ᆼᄀ → ngg ; # HANGUL JONGSEONG IEUNG + CHOSEONG KIYEOK
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| /external/mesa3d/docs/relnotes/ |
| D | 20.3.0.rst | 3970 - radeonsi/gfx10: flush gfx cs on ngg -\> legacy transition
4518 - aco/ngg: Refactor gs_alloc_req in preparation for NGG GS.
4519 - aco/ngg: Refactor ngg_emit_prim_export in preparation for NGG GS.
4520 - aco/ngg: Make primitive export packing less prone to error.
4521 - aco/ngg: Clean up and reorganize NGG VS/TES code.
4522 - aco/ngg: Allow NGG GS to store ES outputs.
4523 - aco/ngg: Allow NGG GS to load per-vertex GS inputs.
4524 - aco/ngg: Allow NGG GS to create VS exports.
4525 - aco/ngg: Setup NGG GS.
4526 - aco/ngg: Create LDS layout for NGG GS.
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| D | 19.2.0.rst | 337 - radeonsi/gfx10: remove incorrect ngg/pos_writes_edgeflag variables
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| D | 20.1.0.rst | 3377 - radeonsi/ngg: add VGT_FLUSH when enabling fast launch
4222 - aco/ngg: Add new stage for hw_ngg_gs.
4223 - aco/ngg: Initialize exec mask for NGG VS and TES.
4224 - aco/ngg: Fix exports for NGG VS and TES.
4225 - aco/ngg: Setup NGG VS and TES stages.
4226 - aco/ngg: Implement NGG VS and TES.
4227 - aco/ngg: Schedule position exports of NGG VS/TES.
4228 - aco/ngg: Run GS_ALLOC_REQ on priority 3 for NGG VS and TES.
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| D | 20.0.0.rst | 2716 - radeonsi/ngg: add VGT_FLUSH when enabling fast launch
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| D | 19.3.0.rst | 2336 - radeonsi/gfx10: remove incorrect ngg/pos_writes_edgeflag variables
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| D | 20.2.0.rst | 3724 - radeonsi/ngg: try GS multi-cycling mode if default mode failed
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| /external/ImageMagick/PerlMagick/t/reference/write/composite/ |
| D | CopyRed.miff | 41 …gg�ggg�ggg�ggg�ggg�Ugg�Vgg�Vgg�Vgg�\gg�`gg�bgg�mgg�wgg�pgg�]gg�Wgg�]gg�fgg�ngg�jgg��gg��gg��gg��gg…
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| /external/cldr/tools/java/org/unicode/cldr/util/data/ |
| D | iso-639-3_Name_Index.tab | 4781 ngg Ngbaka Manza Ngbaka Manza
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| D | iso-639-3.tab | 4563 ngg I L Ngbaka Manza
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| D | language-subtag-registry | 25056 Subtag: ngg
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| /external/icu/icu4c/source/data/unidata/ |
| D | ppucd.txt | 35556 # Syllables in ngg-
|