Searched refs:nxv2bf16 (Results 1 – 11 of 11) sorted by relevance
| /external/llvm-project/llvm/include/llvm/Support/ |
| D | MachineValueType.h | 215 nxv2bf16 = 145, // n x 2 x bf16 enumerator
602 case nxv2bf16: in getVectorElementType()
767 case nxv2bf16: in getVectorNumElements()
858 case nxv2bf16: in getSizeInBits()
1280 if (NumElements == 2) return MVT::nxv2bf16; in getScalableVectorVT()
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| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | sve-masked-scatter-64b-unscaled.ll | 70 …call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x bfloat*> %ptrs,…
98 declare void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat>, <vscale x 2 x bfloat*>, i32, <vsc…
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| D | sve-masked-scatter-32b-scaled.ll | 59 …call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x bfloat*> %ptrs,…
136 …call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x bfloat*> %ptrs,…
280 declare void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat>, <vscale x 2 x bfloat*>, i32, <vsc…
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| D | sve-masked-scatter-32b-unscaled.ll | 76 …call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x bfloat*> %ptrs,…
172 …call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x bfloat*> %ptrs,…
351 declare void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat>, <vscale x 2 x bfloat*>, i32, <vsc…
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64CallingConvention.td | 75 nxv2bf16, nxv4bf16, nxv8bf16, nxv2f32, nxv4f32, nxv2f64],
78 nxv2bf16, nxv4bf16, nxv8bf16, nxv2f32, nxv4f32, nxv2f64],
159 nxv2bf16, nxv4bf16, nxv8bf16, nxv2f32, nxv4f32, nxv2f64],
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| D | AArch64RegisterInfo.td | 885 nxv2bf16, nxv4bf16, nxv8bf16,
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| D | AArch64SVEInstrInfo.td | 1195 def : Pat<(nxv2bf16 (extract_subvector (nxv4bf16 ZPR:$Zs), (i64 0))),
1197 def : Pat<(nxv2bf16 (extract_subvector (nxv4bf16 ZPR:$Zs), (i64 2))),
1785 def : Pat<(nxv2i64 (reinterpret_cast (nxv2bf16 ZPR:$src))), (COPY_TO_REGCLASS ZPR:$src, ZPR)>;
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| D | AArch64ISelLowering.cpp | 277 addRegisterClass(MVT::nxv2bf16, &AArch64::ZPRRegClass); in AArch64TargetLowering()
1151 for (auto VT : {MVT::nxv2bf16, MVT::nxv4bf16, MVT::nxv8bf16}) in AArch64TargetLowering()
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ValueTypes.td | 179 def nxv2bf16 : ValueType<32 , 145>; // n x 2 x bf16 vector value
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | ValueTypes.cpp | 458 case MVT::nxv2bf16: in getTypeForEVT()
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| /external/llvm-project/llvm/utils/TableGen/ |
| D | CodeGenTarget.cpp | 211 case MVT::nxv2bf16: return "MVT::nxv2bf16"; in getEnumName()
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