/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | machine-zero-copy-remove.mir | 4 # CHECK: ANDSWri $w0, 1, implicit-def $nzcv 13 $w0 = ANDSWri $w0, 1, implicit-def $nzcv 15 Bcc 1, %bb.2, implicit killed $nzcv 28 # CHECK: ANDSXri $x0, 1, implicit-def $nzcv 37 $x0 = ANDSXri $x0, 1, implicit-def $nzcv 39 Bcc 1, %bb.2, implicit killed $nzcv 52 # CHECK: ADDSWri $w0, 1, 0, implicit-def $nzcv 61 $w0 = ADDSWri $w0, 1, 0, implicit-def $nzcv 63 Bcc 1, %bb.2, implicit killed $nzcv 76 # CHECK: ADDSXri $x0, 1, 0, implicit-def $nzcv [all …]
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D | falkor-hwpf-fix.mir | 19 $wzr = SUBSWri $w0, 0, 0, implicit-def $nzcv 20 Bcc 9, %bb.0, implicit $nzcv 40 $wzr = SUBSWri $w0, 0, 0, implicit-def $nzcv 41 Bcc 9, %bb.0, implicit $nzcv 61 $wzr = SUBSWri $w0, 0, 0, implicit-def $nzcv 62 Bcc 9, %bb.0, implicit $nzcv 82 $wzr = SUBSWri $w0, 0, 0, implicit-def $nzcv 83 Bcc 9, %bb.0, implicit $nzcv 103 $wzr = SUBSWri $w0, 0, 0, implicit-def $nzcv 104 Bcc 9, %bb.0, implicit $nzcv [all …]
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D | post-ra-machine-sink.mir | 17 $w1 = SUBSWri $w1, 1, 0, implicit-def $nzcv 19 Bcc 11, %bb.1, implicit $nzcv 45 $w1 = SUBSWri $w1, 1, 0, implicit-def $nzcv 47 Bcc 11, %bb.2, implicit $nzcv 74 $w1 = SUBSWri $w1, 1, 0, implicit-def $nzcv 102 $w1 = SUBSWri $w1, 1, 0, implicit-def $nzcv 105 Bcc 11, %bb.2, implicit $nzcv 133 $w1 = SUBSWri $w1, 1, 0, implicit-def $nzcv 135 Bcc 11, %bb.2, implicit $nzcv 166 $w1 = SUBSWri $w1, 1, 0, implicit-def $nzcv [all …]
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D | ccmp-successor-probs.mir | 9 # CHECK: CCMPXr %5, %4, 0, 10, implicit-def $nzcv, implicit $nzcv 27 %2 = SUBSXrr %1, %0, implicit-def dead $nzcv 28 %3 = SUBSXri $x1, 1, 0, implicit-def dead $nzcv 31 %6 = SUBSXrr $x1, killed %2, implicit-def $nzcv 32 Bcc 11, %bb.2, implicit $nzcv 38 %7 = SUBSXrr %5, %4, implicit-def $nzcv 39 Bcc 12, %bb.2, implicit $nzcv
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D | machine-copy-remove.mir | 266 # CHECK: SUBSWri $w0, 7, 0, implicit-def $nzcv 275 dead $wzr = SUBSWri killed $w0, 7, 0, implicit-def $nzcv 276 Bcc 1, %bb.2, implicit killed $nzcv 292 # CHECK: SUBSXri $x0, 7, 0, implicit-def $nzcv 301 dead $xzr = SUBSXri killed $x0, 7, 0, implicit-def $nzcv 302 Bcc 1, %bb.2, implicit killed $nzcv 318 # CHECK: SUBSXri $x0, 7, 0, implicit-def $nzcv 327 dead $xzr = SUBSXri killed $x0, 7, 0, implicit-def $nzcv 328 Bcc 1, %bb.2, implicit killed $nzcv 344 # CHECK: SUBSWri killed $w0, 7, 0, implicit-def $nzcv [all …]
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D | jti-correct-datatype.mir | 31 dead $wzr = SUBSWri renamable $w0, 3, 0, implicit-def $nzcv 32 Bcc 8, %bb.6, implicit $nzcv 50 dead $wzr = SUBSWri killed renamable $w9, 1, 0, implicit-def $nzcv 51 Bcc 11, %bb.6, implicit $nzcv 59 dead $wzr = SUBSWri killed renamable $w9, 1, 0, implicit-def $nzcv 60 Bcc 11, %bb.6, implicit $nzcv 68 dead $wzr = SUBSWri killed renamable $w9, 1, 0, implicit-def $nzcv 69 Bcc 11, %bb.6, implicit $nzcv 77 dead $wzr = SUBSWri killed renamable $w9, 1, 0, implicit-def $nzcv 78 Bcc 11, %bb.6, implicit $nzcv
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D | peephole-opt-check-cflags.mir | 45 %48 = nsw SUBSWrr killed %43, killed %46, implicit-def dead $nzcv 46 %49 = nsw SUBSWrr killed %44, killed %47, implicit-def dead $nzcv 47 %50 = SUBSWri %48, 0, 0, implicit-def $nzcv 48 %51 = CSNEGWr %48, %48, 5, implicit $nzcv 49 %52 = SUBSWri %49, 0, 0, implicit-def $nzcv 50 %53 = CSNEGWr %49, %49, 5, implicit $nzcv 51 Bcc 1, %bb.0, implicit $nzcv
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D | macro-fusion-last.mir | 8 # NOFUSION: $xzr = SUBSXri killed $x2, 0, 0, implicit-def $nzcv 10 # FUSION: $xzr = SUBSXri killed $x2, 0, 0, implicit-def $nzcv 11 # CHECK: Bcc 1, %bb.1, implicit killed $nzcv 23 $xzr = SUBSXri $x2, 0, 0, implicit-def $nzcv 24 Bcc 1, %bb.1, implicit killed $nzcv
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D | speculation-hardening.mir | 80 $wzr = SUBSWrs renamable $w0, renamable $w1, 0, implicit-def $nzcv, implicit-def $nzcv 81 Bcc 11, %bb.2, implicit $nzcv 85 liveins: $nzcv, $w0 89 liveins: $nzcv, $w0 101 $wzr = SUBSWrs renamable $w0, renamable $w1, 0, implicit-def $nzcv, implicit-def $nzcv 102 Bcc 11, %bb.2, implicit $nzcv 103 B %bb.1, implicit $nzcv 107 liveins: $nzcv, $w0 111 liveins: $nzcv, $w0
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/external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/ |
D | postselectopt-dead-cc-defs-in-fcmp.mir | 24 ; CHECK: FCMPSrr [[COPY2]], [[COPY3]], implicit-def dead $nzcv 26 ; CHECK: FCMPSrr [[COPY2]], [[COPY3]], implicit-def $nzcv 29 ; CHECK: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[UBFMWri]], [[MOVi32imm]], 8, implicit $nzcv 37 FCMPSrr %3, %4, implicit-def $nzcv 38 %12:gpr32 = SUBSWrr %2, %26, implicit-def $nzcv 39 FCMPSrr %3, %4, implicit-def $nzcv 42 %16:gpr32 = CSELWr %14, %60, 8, implicit $nzcv 68 ; CHECK: FCMPDrr [[COPY2]], [[COPY3]], implicit-def dead $nzcv 70 ; CHECK: FCMPDrr [[COPY2]], [[COPY3]], implicit-def $nzcv 73 ; CHECK: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[UBFMWri]], [[MOVi32imm]], 8, implicit $nzcv [all …]
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D | fold-fp-select.mir | 30 ; CHECK: FCMPSri [[COPY]], implicit-def $nzcv 31 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv 34 ; CHECK: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri [[COPY3]], 0, implicit-def $nzcv 35 ; CHECK: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[FMOVS0_]], [[COPY1]], 1, implicit $nzcv 66 ; CHECK: FCMPSri [[COPY]], implicit-def $nzcv 67 ; CHECK: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[FMOVS0_]], [[COPY1]], 0, implicit $nzcv 68 ; CHECK: FCMPSri [[COPY]], implicit-def $nzcv 69 ; CHECK: [[FCSELSrrr1:%[0-9]+]]:fpr32 = FCSELSrrr [[COPY1]], [[FMOVS0_]], 0, implicit $nzcv 101 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 0, 0, implicit-def $nzcv 102 ; CHECK: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[COPY1]], [[FMOVS0_]], 0, implicit $nzcv [all …]
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D | opt-shifted-reg-compare.mir | 26 ; CHECK: [[SUBSWrs:%[0-9]+]]:gpr32 = SUBSWrs %copy1, %copy0, 3, implicit-def $nzcv 27 ; CHECK: %cmp:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv 52 ; CHECK: [[SUBSWrs:%[0-9]+]]:gpr32 = SUBSWrs %copy1, %copy0, 131, implicit-def $nzcv 53 ; CHECK: %cmp:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv 78 ; CHECK: [[SUBSWrs:%[0-9]+]]:gpr32 = SUBSWrs %copy1, %copy0, 67, implicit-def $nzcv 79 ; CHECK: %cmp:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv 104 ; CHECK: [[SUBSWrs:%[0-9]+]]:gpr32 = SUBSWrs %copy1, %copy0, 3, implicit-def $nzcv 105 ; CHECK: %cmp:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv 130 ; CHECK: [[SUBSWrs:%[0-9]+]]:gpr32 = SUBSWrs %copy1, %copy0, 131, implicit-def $nzcv 131 ; CHECK: %cmp:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv [all …]
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D | select-cmp.mir | 15 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 42, 0, implicit-def $nzcv 16 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv 38 ; CHECK: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri [[COPY]], 42, 0, implicit-def $nzcv 39 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv 63 ; CHECK: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr [[COPY]], [[SUBREG_TO_REG]], implicit-def $nzcv 64 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv 85 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 42, 0, implicit-def $nzcv 86 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv 108 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 0, 0, implicit-def $nzcv 109 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv [all …]
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D | opt-fold-compare.mir | 48 ; CHECK: [[ADDSWrr:%[0-9]+]]:gpr32 = ADDSWrr [[COPY]], [[COPY1]], implicit-def $nzcv 49 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv 79 ; CHECK: [[ADDSWrr:%[0-9]+]]:gpr32 = ADDSWrr [[COPY]], [[COPY1]], implicit-def $nzcv 80 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 0, implicit $nzcv 110 ; CHECK: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY2]], [[COPY1]], implicit-def $nzcv 111 ; CHECK: [[SUBSWrr1:%[0-9]+]]:gpr32 = SUBSWrr [[COPY]], [[SUBSWrr]], implicit-def $nzcv 112 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 10, implicit $nzcv 142 ; CHECK: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY2]], [[COPY]], implicit-def $nzcv 143 ; CHECK: [[SUBSWrr1:%[0-9]+]]:gpr32 = SUBSWrr [[SUBSWrr]], [[COPY1]], implicit-def $nzcv 144 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY2]], $wzr, 10, implicit $nzcv [all …]
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D | select-select.mir | 23 ; CHECK: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri [[COPY4]], 0, implicit-def $nzcv 24 ; CHECK: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[COPY1]], [[COPY2]], 1, implicit $nzcv 55 ; CHECK: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri [[COPY4]], 0, implicit-def $nzcv 56 ; CHECK: [[FCSELDrrr:%[0-9]+]]:fpr64 = FCSELDrrr [[COPY1]], [[COPY2]], 1, implicit $nzcv 82 ; CHECK: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr %reg0, %reg1, implicit-def $nzcv 83 ; CHECK: %select:gpr32 = CSELWr %t, %f, 1, implicit $nzcv 110 ; CHECK: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr %reg0, %reg1, implicit-def $nzcv 111 ; CHECK: %select:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv 138 ; CHECK: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr %reg0, %reg1, implicit-def $nzcv 139 ; CHECK: %select:gpr32 = CSINVWr $wzr, $wzr, 1, implicit $nzcv [all …]
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D | select.mir | 132 # CHECK: SUBSWrr %0, %0, implicit-def $nzcv 133 # CHECK: %1:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv 135 # CHECK: SUBSXrr %2, %2, implicit-def $nzcv 136 # CHECK: %3:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv 138 # CHECK: SUBSXrr %4, %4, implicit-def $nzcv 139 # CHECK: %5:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv 188 # CHECK: FCMPSrr %0, %0, implicit-def $nzcv 189 # CHECK: [[TST_MI:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 5, implicit $nzcv 190 # CHECK: [[TST_GT:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 13, implicit $nzcv 193 # CHECK: FCMPDrr %2, %2, implicit-def $nzcv [all …]
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D | select-static.mir | 129 # CHECK: SUBSWrr %0, %0, implicit-def $nzcv 130 # CHECK: %1:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv 132 # CHECK: SUBSXrr %2, %2, implicit-def $nzcv 133 # CHECK: %3:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv 135 # CHECK: SUBSXrr %4, %4, implicit-def $nzcv 136 # CHECK: %5:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv 185 # CHECK: FCMPSrr %0, %0, implicit-def $nzcv 186 # CHECK: [[TST_MI:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 5, implicit $nzcv 187 # CHECK: [[TST_GT:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 13, implicit $nzcv 190 # CHECK: FCMPDrr %2, %2, implicit-def $nzcv [all …]
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D | fold-brcond-fcmp.mir | 22 ; CHECK: FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv 23 ; CHECK: Bcc 0, %bb.2, implicit $nzcv 61 ; CHECK: FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv 62 ; CHECK: Bcc 12, %bb.2, implicit $nzcv 100 ; CHECK: FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv 101 ; CHECK: Bcc 10, %bb.2, implicit $nzcv 139 ; CHECK: FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv 140 ; CHECK: Bcc 4, %bb.2, implicit $nzcv 178 ; CHECK: FCMPSrr %cmp_lhs, %cmp_rhs, implicit-def $nzcv 179 ; CHECK: Bcc 9, %bb.2, implicit $nzcv [all …]
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D | select-uaddo.mir | 19 ; CHECK: [[ADDSWrr:%[0-9]+]]:gpr32 = ADDSWrr [[COPY]], [[COPY1]], implicit-def $nzcv 20 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv 48 ; CHECK: [[ADDSXrr:%[0-9]+]]:gpr64 = ADDSXrr [[COPY]], [[COPY1]], implicit-def $nzcv 49 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv 77 ; CHECK: %add:gpr32 = ADDSWri %copy, 16, 0, implicit-def $nzcv 78 ; CHECK: %overflow:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv 103 ; CHECK: %add:gpr32 = ADDSWrs %copy1, %copy2, 16, implicit-def $nzcv 104 ; CHECK: %overflow:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv 130 ; CHECK: %add:gpr32 = SUBSWri %copy, 16, 0, implicit-def $nzcv 131 ; CHECK: %overflow:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv [all …]
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D | postlegalizer-lowering-adjust-icmp-imm.mir | 31 ; SELECT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri %reg, 1, 12, implicit-def $nzcv 32 ; SELECT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 12, implicit $nzcv 65 ; SELECT: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri %reg, 1, 12, implicit-def $nzcv 66 ; SELECT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 12, implicit $nzcv 99 ; SELECT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri %reg, 1, 12, implicit-def $nzcv 100 ; SELECT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 13, implicit $nzcv 133 ; SELECT: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri %reg, 1, 12, implicit-def $nzcv 134 ; SELECT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 13, implicit $nzcv 167 ; SELECT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri %reg, 1, 12, implicit-def $nzcv 168 ; SELECT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 8, implicit $nzcv [all …]
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D | select-fcmp.mir | 20 ; CHECK: FCMPSri [[COPY]], implicit-def $nzcv 21 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv 47 ; CHECK: FCMPSrr [[COPY]], [[FMOVSi]], implicit-def $nzcv 48 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv 74 ; CHECK: FCMPDrr [[COPY]], [[FMOVDi]], implicit-def $nzcv 75 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv 100 ; CHECK: FCMPDri [[COPY]], implicit-def $nzcv 101 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv
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D | speculative-hardening-brcond.mir | 23 ; CHECK: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri %reg, 1, implicit-def $nzcv 24 ; CHECK: Bcc 0, %bb.1, implicit $nzcv 47 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri %reg, 0, 0, implicit-def $nzcv 48 ; CHECK: Bcc 0, %bb.1, implicit $nzcv 74 ; CHECK: FCMPSrr %reg0, %reg1, implicit-def $nzcv 75 ; CHECK: Bcc 0, %bb.1, implicit $nzcv
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D | fold-select.mir | 25 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 0, 0, implicit-def $nzcv 26 ; CHECK: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY2]], [[COPY1]], 0, implicit $nzcv 54 ; CHECK: FCMPSri [[COPY1]], implicit-def $nzcv 55 ; CHECK: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY2]], [[COPY]], 0, implicit $nzcv 82 ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv 83 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY]], $wzr, 0, implicit $nzcv
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/external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
D | select-saddo.mir | 19 ; CHECK: %saddo:gpr32 = ADDSWrr %reg0, %reg1, implicit-def $nzcv 20 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv 44 ; CHECK: %saddo:gpr64 = ADDSXrr %reg0, %reg1, implicit-def $nzcv 45 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv 69 ; CHECK: %saddo:gpr32 = ADDSWri %copy, 16, 0, implicit-def $nzcv 70 ; CHECK: %overflow:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv 95 ; CHECK: %add:gpr32 = ADDSWrs %reg0, %reg1, 16, implicit-def $nzcv 96 ; CHECK: %overflow:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv 122 ; CHECK: %add:gpr32 = SUBSWri %copy, 16, 0, implicit-def $nzcv 123 ; CHECK: %overflow:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv [all …]
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D | select-ssubo.mir | 19 ; CHECK: %ssubo:gpr32 = SUBSWrr %reg0, %reg1, implicit-def $nzcv 20 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv 44 ; CHECK: %ssubo:gpr64 = SUBSXrr %reg0, %reg1, implicit-def $nzcv 45 ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv 69 ; CHECK: %ssubo:gpr32 = SUBSWri %copy, 16, 0, implicit-def $nzcv 70 ; CHECK: %overflow:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv 95 ; CHECK: %sub:gpr32 = SUBSWrs %reg0, %reg1, 16, implicit-def $nzcv 96 ; CHECK: %overflow:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv 122 ; CHECK: %sub:gpr32 = ADDSWri %copy, 16, 0, implicit-def $nzcv 123 ; CHECK: %overflow:gpr32 = CSINCWr $wzr, $wzr, 7, implicit $nzcv [all …]
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