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Searched refs:offset1 (Results 1 – 25 of 198) sorted by relevance

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/external/dtc/tests/
Ddtbs_equal_ordered.c68 int offset1, offset2; in compare_structure() local
77 offset1 = nextoffset1; in compare_structure()
78 tag1 = fdt_next_tag(fdt1, offset1, &nextoffset1); in compare_structure()
87 tag1, tag2, offset1, offset2); in compare_structure()
91 name1 = fdt_get_name(fdt1, offset1, &err); in compare_structure()
94 offset1, fdt_strerror(err)); in compare_structure()
102 name1, name2, offset1, offset2); in compare_structure()
106 prop1 = fdt_offset_ptr(fdt1, offset1, sizeof(*prop1)); in compare_structure()
108 FAIL("Could get fdt1 property at %d", offset1); in compare_structure()
117 "at (%d, %d)", name1, name2, offset1, offset2); in compare_structure()
[all …]
Ddtbs_equal_unordered.c91 static void compare_properties(const void *fdt1, int offset1, in compare_properties() argument
94 int offset = offset1; in compare_properties()
97 for (offset = fdt_first_property_offset(fdt1, offset1); in compare_properties()
137 static void compare_node(const void *fdt1, int offset1,
140 static void compare_subnodes(const void *fdt1, int offset1, in compare_subnodes() argument
146 for (depth = 0, coffset1 = offset1; in compare_subnodes()
165 static void compare_node(const void *fdt1, int offset1, in compare_node() argument
171 CHECK(fdt_get_path(fdt1, offset1, path1, sizeof(path1))); in compare_node()
179 compare_properties(fdt1, offset1, fdt2, offset2); in compare_node()
180 compare_properties(fdt2, offset2, fdt1, offset1); in compare_node()
[all …]
/external/angle/src/libANGLE/
Dcl_utils.h20 inline bool OverlapRegions(size_t offset1, size_t offset2, size_t size) in OverlapRegions() argument
25 return (offset1 <= offset2 && offset2 <= offset1 + size - 1u) || in OverlapRegions()
26 (offset2 <= offset1 && offset1 <= offset2 + size - 1u); in OverlapRegions()
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dds-combine-large-stride.ll16 ; GCN-DAG: ds_read2_b32 v[{{[0-9]+:[0-9]+}}], [[BASE]] offset1:100
17 ; GCN-DAG: ds_read2_b32 v[{{[0-9]+:[0-9]+}}], [[B1]] offset1:100
18 ; GCN-DAG: ds_read2_b32 v[{{[0-9]+:[0-9]+}}], [[B2]] offset1:100
19 ; GCN-DAG: ds_read2_b32 v[{{[0-9]+:[0-9]+}}], [[B3]] offset1:100
61 ; GCN-DAG: ds_read2_b32 v[{{[0-9]+:[0-9]+}}], [[BASE]] offset1:100
62 ; GCN-DAG: ds_read2_b32 v[{{[0-9]+:[0-9]+}}], [[B1]] offset1:100
63 ; GCN-DAG: ds_read2_b32 v[{{[0-9]+:[0-9]+}}], [[B2]] offset1:100
64 ; GCN-DAG: ds_read2_b32 v[{{[0-9]+:[0-9]+}}], [[B3]] offset1:100
97 ; GCN-DAG: ds_read2st64_b32 v[{{[0-9]+:[0-9]+}}], [[BASE]] offset1:32
98 ; GCN-DAG: ds_read2st64_b32 v[{{[0-9]+:[0-9]+}}], [[BASE]] offset0:64 offset1:96
[all …]
Dreduce-store-width-alignment.ll5 ; GCN: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset1:1{{$}}
14 ; GCN-DAG: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset0:2 offset1:3
15 ; GCN-DAG: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset1:1{{$}}
24 ; GCN: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset1:1{{$}}
33 ; GCN-DAG: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset0:2 offset1:3
34 ; GCN-DAG: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset1:1{{$}}
46 ; GCN: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset1:1{{$}}
Dload-local-i16.ll82 ; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
99 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3{{$}}
100 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
315 ; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
332 ; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
357 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
358 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3{{$}}
385 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
386 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3{{$}}
423 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
[all …]
Dfence-lds-read2-write2.ll19 ; GCN-NEXT: ds_write2_b64 v2, v[0:1], v[0:1] offset1:66
20 ; GCN-NEXT: ds_write2_b64 v2, v[0:1], v[0:1] offset0:132 offset1:198
21 ; GCN-NEXT: ds_write2_b64 v3, v[0:1], v[0:1] offset1:66
22 ; GCN-NEXT: ds_write2_b64 v4, v[0:1], v[0:1] offset1:66
29 ; GCN-NEXT: ds_write2_b64 v2, v[0:1], v[0:1] offset1:66
30 ; GCN-NEXT: ds_write2_b64 v2, v[0:1], v[0:1] offset0:132 offset1:198
31 ; GCN-NEXT: ds_write2_b64 v3, v[0:1], v[0:1] offset1:66
32 ; GCN-NEXT: ds_write2_b64 v4, v[0:1], v[0:1] offset1:66
Dds_read2_superreg.ll11 ; CI: ds_read2_b32 [[RESULT:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}} offset1:1{{$}}
39 ; CI-DAG: ds_read2_b32 v{{\[}}[[REG_X:[0-9]+]]:[[REG_Y:[0-9]+]]{{\]}}, v{{[0-9]+}} offset1:1{{$}}
40 …: ds_read2_b32 v{{\[}}[[REG_Z:[0-9]+]]:[[REG_W:[0-9]+]]{{\]}}, v{{[0-9]+}} offset0:2 offset1:3{{$}}
65 ; CI-DAG: ds_read2_b32 v{{\[}}[[REG_X:[0-9]+]]:[[REG_Y:[0-9]+]]{{\]}}, v{{[0-9]+}} offset1:1{{$}}
88 ; CI: ds_read2_b64 [[REG_ZW:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}} offset1:1{{$}}
101 ; CI-DAG: ds_read2_b64 [[REG_ZW:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}} offset1:1{{$}}
115 ; CI-DAG: ds_read2_b64 [[VEC_HI:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}} offset0:2 offset1:3{{$}}
116 ; CI-DAG: ds_read2_b64 [[VEC_LO:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}} offset1:1{{$}}
131 ; CI-DAG: ds_read2_b64 [[VEC0_3:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}} offset1:1{{$}}
132 ; CI-DAG: ds_read2_b64 [[VEC4_7:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}} offset0:2 offset1:3{{$}}
[all …]
Dds_write2.ll21 ; CI-NEXT: ds_write2_b32 v0, v1, v1 offset1:8
31 ; GFX9-NEXT: ds_write2_b32 v0, v1, v1 offset1:8
57 ; CI-NEXT: ds_write2_b32 v0, v2, v1 offset1:8
68 ; GFX9-NEXT: ds_write2_b32 v0, v1, v2 offset1:8
194 ; CI-NEXT: ds_write2_b32 v0, v3, v2 offset1:8
207 ; GFX9-NEXT: ds_write2_b32 v0, v1, v3 offset1:8
237 ; CI-NEXT: ds_write2_b32 v0, v1, v2 offset1:8
248 ; GFX9-NEXT: ds_write2_b32 v0, v1, v2 offset1:8
276 ; CI-NEXT: ds_write2_b32 v0, v1, v4 offset1:8
287 ; GFX9-NEXT: ds_write2_b32 v0, v1, v4 offset1:8
[all …]
Dds_read2_offset_order.ll6 ; offset0 is larger than offset1
9 ; SI-DAG: ds_read2_b32 v[{{[0-9]+}}:{{[0-9]+}}], v{{[0-9]+}} offset1:14{{$}}
10 ; SI-DAG: ds_read2_b32 v[{{[0-9]+}}:{{[0-9]+}}], v{{[0-9]+}} offset0:2 offset1:3
12 ; SI-DAG: ds_read2_b32 v[{{[0-9]+}}:{{[0-9]+}}], v{{[0-9]+}} offset0:11 offset1:12
Dload-local-i32.ll56 ; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
69 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3{{$}}
70 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
82 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:6 offset1:7{{$}}
83 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:4 offset1:5{{$}}
84 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3{{$}}
85 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
86 …-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:6 offset1:7
87 …-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:4 offset1:5
88 …-DAG: ds_write2_b64 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:2 offset1:3
[all …]
Dds_read2.ll17 ; CI-NEXT: ds_read2_b32 v[1:2], v0 offset1:8
30 ; GFX9-NEXT: ds_read2_b32 v[0:1], v2 offset1:8
53 ; CI-NEXT: ds_read2_b32 v[1:2], v0 offset1:255
66 ; GFX9-NEXT: ds_read2_b32 v[0:1], v2 offset1:255
127 ; CI-NEXT: ds_read2_b32 v[1:2], v0 offset1:8
128 ; CI-NEXT: ds_read2_b32 v[3:4], v0 offset0:11 offset1:27
143 ; GFX9-NEXT: ds_read2_b32 v[0:1], v4 offset1:8
144 ; GFX9-NEXT: ds_read2_b32 v[2:3], v4 offset0:11 offset1:27
183 ; CI-NEXT: ds_read2_b32 v[1:2], v0 offset1:8
190 ; CI-NEXT: ds_read2_b32 v[1:2], v0 offset0:11 offset1:27
[all …]
/external/proguard/src/proguard/optimize/peephole/
DGotoCommonCodeReplacer.java157 private int commonByteCodeCount(CodeAttribute codeAttribute, int offset1, int offset2) in commonByteCodeCount() argument
165 delta <= offset1 && in commonByteCodeCount()
167 offset2 - delta != offset1; in commonByteCodeCount()
170 int newOffset1 = offset1 - delta; in commonByteCodeCount()
241 private boolean exceptionBoundary(CodeAttribute codeAttribute, int offset1, int offset2) in exceptionBoundary() argument
244 if (offset2 < offset1) in exceptionBoundary()
246 int offset = offset1; in exceptionBoundary()
247 offset1 = offset2; in exceptionBoundary()
252 for (int offset = offset1; offset <= offset2; offset++) in exceptionBoundary()
/external/llvm/test/CodeGen/AMDGPU/
Dreduce-store-width-alignment.ll5 ; GCN: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset1:1{{$}}
14 ; GCN-DAG: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset0:2 offset1:3
15 ; GCN-DAG: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset1:1{{$}}
24 ; GCN: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset1:1{{$}}
33 ; GCN-DAG: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset0:2 offset1:3
34 ; GCN-DAG: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset1:1{{$}}
46 ; GCN: ds_write2_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset1:1{{$}}
Dds_read2_superreg.ll11 ; CI: ds_read2_b32 [[RESULT:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}} offset1:1{{$}}
39 ; CI-DAG: ds_read2_b32 v{{\[}}[[REG_X:[0-9]+]]:[[REG_Y:[0-9]+]]{{\]}}, v{{[0-9]+}} offset1:1{{$}}
40 …: ds_read2_b32 v{{\[}}[[REG_Z:[0-9]+]]:[[REG_W:[0-9]+]]{{\]}}, v{{[0-9]+}} offset0:2 offset1:3{{$}}
65 ; CI-DAG: ds_read2_b32 v{{\[}}[[REG_X:[0-9]+]]:[[REG_Y:[0-9]+]]{{\]}}, v{{[0-9]+}} offset1:1{{$}}
88 ; CI: ds_read2_b64 [[REG_ZW:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}} offset1:1{{$}}
101 ; CI-DAG: ds_read2_b64 [[REG_ZW:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}} offset1:1{{$}}
115 ; CI-DAG: ds_read2_b64 [[VEC_HI:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}} offset0:2 offset1:3{{$}}
116 ; CI-DAG: ds_read2_b64 [[VEC_LO:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}} offset1:1{{$}}
131 ; CI-DAG: ds_read2_b64 [[VEC0_3:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}} offset1:1{{$}}
132 ; CI-DAG: ds_read2_b64 [[VEC4_7:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}} offset0:2 offset1:3{{$}}
[all …]
Dload-local-i16.ll68 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:3 offset1:2{{$}}
223 ; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
232 ; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
242 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:1 offset1:2{{$}}
259 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:3 offset1:1{{$}}
269 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:1{{$}}
270 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:2 offset1:3
271 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:4 offset1:5
272 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:6 offset1:7
281 ; GCN-DAG: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset0:1 offset1:2{{$}}
[all …]
/external/apache-commons-compress/src/main/java/org/apache/commons/compress/utils/
DArchiveUtils.java156 final byte[] buffer1, final int offset1, final int length1, in isEqual() argument
161 if (buffer1[offset1+i] != buffer2[offset2+i]){ in isEqual()
171 if (buffer1[offset1+i] != 0){ in isEqual()
199 final byte[] buffer1, final int offset1, final int length1,
201 return isEqual(buffer1, offset1, length1, buffer2, offset2, length2, false);
239 final byte[] buffer1, final int offset1, final int length1,
241 return isEqual(buffer1, offset1, length1, buffer2, offset2, length2, true);
/external/llvm-project/compiler-rt/lib/asan/
Dasan_interceptors_memintrinsics.h131 static inline bool RangesOverlap(const char *offset1, uptr length1, in DECLARE_REAL()
133 return !((offset1 + length1 <= offset2) || (offset2 + length2 <= offset1)); in DECLARE_REAL()
137 const char *offset1 = (const char *)_offset1; \ in DECLARE_REAL()
139 if (RangesOverlap(offset1, length1, offset2, length2)) { \ in DECLARE_REAL()
146 ReportStringFunctionMemoryRangesOverlap(name, offset1, length1, \ in DECLARE_REAL()
/external/deqp-deps/glslang/Test/
Dspv.float16Fetch.frag86 const int offset1 = 1;
191 texel += textureOffset(s1D, c1, offset1);
192 texel += textureOffset(s1D, f16c1, offset1, f16bias);
201 texel.x += textureOffset(s1DShadow, c3, offset1);
202 texel.x += textureOffset(s1DShadow, f16c2, compare, offset1, f16bias);
205 texel += textureOffset(s1DArray, c2, offset1);
206 texel += textureOffset(s1DArray, f16c2, offset1, f16bias);
209 texel.x += textureOffset(s1DArrayShadow, c3, offset1);
210 texel.x += textureOffset(s1DArrayShadow, f16c2, compare, offset1, f16bias);
221 texel += textureProjOffset(s1D, c2, offset1);
[all …]
/external/llvm/test/MC/AMDGPU/
Dds-err.s14 ds_write2_b32 v2, v4, v6 offset1:4 offset1:8
22 ds_write2_b32 v2, v4, v6 offset1:1000000000
Dds.s17 ds_write_src2_b32 v2 offset0:4 offset1:8
21 ds_write_src2_b64 v2 offset0:4 offset1:8
29 ds_write2_b32 v2, v4, v6 offset0:4 offset1:8
33 ds_write2_b32 v2, v4, v6 offset1:8
41 ds_read2_b32 v[8:9], v2 offset0:4 offset1:8
45 ds_read2_b32 v[8:9], v2 offset1:8
/external/libese/third_party/NXPNFC_P61_JCOP_Kit/inc/
DAla.h222 tJBL_STATUS Check_Certificate_Tag(UINT8 *read_buf, UINT16 *offset1);
224 tJBL_STATUS Check_SerialNo_Tag(UINT8 *read_buf, UINT16 *offset1);
226 tJBL_STATUS Check_LSRootID_Tag(UINT8 *read_buf, UINT16 *offset1);
228 tJBL_STATUS Check_CertHoldID_Tag(UINT8 *read_buf, UINT16 *offset1);
230 tJBL_STATUS Check_Date_Tag(UINT8 *read_buf, UINT16 *offset1);
232 tJBL_STATUS Check_45_Tag(UINT8 *read_buf, UINT16 *offset1, UINT8 *tag45Len);
235 *pTranscv_Info, UINT8 *read_buf, UINT16 *offset1, UINT8 *tag45Len);
/external/llvm-project/llvm/test/MC/AMDGPU/
Dds.s42 ds_write2_b32 v2, v4, v6 offset0:4 offset1:8
46 ds_write2_b32 v2, v4, v6 offset1:8
54 ds_read2_b32 v[8:9], v2 offset0:4 offset1:8
58 ds_read2_b32 v[8:9], v2 offset1:8
250 ds_wrxchg2_rtn_b32 v[0:1], v0, v0, v0 offset0:127 offset1:255
258 ds_wrxchg2st64_rtn_b32 v[0:1], v0, v255, v0 offset0:127 offset1:255
459 ds_wrxchg2_rtn_b64 v[0:3], v0, v[1:2], v[0:1] offset0:127 offset1:255
467 ds_wrxchg2st64_rtn_b64 v[0:3], v255, v[0:1], v[0:1] offset0:127 offset1:255
Dds-err.s18 ds_write2_b32 v2, v4, v6 offset1:4 offset1:8
30 ds_write2_b32 v2, v4, v6 offset1:1000000000
34 ds_write2_b32 v2, v4, v6 offset1:0x100
/external/mesa3d/src/egl/wayland/wayland-drm/
Dwayland-drm.c64 int32_t offset1, int32_t stride1, in create_buffer() argument
82 buffer->offset[1] = offset1; in create_buffer()
140 int32_t offset1, int32_t stride1, in drm_create_planar_buffer() argument
160 offset0, stride0, offset1, stride1, offset2, stride2); in drm_create_planar_buffer()
169 int32_t offset1, int32_t stride1, in drm_create_prime_buffer() argument
173 offset0, stride0, offset1, stride1, offset2, stride2); in drm_create_prime_buffer()

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