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Searched refs:op4 (Results 1 – 25 of 85) sorted by relevance

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/external/llvm-project/llvm/test/Bitcode/
Dpr18704.ll25 ; <STRUCT_NAME abbrevid=7 op0=115 op1=116 op2=114 op3=117 op4=99 op5=116 op6=46 op7=112 op8=97 o…
41 ; <GLOBALVAR abbrevid=4 op0=2 op1=0 op2=0 op3=0 op4=0 op5=0/>
42 ; <GLOBALVAR abbrevid=4 op0=2 op1=0 op2=0 op3=0 op4=0 op5=0/>
43 ; <GLOBALVAR abbrevid=4 op0=2 op1=0 op2=0 op3=0 op4=0 op5=0/>
44 ; <GLOBALVAR op0=4 op1=1 op2=25 op3=9 op4=0 op5=0 op6=0 op7=0 op8=1 op9=0/>
45 ; <GLOBALVAR op0=6 op1=1 op2=26 op3=9 op4=0 op5=0 op6=0 op7=0 op8=1 op9=0/>
46 ; <GLOBALVAR op0=8 op1=1 op2=27 op3=9 op4=0 op5=0 op6=0 op7=0 op8=1 op9=0/>
47 ; <GLOBALVAR abbrevid=4 op0=10 op1=1 op2=28 op3=3 op4=0 op5=0/>
48 ; <GLOBALVAR abbrevid=4 op0=6 op1=1 op2=26 op3=3 op4=0 op5=0/>
49 ; <GLOBALVAR abbrevid=4 op0=13 op1=1 op2=31 op3=3 op4=0 op5=0/>
[all …]
Dmodule_hash.ll3 ; MOD1: <HASH op0={{[0-9]*}} op1={{[0-9]*}} op2={{[0-9]*}} op3={{[0-9]*}} op4={{[0-9]*}} (match)/>
5 ; MOD2: <HASH op0={{[0-9]*}} op1={{[0-9]*}} op2={{[0-9]*}} op3={{[0-9]*}} op4={{[0-9]*}} (match)/>
24 …9]*]] op1=[[HASH1_2:[0-9]*]] op2=[[HASH1_3:[0-9]*]] op3=[[HASH1_4:[0-9]*]] op4=[[HASH1_5:[0-9]*]]/>
25 …9]*]] op1=[[HASH2_2:[0-9]*]] op2=[[HASH2_3:[0-9]*]] op3=[[HASH2_4:[0-9]*]] op4=[[HASH2_5:[0-9]*]]/>
28 …brevid={{[0-9]*}} op0=[[HASH1_1]] op1=[[HASH1_2]] op2=[[HASH1_3]] op3=[[HASH1_4]] op4=[[HASH1_5]]/>
29 …brevid={{[0-9]*}} op0=[[HASH2_1]] op1=[[HASH2_2]] op2=[[HASH2_3]] op3=[[HASH2_4]] op4=[[HASH2_5]]/>
Dthinlto-function-summary-refgraph.ll43 ; op0=main op4=func op5=func
44 ; CHECK-DAG: <PERMODULE {{.*}} op0=11 op1=0 {{.*}} op4=1 op5=0 op6=0 op7=2 op8=2/>
46 ; op0=W op4=globalvar op5=func3
47 ; CHECK-DAG: <PERMODULE {{.*}} op0=6 op1=5 {{.*}} op4=1 op5=0 op6=0 op7=1 op8=5/>
50 ; op0=X op4=foo op5=foo
51 ; CHECK-DAG: <PERMODULE {{.*}} op0=7 op1=1 {{.*}} op4=1 op5=0 op6=0 op7=4 op8=4/>
55 ; op0=Y op4=func2
56 ; CHECK-DAG: <PERMODULE {{.*}} op0=8 op1=72 {{.*}} op4=0 op5=0 op6=0 op7=3/>
60 ; op0=Z op4=func2
61 ; CHECK-DAG: <PERMODULE {{.*}} op0=9 op1=3 {{.*}} op4=0 op5=0 op6=0 op7=3/>
Dthinlto-function-summary-paramaccess.ll137 ; BC-NEXT: <PARAM_ACCESS op0=0 op1=0 op2=2 op3=0 op4=1 op5=0 op6=8 op7=0/>
151 ; BC-NEXT: <PARAM_ACCESS op0=0 op1=0 op2=2 op3=0 op4=2 op5=0 op6=8 op7=0/>
164 ; BC-NEXT: <PARAM_ACCESS op0=0 op1=0 op2=0 op3=1 op4=0 op5=[[CALLEE:-?[0-9]+]] op6=0 op7=2/>
176 ; BC-NEXT: <PARAM_ACCESS op0=0 op1=0 op2=0 op3=1 op4=0 op5=[[CALLEE]] op6=4 op7=6/>
189 ; BC-NEXT: <PARAM_ACCESS op0=0 op1=0 op2=0 op3=1 op4=0 op5=[[CALLEE]] op6=1431 op7=1429/>
214 ; BC-NEXT: <PARAM_ACCESS op0=0 op1=0 op2=0 op3=1 op4=0 op5=[[CALLEE]] op6=1431 op7=250/>
234 ; BC-NEXT: <PARAM_ACCESS op0=0 op1=0 op2=0 op3=2 op4=0 op5=[[CALLEE]] op6=1431 op7=250 op8=1 op9=[[…
312 ; COMBINED-NEXT: <PARAM_ACCESS op0=0 op1=0 op2=0 op3=1 op4=0 op5=[[CALLEE2]] op6=4 op7=6/>
316 ; COMBINED-NEXT: <PARAM_ACCESS op0=0 op1=0 op2=2 op3=0 op4=2 op5=0 op6=8 op7=0/>
321 ; COMBINED-NEXT: <PARAM_ACCESS op0=0 op1=0 op2=2 op3=0 op4=1 op5=0 op6=8 op7=0/>
[all …]
/external/llvm/test/Bitcode/
Dpr18704.ll25 ; <STRUCT_NAME abbrevid=7 op0=115 op1=116 op2=114 op3=117 op4=99 op5=116 op6=46 op7=112 op8=97 o…
41 ; <GLOBALVAR abbrevid=4 op0=2 op1=0 op2=0 op3=0 op4=0 op5=0/>
42 ; <GLOBALVAR abbrevid=4 op0=2 op1=0 op2=0 op3=0 op4=0 op5=0/>
43 ; <GLOBALVAR abbrevid=4 op0=2 op1=0 op2=0 op3=0 op4=0 op5=0/>
44 ; <GLOBALVAR op0=4 op1=1 op2=25 op3=9 op4=0 op5=0 op6=0 op7=0 op8=1 op9=0/>
45 ; <GLOBALVAR op0=6 op1=1 op2=26 op3=9 op4=0 op5=0 op6=0 op7=0 op8=1 op9=0/>
46 ; <GLOBALVAR op0=8 op1=1 op2=27 op3=9 op4=0 op5=0 op6=0 op7=0 op8=1 op9=0/>
47 ; <GLOBALVAR abbrevid=4 op0=10 op1=1 op2=28 op3=3 op4=0 op5=0/>
48 ; <GLOBALVAR abbrevid=4 op0=6 op1=1 op2=26 op3=3 op4=0 op5=0/>
49 ; <GLOBALVAR abbrevid=4 op0=13 op1=1 op2=31 op3=3 op4=0 op5=0/>
[all …]
Dmodule_hash.ll3 ; MOD1: <HASH op0={{[0-9]*}} op1={{[0-9]*}} op2={{[0-9]*}} op3={{[0-9]*}} op4={{[0-9]*}} (match)/>
5 ; MOD2: <HASH op0={{[0-9]*}} op1={{[0-9]*}} op2={{[0-9]*}} op3={{[0-9]*}} op4={{[0-9]*}} (match)/>
24 …9]*]] op1=[[HASH1_2:[0-9]*]] op2=[[HASH1_3:[0-9]*]] op3=[[HASH1_4:[0-9]*]] op4=[[HASH1_5:[0-9]*]] …
25 …9]*]] op1=[[HASH2_2:[0-9]*]] op2=[[HASH2_3:[0-9]*]] op3=[[HASH2_4:[0-9]*]] op4=[[HASH2_5:[0-9]*]] …
28 …brevid={{[0-9]*}} op0=[[HASH1_1]] op1=[[HASH1_2]] op2=[[HASH1_3]] op3=[[HASH1_4]] op4=[[HASH1_5]]/>
29 …brevid={{[0-9]*}} op0=[[HASH2_1]] op1=[[HASH2_2]] op2=[[HASH2_3]] op3=[[HASH2_4]] op4=[[HASH2_5]]/>
Dthinlto-function-summary-refgraph.ll14 ; CHECK-DAG: <PERMODULE {{.*}} op0=[[MAINID:[0-9]+]] op1=0 {{.*}} op3=1 op4=[[FUNCID:[0-9]+]] op…
16 ; CHECK-DAG: <PERMODULE {{.*}} op0=[[WID:[0-9]+]] op1=5 {{.*}} op3=1 op4=[[GLOBALVARID:[0-9]+]] …
19 ; CHECK-DAG: <PERMODULE {{.*}} op0=[[XID:[0-9]+]] op1=1 {{.*}} op3=1 op4=[[FOOID:[0-9]+]] op5=[[…
23 ; CHECK-DAG: <PERMODULE {{.*}} op0=[[YID:[0-9]+]] op1=8 {{.*}} op3=0 op4=[[FUNC2ID:[0-9]+]] op5=…
27 ; CHECK-DAG: <PERMODULE {{.*}} op0=[[ZID:[0-9]+]] op1=3 {{.*}} op3=0 op4=[[FUNC2ID:[0-9]+]] op5=…
/external/llvm/test/Transforms/SLPVectorizer/X86/
Dpropagate_ir_flags.ll26 %op4 = lshr exact i32 %load4, 1
31 store i32 %op4, i32* %idx4, align 4
52 %op4 = lshr exact i32 %load4, 1
57 store i32 %op4, i32* %idx4, align 4
78 %op4 = add nsw i32 %load4, 1
83 store i32 %op4, i32* %idx4, align 4
104 %op4 = add i32 %load4, 1
109 store i32 %op4, i32* %idx4, align 4
130 %op4 = add nuw i32 %load4, 1
135 store i32 %op4, i32* %idx4, align 4
[all …]
/external/tensorflow/tensorflow/java/src/test/java/org/tensorflow/
DGraphOperationTest.java62 GraphOperation op4 = g.operation("op1"); in operationEquality() local
67 assertEquals(op1, op4); in operationEquality()
68 assertEquals(op1.hashCode(), op4.hashCode()); in operationEquality()
69 assertEquals(op3, op4); in operationEquality()
71 assertNotEquals(op2, op4); in operationEquality()
85 GraphOperation op4 = g.operation("op1"); in operationCollection() local
87 ops.addAll(Arrays.asList(op1, op2, op3, op4)); in operationCollection()
92 assertTrue(ops.contains(op4)); in operationCollection()
/external/llvm-project/llvm/lib/Target/ARM/
DARMInstrNEON.td2449 bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr,
2451 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, (outs DPR:$Vd),
2455 bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr,
2457 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, (outs QPR:$Vd),
2463 bits<2> op17_16, bits<5> op11_7, bit op4,
2466 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, (outs DPR:$Vd),
2470 bits<2> op17_16, bits<5> op11_7, bit op4,
2473 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, (outs QPR:$Vd),
2513 bits<2> op17_16, bits<5> op11_7, bit op6, bit op4,
2516 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, op6, op4, (outs DPR:$Vd),
[all …]
DARMInstrFormats.td1797 class ADbI<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops,
1819 let Inst{4} = op4;
1917 class ASbI<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops, dag iops,
1938 let Inst{4} = op4;
1972 class ASbIn<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops,
1975 : ASbI<opcod1, opcod2, op6, op4, oops, iops, itin, opc, asm, pattern> {
2050 class AHbI<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops, dag iops,
2072 let Inst{4} = op4;
2122 class AVConv1XI<bits<5> op1, bits<2> op2, bits<4> op3, bits<4> op4, bit op5,
2125 : AVConv1I<op1, op2, op3, op4, oops, iops, itin, opc, asm, pattern> {
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrNEON.td2518 bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr,
2520 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, (outs DPR:$Vd),
2524 bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr,
2526 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, (outs QPR:$Vd),
2532 bits<2> op17_16, bits<5> op11_7, bit op4,
2535 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, (outs DPR:$Vd),
2539 bits<2> op17_16, bits<5> op11_7, bit op4,
2542 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, (outs QPR:$Vd),
2582 bits<2> op17_16, bits<5> op11_7, bit op6, bit op4,
2585 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, op6, op4, (outs DPR:$Vd),
[all …]
DARMInstrFormats.td1788 class ADbI<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops,
1810 let Inst{4} = op4;
1908 class ASbI<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops, dag iops,
1929 let Inst{4} = op4;
1963 class ASbIn<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops,
1966 : ASbI<opcod1, opcod2, op6, op4, oops, iops, itin, opc, asm, pattern> {
2041 class AHbI<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops, dag iops,
2063 let Inst{4} = op4;
2113 class AVConv1XI<bits<5> op1, bits<2> op2, bits<4> op3, bits<4> op4, bit op5,
2116 : AVConv1I<op1, op2, op3, op4, oops, iops, itin, opc, asm, pattern> {
[all …]
/external/llvm/lib/Target/ARM/
DARMInstrNEON.td2434 bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr,
2436 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, (outs DPR:$Vd),
2440 bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr,
2442 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, (outs QPR:$Vd),
2448 bits<2> op17_16, bits<5> op11_7, bit op4,
2451 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, (outs DPR:$Vd),
2455 bits<2> op17_16, bits<5> op11_7, bit op4,
2458 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, (outs QPR:$Vd),
2498 bits<2> op17_16, bits<5> op11_7, bit op6, bit op4,
2501 : N2V<op24_23, op21_20, op19_18, op17_16, op11_7, op6, op4, (outs DPR:$Vd),
[all …]
/external/llvm-project/llvm/test/ThinLTO/X86/
Dcfi-icall-only-defuse.ll43 ; FOOBAZ: <CFI_FUNCTION_DEFS op0=0 op1=3 op2=3 op3=3 op4=6 op5=3/>
44 ; FOOBAZ: <TYPE_ID op0=9 op1=2 op2=4 op3=7 op4=0 op5=0 op6=0 op7=0/>
51 ; BARQUX: <CFI_FUNCTION_DEFS op0=0 op1=3 op2=3 op3=3 op4=6 op5=3/>
52 ; BARQUX: <TYPE_ID op0=9 op1=2 op2=4 op3=7 op4=0 op5=0 op6=0 op7=0/>
/external/one-true-awk/
Dawkgram.y397 { $$ = op4(SPLIT, $3, makearr($5), $7, (Node*)STRING); }
399 { $$ = op4(SPLIT, $3, makearr($5), (Node*)makedfa($7, 1), (Node *)REGEXPR); }
401 { $$ = op4(SPLIT, $3, makearr($5), NIL, (Node*)STRING); } /* default */
405 { $$ = op4($1, NIL, (Node*)makedfa($3, 1), $5, rectonode()); }
408 $$ = op4($1, NIL, (Node*)makedfa(strnode($3), 1), $5, rectonode());
410 $$ = op4($1, (Node *)1, $3, $5, rectonode()); }
412 { $$ = op4($1, NIL, (Node*)makedfa($3, 1), $5, $7); }
415 $$ = op4($1, NIL, (Node*)makedfa(strnode($3), 1), $5, $7);
417 $$ = op4($1, (Node *)1, $3, $5, $7); }
/external/llvm-project/llvm/test/Transforms/SLPVectorizer/X86/
Dpropagate_ir_flags.ll37 %op4 = lshr exact i32 %load4, 1
42 store i32 %op4, i32* %idx4, align 4
73 %op4 = lshr exact i32 %load4, 1
78 store i32 %op4, i32* %idx4, align 4
109 %op4 = add nsw i32 %load4, 1
114 store i32 %op4, i32* %idx4, align 4
145 %op4 = add i32 %load4, 1
150 store i32 %op4, i32* %idx4, align 4
181 %op4 = add nuw i32 %load4, 1
186 store i32 %op4, i32* %idx4, align 4
[all …]
/external/llvm/test/FileCheck/
Dsimple-var-capture.txt9 op4 r30, r18, r21
11 ; CHECK-NEXT: op4 {{r[0-9]+}}, [[REGa]], [[REGb]]
/external/llvm-project/llvm/test/FileCheck/
Dsimple-var-capture.txt9 op4 r30, r18, r21
11 ; CHECK-NEXT: op4 {{r[0-9]+}}, [[REGa]], [[REGb]]
/external/zstd/lib/decompress/
Dhuf_decompress.c385 BYTE* op4 = opStart4; in HUF_decompress4X1_usingDTable_internal_body() local
397 for ( ; (endSignal) & (op4 < olimit) ; ) { in HUF_decompress4X1_usingDTable_internal_body()
401 HUF_DECODE_SYMBOLX1_2(op4, &bitD4); in HUF_decompress4X1_usingDTable_internal_body()
405 HUF_DECODE_SYMBOLX1_1(op4, &bitD4); in HUF_decompress4X1_usingDTable_internal_body()
409 HUF_DECODE_SYMBOLX1_2(op4, &bitD4); in HUF_decompress4X1_usingDTable_internal_body()
413 HUF_DECODE_SYMBOLX1_0(op4, &bitD4); in HUF_decompress4X1_usingDTable_internal_body()
432 HUF_decodeStreamX1(op4, &bitD4, oend, dt, dtLog); in HUF_decompress4X1_usingDTable_internal_body()
837 BYTE* op4 = opStart4; in HUF_decompress4X2_usingDTable_internal_body() local
849 for ( ; (endSignal) & (op4 < olimit); ) { in HUF_decompress4X2_usingDTable_internal_body()
865 HUF_DECODE_SYMBOLX2_2(op4, &bitD4); in HUF_decompress4X2_usingDTable_internal_body()
[all …]
/external/libvpx/libvpx/vpx_dsp/arm/
Dloopfilter_neon.c314 uint8x8_t *op4, uint8x8_t *op3, uint8x8_t *op2, uint8x8_t *op1, in apply_15_tap_filter_8() argument
331 *op4 = apply_15_tap_filter_8_kernel(flat2, p7, p5, p4, q2, p4, &sum); in apply_15_tap_filter_8()
352 uint8x16_t *op4, uint8x16_t *op3, uint8x16_t *op2, uint8x16_t *op1, in apply_15_tap_filter_16() argument
382 *op4 = apply_15_tap_filter_16_kernel(flat2, p7, p5, p4, q2, p4, &sum0, &sum1); in apply_15_tap_filter_16()
488 uint8x##w##_t *op4, uint8x##w##_t *op3, uint8x##w##_t *op2, \
505 q2, q3, q4, q5, q6, q7, op6, op5, op4, op3, \
954 uint8x##w##_t *op4, uint8x##w##_t *op3, uint8x##w##_t *op2, \
970 op5, op4, op3, op2, op1, op0, oq0, oq1, oq2, oq3, oq4, oq5, \
981 op5, op4, op3, op2, op1, op0, oq0, oq1, oq2, oq3, oq4, oq5, oq6; in vpx_lpf_horizontal_16_neon() local
987 q2, q3, q4, q5, q6, q7, &op6, &op5, &op4, &op3, &op2, &op1, in vpx_lpf_horizontal_16_neon()
[all …]
Dhighbd_loopfilter_neon.c198 uint16x8_t *op4, uint16x8_t *op3, uint16x8_t *op2, uint16x8_t *op1, in apply_15_tap_filter() argument
215 *op4 = apply_15_tap_filter_kernel(flat2, p7, p5, p4, q2, p4, &sum); in apply_15_tap_filter()
321 const uint16x8_t q7, uint16x8_t *op6, uint16x8_t *op5, uint16x8_t *op4, in filter16() argument
338 q4, q5, q6, q7, op6, op5, op4, op3, op2, op1, op0, in filter16()
670 q3, q4, q5, q6, q7, op6, op5, op4, op3, op2, op1, op0, oq0, oq1, oq2, oq3, in lpf_horizontal_16_kernel() local
681 p3, p2, p1, p0, q0, q1, q2, q3, q4, q5, q6, q7, &op6, &op5, &op4, in lpf_horizontal_16_kernel()
684 store_8x14(s, p, op6, op5, op4, op3, op2, op1, op0, oq0, oq1, oq2, oq3, oq4, in lpf_horizontal_16_kernel()
693 q3, q4, q5, q6, q7, op6, op5, op4, op3, op2, op1, op0, oq0, oq1, oq2, oq3, in lpf_vertical_16_kernel() local
710 p3, p2, p1, p0, q0, q1, q2, q3, q4, q5, q6, q7, &op6, &op5, &op4, in lpf_vertical_16_kernel()
715 store_7x8(s - 3, p, op6, op5, op4, op3, op2, op1, op0); in lpf_vertical_16_kernel()
/external/tpm2-tss/src/tss2-mu/
Dtpmt-types.c230 m4, sel4, op4, fn4) \ argument
261 ret = fn4(op4 src->m4, src->sel4, buffer, buffer_size, &local_offset); \
311 m4, op4, fn4, m5, op5, fn5) \ argument
342 ret = fn4(op4 src->m4, buffer, buffer_size, &local_offset); \
397 m4, op4, fn4, m5, op5, sel5, fn5, m6, op6, sel6, fn6) \ argument
428 ret = fn4(op4 src->m4, buffer, buffer_size, &local_offset); \
Dtpms-types.c423 #define TPMS_MARSHAL_4(type, m1, op1, fn1, m2, op2, fn2, m3, op3, fn3, m4, op4, fn4) \ argument
457 ret = fn4(op4 src->m4, buffer, buffer_size, &local_offset); \
506 m4, op4, fn4, m5, op5, fn5) \ argument
540 ret = fn4(op4 src->m4, buffer, buffer_size, &local_offset); \
597 m4, op4, fn4, m5, op5, fn5, m6, op6, fn6, m7, op7, fn7) \ argument
631 ret = fn4(op4 src->m4, buffer, buffer_size, &local_offset); \
704 m4, op4, fn4, m5, op5, fn5, m6, op6, fn6, m7, op7, fn7) \ argument
738 ret = fn4(op4 src->m4, buffer, buffer_size, &local_offset); \
811 m4, op4, fn4, m5, op5, fn5, m6, op6, fn6, m7, op7, fn7, \ argument
846 ret = fn4(op4 src->m4, buffer, buffer_size, &local_offset); \
/external/zstd/lib/legacy/
Dzstd_v02.c1758 BYTE* op4 = opStart4; in HUF_decompress4X2_usingDTable() local
1774 for ( ; (endSignal==BIT_DStream_unfinished) && (op4<(oend-7)) ; ) in HUF_decompress4X2_usingDTable()
1779 HUF_DECODE_SYMBOLX2_2(op4, &bitD4); in HUF_decompress4X2_usingDTable()
1783 HUF_DECODE_SYMBOLX2_1(op4, &bitD4); in HUF_decompress4X2_usingDTable()
1787 HUF_DECODE_SYMBOLX2_2(op4, &bitD4); in HUF_decompress4X2_usingDTable()
1791 HUF_DECODE_SYMBOLX2_0(op4, &bitD4); in HUF_decompress4X2_usingDTable()
1806 HUF_decodeStreamX2(op4, &bitD4, oend, dt, dtLog); in HUF_decompress4X2_usingDTable()
2120 BYTE* op4 = opStart4; in HUF_decompress4X4_usingDTable() local
2136 for ( ; (endSignal==BIT_DStream_unfinished) && (op4<(oend-7)) ; ) in HUF_decompress4X4_usingDTable()
2141 HUF_DECODE_SYMBOLX4_2(op4, &bitD4); in HUF_decompress4X4_usingDTable()
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