Searched refs:printMask (Results 1 – 6 of 6) sorted by relevance
/external/OpenCL-CTS/test_conformance/half/ |
D | Test_roundTrip.cpp | 165 uint64_t printMask = (lastCase >> 4) - 1; in test_roundTrip() local 292 if( ((i+blockCount) & ~printMask) == (i+blockCount) ) in test_roundTrip()
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D | Test_vLoadHalf.cpp | 444 uint64_t printMask = (lastCase >> 4) - 1; in Test_vLoadHalf_private() local 565 if( ((i+blockCount) & ~printMask) == (i+blockCount) ) in Test_vLoadHalf_private()
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D | Test_vStoreHalf.cpp | 691 uint64_t printMask = (lastCase >> 4) - 1; in Test_vStoreHalf_private() local 837 if( ((i+blockCount) & ~printMask) == (i+blockCount) ) in Test_vStoreHalf_private() 1288 uint64_t printMask = (lastCase >> 4) - 1; in Test_vStoreaHalf_private() local 1434 if( ((i+blockCount) & ~printMask) == (i+blockCount) ) { in Test_vStoreaHalf_private()
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/external/llvm-project/llvm/utils/TableGen/ |
D | RegisterInfoEmitter.cpp | 680 static void printMask(raw_ostream &OS, LaneBitmask Val) { in printMask() function 818 printMask(OS << "{ ", P.Mask); in emitComposeSubRegIndexLaneMask() 989 LaneMaskSeqs.emit(OS, printMask, "LaneBitmask::getAll()"); in runMCDesc() 1271 printMask(OS << " ", Idx.LaneMask); in runTargetDesc() 1418 printMask(OS, RC.LaneMask); in runTargetDesc() 1526 printMask(OS, RegBank.CoveringLanes); in runTargetDesc()
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/external/capstone/contrib/sysz_update/ |
D | 0001-capstone-generate-GenRegisterInfo.inc.patch | 153 LaneMaskSeqs.emit(OS, printMask, "LaneBitmask::getAll()");
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/external/llvm/utils/TableGen/ |
D | RegisterInfoEmitter.cpp | 621 static void printMask(raw_ostream &OS, unsigned Val) { in printMask() function 927 LaneMaskSeqs.emit(OS, printMask, "~0u"); in runMCDesc()
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