Home
last modified time | relevance | path

Searched refs:radeon_opt_set_context_reg (Results 1 – 6 of 6) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state_binning.c421 radeon_opt_set_context_reg( in si_emit_dpbb_disable()
429 radeon_opt_set_context_reg( in si_emit_dpbb_disable()
441 radeon_opt_set_context_reg( in si_emit_dpbb_disable()
530 radeon_opt_set_context_reg( in si_emit_dpbb_state()
546 radeon_opt_set_context_reg( in si_emit_dpbb_state()
Dsi_state_shaders.c568 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_es()
573 radeon_opt_set_context_reg(sctx, R_028B6C_VGT_TF_PARAM, SI_TRACKED_VGT_TF_PARAM, in si_emit_shader_es()
577 radeon_opt_set_context_reg(sctx, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, in si_emit_shader_es()
739 radeon_opt_set_context_reg(sctx, R_028AB0_VGT_GSVS_RING_ITEMSIZE, in si_emit_shader_gs()
744 radeon_opt_set_context_reg(sctx, R_028B38_VGT_GS_MAX_VERT_OUT, SI_TRACKED_VGT_GS_MAX_VERT_OUT, in si_emit_shader_gs()
755 radeon_opt_set_context_reg(sctx, R_028B90_VGT_GS_INSTANCE_CNT, SI_TRACKED_VGT_GS_INSTANCE_CNT, in si_emit_shader_gs()
760 radeon_opt_set_context_reg(sctx, R_028A44_VGT_GS_ONCHIP_CNTL, SI_TRACKED_VGT_GS_ONCHIP_CNTL, in si_emit_shader_gs()
763 radeon_opt_set_context_reg(sctx, R_028A94_VGT_GS_MAX_PRIMS_PER_SUBGROUP, in si_emit_shader_gs()
767 radeon_opt_set_context_reg(sctx, R_028AAC_VGT_ESGS_RING_ITEMSIZE, in si_emit_shader_gs()
772 radeon_opt_set_context_reg(sctx, R_028B6C_VGT_TF_PARAM, SI_TRACKED_VGT_TF_PARAM, in si_emit_shader_gs()
[all …]
Dsi_state_viewport.c357 radeon_opt_set_context_reg(ctx, R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, in si_emit_guardband()
361 radeon_opt_set_context_reg( in si_emit_guardband()
634 radeon_opt_set_context_reg(sctx, R_02820C_PA_SC_CLIPRECT_RULE, SI_TRACKED_PA_SC_CLIPRECT_RULE, in si_emit_window_rectangles()
Dsi_build_pm4.h168 static inline void radeon_opt_set_context_reg(struct si_context *sctx, unsigned offset, in radeon_opt_set_context_reg() function
Dsi_state.c99 radeon_opt_set_context_reg(sctx, R_028238_CB_TARGET_MASK, SI_TRACKED_CB_TARGET_MASK, in si_emit_cb_render_state()
111 radeon_opt_set_context_reg( in si_emit_cb_render_state()
763 radeon_opt_set_context_reg(sctx, R_02881C_PA_CL_VS_OUT_CNTL, SI_TRACKED_PA_CL_VS_OUT_CNTL__CL, in si_emit_clip_regs()
766 radeon_opt_set_context_reg(sctx, R_028810_PA_CL_CLIP_CNTL, SI_TRACKED_PA_CL_CLIP_CNTL, in si_emit_clip_regs()
1389 radeon_opt_set_context_reg( in si_emit_db_render_state()
1411 radeon_opt_set_context_reg(sctx, R_02880C_DB_SHADER_CONTROL, SI_TRACKED_DB_SHADER_CONTROL, in si_emit_db_render_state()
3292 radeon_opt_set_context_reg(sctx, R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL, in si_emit_msaa_sample_locs()
3300 radeon_opt_set_context_reg( in si_emit_msaa_sample_locs()
3487 radeon_opt_set_context_reg(sctx, R_028804_DB_EQAA, SI_TRACKED_DB_EQAA, db_eqaa); in si_emit_msaa_config()
3489 radeon_opt_set_context_reg(sctx, R_028A4C_PA_SC_MODE_CNTL_1, SI_TRACKED_PA_SC_MODE_CNTL_1, in si_emit_msaa_config()
Dsi_state_draw.c577 radeon_opt_set_context_reg(sctx, R_028A0C_PA_SC_LINE_STIPPLE, SI_TRACKED_PA_SC_LINE_STIPPLE, in si_emit_rasterizer_prim_state()