/external/mesa3d/src/gallium/drivers/r300/compiler/ |
D | radeon_compiler.c | 121 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in rc_calculate_inputs_outputs() 147 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in rc_move_input() 179 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in rc_move_output() 202 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in rc_copy_output() 302 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in rc_transform_fragment_wpos() 346 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in rc_transform_fragment_face() 379 info = rc_get_opcode_info(tmp->U.I.Opcode); in rc_get_stats() 403 info = rc_get_opcode_info(tmp->U.P.RGB.Opcode); in rc_get_stats()
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D | radeon_compiler_util.c | 193 const struct rc_opcode_info * info = rc_get_opcode_info(sub->Opcode); in rc_pair_rewrite_writemask() 227 const struct rc_opcode_info * info = rc_get_opcode_info(sub->Opcode); in rc_normal_rewrite_writemask() 423 rc_get_opcode_info(inst->U.I.Opcode); in rc_inst_can_use_presub() 560 const struct rc_opcode_info * info = rc_get_opcode_info(sub->Opcode); in get_source_readmask() 618 info = rc_get_opcode_info(inst->U.I.Opcode); in rc_get_flow_control_inst() 620 info = rc_get_opcode_info(inst->U.P.RGB.Opcode); in rc_get_flow_control_inst()
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D | radeon_dataflow_deadcode.c | 154 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in update_instruction() 233 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in rc_dataflow_deadcode() 244 opcode = rc_get_opcode_info(ptr->U.I.Opcode); in rc_dataflow_deadcode() 316 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in rc_dataflow_deadcode()
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D | r3xx_vertprog.c | 382 const struct rc_opcode_info *info = rc_get_opcode_info(vpi->Opcode); in translate_vertex_program() 576 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in allocate_temporary_registers() 599 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in allocate_temporary_registers() 634 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in allocate_temporary_registers() 675 const struct rc_opcode_info *opcode = rc_get_opcode_info(inst->U.I.Opcode); in transform_nonnative_modifiers() 714 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in transform_source_conflicts() 820 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in transform_negative_addressing() 835 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in rc_emulate_negative_addressing()
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D | radeon_pair_translate.c | 175 opcode = rc_get_opcode_info(inst->Opcode); in set_pair_instruction() 331 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->Opcode); in check_opcode_support() 367 opcode = rc_get_opcode_info(inst->U.I.Opcode); in rc_pair_translate()
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D | radeon_program_pair.c | 176 rc_get_opcode_info(pair->Alpha.Opcode); in rc_pair_foreach_source_that_alpha_reads() 191 rc_get_opcode_info(pair->RGB.Opcode); in rc_pair_foreach_source_that_rgb_reads()
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D | r500_fragprog_emit.c | 103 error("translate_rgb_op: unknown opcode %s\n", rc_get_opcode_info(opcode)->Name); in translate_rgb_op() 128 error("translate_alpha_op: unknown opcode %s\n", rc_get_opcode_info(opcode)->Name); in translate_alpha_op() 412 error("emit_tex can't handle opcode %s\n", rc_get_opcode_info(inst->Opcode)->Name); in emit_tex() 619 …rc_error(s->C, "%s: unknown opcode %s\n", __FUNCTION__, rc_get_opcode_info(inst->U.I.Opcode)->Name… in emit_flowcontrol() 641 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in r500BuildFragmentProgramHwCode()
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D | radeon_opcodes.h | 273 static inline const struct rc_opcode_info * rc_get_opcode_info(rc_opcode opcode) in rc_get_opcode_info() function
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D | radeon_pair_dead_sources.c | 50 const struct rc_opcode_info * info = rc_get_opcode_info(sub->Opcode); in mark_used()
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D | r300_fragprog_emit.c | 114 error("translate_rgb_opcode: Unknown opcode %s", rc_get_opcode_info(opcode)->Name); in translate_rgb_opcode() 136 error("translate_rgb_opcode: Unknown opcode %s", rc_get_opcode_info(opcode)->Name); in translate_alpha_opcode() 444 error("Unknown texture opcode %s", rc_get_opcode_info(inst->U.I.Opcode)->Name); in emit_tex()
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D | radeon_program_print.c | 282 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in rc_print_normal_instruction() 383 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->RGB.Opcode); in rc_print_pair_instruction() 422 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->Alpha.Opcode); in rc_print_pair_instruction()
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D | radeon_optimize.c | 328 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in constant_folding() 416 opcode = rc_get_opcode_info(inst->U.I.Opcode); in constant_folding() 489 rc_get_opcode_info(reader.Inst->U.I.Opcode); in presub_helper() 533 const struct rc_opcode_info * info = rc_get_opcode_info(inst->U.I.Opcode); in is_presub_candidate() 811 const struct rc_opcode_info * info = rc_get_opcode_info( in peephole_mul_omod()
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D | radeon_inline_literals.c | 94 rc_get_opcode_info(inst->U.I.Opcode); in rc_inline_literals()
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D | radeon_dataflow.c | 139 const struct rc_opcode_info * info = rc_get_opcode_info(sub->Opcode); in pair_sub_for_all_args() 189 rc_get_opcode_info(inst->U.I.Opcode); in rc_for_all_reads_src() 259 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->Opcode); in writes_normal() 344 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->Opcode); in remap_normal_instruction()
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D | r3xx_fragprog.c | 59 const struct rc_opcode_info *info = rc_get_opcode_info(inst->Opcode); in rc_rewrite_depth_out()
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D | radeon_pair_schedule.c | 529 info = rc_get_opcode_info(dst_full->RGB.Opcode); in merge_presub_sources() 625 opcode = rc_get_opcode_info(alpha->Alpha.Opcode); in destructive_merge_instructions() 888 rc_get_opcode_info(pair_inst->RGB.Opcode); in convert_rgb_to_alpha() 1264 rc_get_opcode_info(inst->U.I.Opcode); in schedule_block() 1316 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in is_controlflow()
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D | radeon_opcodes.c | 533 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); in rc_compute_sources_for_writemask()
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D | radeon_dataflow_swizzles.c | 430 rc_get_opcode_info(inst->U.I.Opcode); in rc_dataflow_swizzles()
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D | radeon_emulate_branches.c | 276 opcode = rc_get_opcode_info(inst->U.I.Opcode); in fix_output_writes()
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D | r500_fragprog.c | 87 rc_get_opcode_info(inst->U.I.Opcode); in r500_transform_IF()
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D | radeon_emulate_loops.c | 136 opcode = rc_get_opcode_info(inst->U.I.Opcode); in get_incr_amount()
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D | radeon_program_alu.c | 199 const struct rc_opcode_info *info = rc_get_opcode_info(inst->U.I.Opcode); in is_dst_safe_to_reuse() 1291 const struct rc_opcode_info *info = rc_get_opcode_info(inst->U.I.Opcode); in rc_force_output_alpha_to_one()
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/external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
D | rc_test_helpers.c | 397 const struct rc_opcode_info * info = rc_get_opcode_info(i); in parse_rc_normal_instruction()
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