/external/libvpx/libvpx/vpx_dsp/mips/ |
D | idct16x16_msa.c | 17 v8i16 reg3, reg13, reg11, reg5, reg7, reg9, reg1, reg15; in vpx_idct16_1d_rows_msa() local 22 LD_SH8(input, 16, reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15); in vpx_idct16_1d_rows_msa() 26 TRANSPOSE8x8_SH_SH(reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15, reg8, in vpx_idct16_1d_rows_msa() 27 reg9, reg10, reg11, reg12, reg13, reg14, reg15); in vpx_idct16_1d_rows_msa() 49 DOTP_CONST_PAIR(reg5, reg11, cospi_22_64, cospi_10_64, reg5, reg11); in vpx_idct16_1d_rows_msa() 51 BUTTERFLY_4(loc0, loc1, reg11, reg5, reg13, reg3, reg11, reg5); in vpx_idct16_1d_rows_msa() 67 DOTP_CONST_PAIR((-reg5), (-reg11), cospi_8_64, cospi_24_64, reg5, reg11); in vpx_idct16_1d_rows_msa() 74 loc0 = reg7 + reg11; in vpx_idct16_1d_rows_msa() 75 reg11 = reg7 - reg11; in vpx_idct16_1d_rows_msa() 80 DOTP_CONST_PAIR(reg5, reg11, cospi_16_64, cospi_16_64, reg5, reg11); in vpx_idct16_1d_rows_msa() [all …]
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/external/libvpx/libvpx/third_party/libyuv/source/ |
D | scale_msa.cc | 767 v8i16 reg6, reg7, reg8, reg9, reg10, reg11; in ScaleRowDown34_0_Box_MSA() local 813 reg11 = (v8i16)__msa_dotp_u_h(vec11, const2); in ScaleRowDown34_0_Box_MSA() 825 reg11 = __msa_srar_h(reg11, shft2); in ScaleRowDown34_0_Box_MSA() 831 reg5 = reg5 * 3 + reg11; in ScaleRowDown34_0_Box_MSA() 861 v8i16 reg6, reg7, reg8, reg9, reg10, reg11; in ScaleRowDown34_1_Box_MSA() local 907 reg11 = (v8i16)__msa_dotp_u_h(vec11, const2); in ScaleRowDown34_1_Box_MSA() 919 reg11 = __msa_srar_h(reg11, shft2); in ScaleRowDown34_1_Box_MSA() 925 reg5 += reg11; in ScaleRowDown34_1_Box_MSA()
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/external/libyuv/files/source/ |
D | scale_msa.cc | 767 v8i16 reg6, reg7, reg8, reg9, reg10, reg11; in ScaleRowDown34_0_Box_MSA() local 813 reg11 = (v8i16)__msa_dotp_u_h(vec11, const2); in ScaleRowDown34_0_Box_MSA() 825 reg11 = __msa_srar_h(reg11, shft2); in ScaleRowDown34_0_Box_MSA() 831 reg5 = reg5 * 3 + reg11; in ScaleRowDown34_0_Box_MSA() 861 v8i16 reg6, reg7, reg8, reg9, reg10, reg11; in ScaleRowDown34_1_Box_MSA() local 907 reg11 = (v8i16)__msa_dotp_u_h(vec11, const2); in ScaleRowDown34_1_Box_MSA() 919 reg11 = __msa_srar_h(reg11, shft2); in ScaleRowDown34_1_Box_MSA() 925 reg5 += reg11; in ScaleRowDown34_1_Box_MSA()
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/external/arm-trusted-firmware/fdts/ |
D | stm32mp151.dtsi | 194 reg11: reg11 { label 195 regulator-name = "reg11"; 354 vdda1v1-supply = <®11>;
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/external/libaom/libaom/av1/common/arm/ |
D | convolve_neon.c | 1169 reg10, reg11, reg12, reg13, reg14; in av1_convolve_2d_sr_neon() local 1206 reg11 = vget_high_s16(vreinterpretq_s16_u16(vmovl_u8(t0))); in av1_convolve_2d_sr_neon() 1223 d4 = convolve8_4x4(reg4, reg5, reg6, reg7, reg8, reg9, reg10, reg11, in av1_convolve_2d_sr_neon() 1226 d5 = convolve8_4x4(reg5, reg6, reg7, reg8, reg9, reg10, reg11, reg12, in av1_convolve_2d_sr_neon() 1229 d6 = convolve8_4x4(reg6, reg7, reg8, reg9, reg10, reg11, reg12, reg13, in av1_convolve_2d_sr_neon() 1232 d7 = convolve8_4x4(reg7, reg8, reg9, reg10, reg11, reg12, reg13, reg14, in av1_convolve_2d_sr_neon() 1255 reg3 = reg11; in av1_convolve_2d_sr_neon()
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/external/elfutils/tests/ |
D | run-addrcfi.sh | 44 x87 reg11 (%st0): undefined 91 x87 reg11 (%st0): undefined 143 integer reg11 (%r11): undefined 209 integer reg11 (%r11): undefined 313 integer reg11 (r11): undefined 1335 integer reg11 (r11): undefined 2363 integer reg11 (r11): undefined 3389 integer reg11 (%r11): same_value 3466 integer reg11 (%r11): same_value 3544 integer reg11 (r11): same_value [all …]
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/external/llvm/include/llvm/Support/ |
D | Dwarf.def | 212 HANDLE_DW_OP(0x5b, reg11)
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/BinaryFormat/ |
D | Dwarf.def | 566 HANDLE_DW_OP(0x5b, reg11, 2, DWARF)
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/external/llvm-project/llvm/include/llvm/BinaryFormat/ |
D | Dwarf.def | 584 HANDLE_DW_OP(0x5b, reg11, 2, DWARF)
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