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Searched refs:reg14 (Results 1 – 10 of 10) sorted by relevance

/external/libvpx/libvpx/vpx_dsp/mips/
Didct16x16_msa.c16 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vpx_idct16_1d_rows_msa() local
22 LD_SH8(input, 16, reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15); in vpx_idct16_1d_rows_msa()
26 TRANSPOSE8x8_SH_SH(reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15, reg8, in vpx_idct16_1d_rows_msa()
27 reg9, reg10, reg11, reg12, reg13, reg14, reg15); in vpx_idct16_1d_rows_msa()
28 DOTP_CONST_PAIR(reg2, reg14, cospi_28_64, cospi_4_64, reg2, reg14); in vpx_idct16_1d_rows_msa()
30 BUTTERFLY_4(reg2, reg14, reg6, reg10, loc0, loc1, reg14, reg2); in vpx_idct16_1d_rows_msa()
31 DOTP_CONST_PAIR(reg14, reg2, cospi_16_64, cospi_16_64, loc2, loc3); in vpx_idct16_1d_rows_msa()
34 BUTTERFLY_4(reg8, reg0, reg4, reg12, reg2, reg6, reg10, reg14); in vpx_idct16_1d_rows_msa()
35 SUB4(reg2, loc1, reg14, loc0, reg6, loc3, reg10, loc2, reg0, reg12, reg4, in vpx_idct16_1d_rows_msa()
37 ADD4(reg2, loc1, reg14, loc0, reg6, loc3, reg10, loc2, reg2, reg14, reg6, in vpx_idct16_1d_rows_msa()
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/external/llvm-project/clang/test/CodeGen/
Dsparcv9-inline-asm.c6 register unsigned int reg14 asm("r14") = 2; in test_gcc_registers()
18 asm volatile("add %0,%1,%2" : : "r" (regO6), "r" (regSP), "r" (reg14)); in test_gcc_registers()
Dsparcv8-inline-asm.c16 register unsigned int reg14 asm("r14") = 2; in test_gcc_registers()
28 asm volatile("add %0,%1,%2" : : "r" (regO6), "r" (regSP), "r" (reg14)); in test_gcc_registers()
/external/elfutils/tests/
Drun-dwarfcfi.sh104 return address in reg14
Drun-addrcfi.sh47 x87 reg14 (%st3): undefined
94 x87 reg14 (%st3): undefined
146 integer reg14 (%r14): same_value
212 integer reg14 (%r14): same_value
316 integer reg14 (r14): same_value
1338 integer reg14 (r14): same_value
2366 integer reg14 (r14): same_value
3376 return address in reg14
3392 integer reg14 (%r14): same_value
3453 return address in reg14
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/external/libaom/libaom/av1/common/arm/
Dconvolve_neon.c1169 reg10, reg11, reg12, reg13, reg14; in av1_convolve_2d_sr_neon() local
1209 reg14 = vget_high_s16(vreinterpretq_s16_u16(vmovl_u8(t3))); in av1_convolve_2d_sr_neon()
1232 d7 = convolve8_4x4(reg7, reg8, reg9, reg10, reg11, reg12, reg13, reg14, in av1_convolve_2d_sr_neon()
1258 reg6 = reg14; in av1_convolve_2d_sr_neon()
/external/llvm/include/llvm/Support/
DDwarf.def215 HANDLE_DW_OP(0x5e, reg14)
/external/llvm-project/llvm/test/tools/llvm-readobj/ELF/
Dunwind.test157 # CHECK-NEXT: DW_CFA_offset: reg14 -32
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/BinaryFormat/
DDwarf.def569 HANDLE_DW_OP(0x5e, reg14, 2, DWARF)
/external/llvm-project/llvm/include/llvm/BinaryFormat/
DDwarf.def587 HANDLE_DW_OP(0x5e, reg14, 2, DWARF)