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Searched refs:regclass_end (Results 1 – 12 of 12) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DTargetRegisterInfo.h660 regclass_iterator regclass_end() const { return RegClassEnd; } in regclass_end() function
662 return make_range(regclass_begin(), regclass_end()); in regclasses()
666 return (unsigned)(regclass_end()-regclass_begin()); in getNumRegClasses()
/external/llvm-project/llvm/include/llvm/MC/
DMCRegisterInfo.h525 regclass_iterator regclass_end() const { return Classes+NumClasses; } in regclass_end() function
527 return make_range(regclass_begin(), regclass_end()); in regclasses()
531 return (unsigned)(regclass_end()-regclass_begin()); in getNumRegClasses()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCRegisterInfo.h525 regclass_iterator regclass_end() const { return Classes+NumClasses; } in regclass_end() function
527 return make_range(regclass_begin(), regclass_end()); in regclasses()
531 return (unsigned)(regclass_end()-regclass_begin()); in getNumRegClasses()
/external/llvm-project/llvm/include/llvm/CodeGen/
DTargetRegisterInfo.h679 regclass_iterator regclass_end() const { return RegClassEnd; } in regclass_end() function
681 return make_range(regclass_begin(), regclass_end()); in regclasses()
685 return (unsigned)(regclass_end()-regclass_begin()); in getNumRegClasses()
/external/llvm/lib/CodeGen/
DTargetRegisterInfo.cpp134 for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){ in getMinimalPhysRegClass()
165 E = regclass_end(); I != E; ++I) in getAllocatableSet()
DRegisterClassInfo.cpp160 RI = TRI->regclass_begin(), RE = TRI->regclass_end(); RI != RE; ++RI) { in computePSetLimit()
/external/llvm/lib/CodeGen/SelectionDAG/
DResourcePriorityQueue.cpp61 E = TRI->regclass_end(); in ResourcePriorityQueue()
368 E = TRI->regclass_end(); I != E; ++I) { in regPressureDelta()
375 E = TRI->regclass_end(); I != E; ++I) { in regPressureDelta()
DScheduleDAGRRList.cpp1663 E = TRI->regclass_end(); I != E; ++I) in RegReductionPQBase()
1931 E = TRI->regclass_end(); I != E; ++I) { in dumpRegPressure()
DTargetLowering.cpp2358 E = RI->regclass_end(); RCI != E; ++RCI) { in getRegForInlineAsmConstraint()
/external/llvm/include/llvm/MC/
DMCRegisterInfo.h409 regclass_iterator regclass_end() const { return Classes+NumClasses; } in regclass_end() function
412 return (unsigned)(regclass_end()-regclass_begin()); in getNumRegClasses()
/external/llvm/include/llvm/Target/
DTargetRegisterInfo.h641 regclass_iterator regclass_end() const { return RegClassEnd; } in regclass_end() function
644 return (unsigned)(regclass_end()-regclass_begin()); in getNumRegClasses()
/external/llvm/lib/Target/Hexagon/
DHexagonBlockRanges.cpp233 for (auto I = TRI.regclass_begin(), E = TRI.regclass_end(); I != E; ++I) { in HexagonBlockRanges()