| /external/crosvm/devices/src/usb/xhci/ |
| D | xhci_regs.rs | 247 reset_value: 0, in init_xhci_mmio_space_and_regs()
257 reset_value: 0x00000001, in init_xhci_mmio_space_and_regs()
276 reset_value: 0, in init_xhci_mmio_space_and_regs()
286 reset_value: 9, in init_xhci_mmio_space_and_regs()
296 reset_value: 0x0, in init_xhci_mmio_space_and_regs()
306 reset_value: 0, in init_xhci_mmio_space_and_regs()
318 reset_value: 0x000002A0, in init_xhci_mmio_space_and_regs()
330 reset_value: 0, in init_xhci_mmio_space_and_regs()
341 reset_value: 0, in init_xhci_mmio_space_and_regs()
352 reset_value: 0, in init_xhci_mmio_space_and_regs()
[all …]
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| /external/crosvm/devices/src/register_space/ |
| D | register_space.rs | 174 reset_value: 0xaabbccdd, in regs_reg_write()
192 reset_value: 0xaabbccdd, in regs_reg_writeable()
213 reset_value: 0xaabbccdd, in regs_reg_writeable_callback()
238 reset_value: 0xaabbccdd, in regs_reg_write_to_clear()
260 reset_value: 0xff, in regs_reg_array()
278 reset_value: 0xff, in regs_reg_multi_array()
288 reset_value: 0xee, in regs_reg_multi_array()
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| D | register.rs | 189 pub reset_value: T, field
300 locked.value = locked.spec.reset_value; in reset()
353 reset_value: $rv:expr,
361 reset_value: $rv,
367 (name: $name:tt, ty: $ty:ty,offset: $offset:expr,reset_value: $rv:expr,) => {{
372 reset_value: $rv,
388 $stride:expr,reset_value:
400 reset_value: $rv,
470 reset_value: 0xf1, in register_basic_rw_test()
496 reset_value: 0x0, in register_basic_writeable_mask_test()
[all …]
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| /external/libaom/libaom/av1/encoder/ |
| D | gop_structure.c | 164 static INLINE void reset_ref_frame_idx(int *ref_idx, int reset_value) { in reset_ref_frame_idx() argument
165 for (int i = 0; i < REF_FRAMES; ++i) ref_idx[i] = reset_value; in reset_ref_frame_idx()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_meta_clear.c | 1599 uint32_t* reset_value, in vi_get_fast_clear_parameters() argument
1611 *reset_value = RADV_DCC_CLEAR_REG; in vi_get_fast_clear_parameters()
1677 *reset_value = 0; in vi_get_fast_clear_parameters()
1679 *reset_value |= RADV_DCC_CLEAR_MAIN_1; in vi_get_fast_clear_parameters()
1682 *reset_value |= RADV_DCC_CLEAR_SECONDARY_1; in vi_get_fast_clear_parameters()
1726 uint32_t reset_value; in radv_can_fast_clear_color() local
1731 &clear_value, &reset_value, in radv_can_fast_clear_color()
1798 uint32_t reset_value; in radv_fast_clear_color() local
1805 &clear_value, &reset_value, in radv_fast_clear_color()
1819 reset_value); in radv_fast_clear_color()
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| /external/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_instruction_base.cpp | 54 val.reset_value(remap_one_registers(value)); in remap()
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| D | sfn_value_gpr.h | 166 void reset_value(PValue new_value);
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| D | sfn_value_gpr.cpp | 262 void GPRArrayValue::reset_value(PValue new_value) in reset_value() function in r600::GPRArrayValue
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_clear.c | 463 uint32_t reset_value; in si_do_fast_color_clear() local
469 fb->cbufs[i]->format, color, &reset_value, in si_do_fast_color_clear()
480 if (!vi_dcc_clear_level(sctx, tex, 0, reset_value)) in si_do_fast_color_clear()
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| /external/tensorflow/tensorflow/python/tpu/ |
| D | tensor_tracer.py | 1461 reset_value = constant_op.constant(_COMPACT_TRACE_ENTRY_INIT_VALUE,
1464 assign_op = state_ops.assign(cache, reset_value).op
|