Home
last modified time | relevance | path

Searched refs:rt2 (Results 1 – 25 of 61) sorted by relevance

123

/external/llvm-project/llvm/test/Verifier/
Drecursive-type-store.ll3 %rt2 = type { i32, { i8, %rt2, i8 }, i32 }
5 define void @f(%rt2 %r, %rt2 *%p) nounwind {
10 store %rt2 %r, %rt2 *%p
Drecursive-type-load.ll3 %rt2 = type { i32, { i8, %rt2, i8 }, i32 }
5 define i32 @f(%rt2* %p) nounwind {
10 %0 = load %rt2, %rt2* %p
Drecursive-type-3.ll3 %rt2 = type { i32, { i8, %rt2*, i8 }, i32 }
9 %0 = alloca %rt2
Drecursive-type-1.ll3 %rt2 = type { i32, { i8, %rt2, i8 }, i32 }
10 %0 = alloca %rt2
Drecursive-type-2.ll3 %rt1 = type { i32, { i8, %rt2, i8 }, i32 }
4 %rt2 = type { i64, { i6, %rt3 } }
12 %0 = alloca %rt2
/external/e2fsprogs/lib/ss/
Drequest_tbl.c55 register ssrt **rt1, **rt2; in ss_delete_request_table() local
60 for (rt2 = rt1; *rt1; rt1++) { in ss_delete_request_table()
62 *rt2++ = *rt1; in ss_delete_request_table()
66 *rt2 = (ssrt *)NULL; in ss_delete_request_table()
/external/tensorflow/tensorflow/python/ops/ragged/
Dragged_tensor_test.py78 rt2 = RaggedTensor.from_row_lengths(values, row_lengths=[4, 0, 3, 1, 0])
83 for rt in (rt1, rt2, rt3, rt4, rt5):
85 del rt1, rt2, rt3, rt4, rt5
309 rt2 = RaggedTensor.from_row_splits(values, splits2)
314 self.assertEqual(rt2.row_splits.dtype, dtypes.int64)
386 rt2 = RaggedTensor.from_row_lengths(rt, [2, 1, 0])
387 self.assertAllEqual([2, 1, 0], rt2.row_lengths())
435 rt2 = RaggedTensor.from_uniform_row_length(ph_values, ph_rowlen)
438 self.assertAllEqual(rt2, [[1, 2, 3], [4, 5, 6]])
442 self.assertEqual(rt2.shape.as_list(), [2, 3])
[all …]
Dragged_range_op_test.py35 rt2 = ragged_math_ops.range([0, 5, 8], [3, 3, 12])
36 self.assertAllEqual(rt2, [[0, 1, 2], [], [8, 9, 10, 11]])
96 rt2 = ragged_math_ops.range([0, 5, 5], [0, 3, 5], -1)
98 self.assertAllEqual(rt2, [[], [5, 4], []])
Dragged_to_sparse_op_test.py188 rt2 = ragged_factory_ops.constant(
190 rt = ragged_functional_ops.map_flat_values(math_ops.add, rt1, rt2 * 2.0)
194 [rt1.flat_values, rt2.flat_values])
Drow_partition_test.py52 rt2 = RowPartition.from_row_lengths(row_lengths=[4, 0, 3, 1, 0])
57 for rp in (rt1, rt2, rt3, rt4, rt5):
59 del rt1, rt2, rt3, rt4, rt5
192 rt2 = RowPartition.from_row_splits(splits2)
197 self.assertEqual(rt2.row_splits().dtype, dtypes.int64)
273 rt2 = RowPartition.from_uniform_row_length(
275 const_nvals2 = self.evaluate(rt2.nvals())
/external/llvm/test/Verifier/
Drecursive-type-3.ll3 %rt2 = type { i32, { i8, %rt2*, i8 }, i32 }
9 %0 = alloca %rt2
Drecursive-type-1.ll3 %rt2 = type { i32, { i8, %rt2, i8 }, i32 }
10 %0 = alloca %rt2
Drecursive-type-2.ll3 %rt1 = type { i32, { i8, %rt2, i8 }, i32 }
4 %rt2 = type { i64, { i6, %rt3 } }
12 %0 = alloca %rt2
/external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/
Dselect-frameaddr.ll11 define i8* @rt2() nounwind readnone {
13 ; CHECK-LABEL: rt2:
Dselect-returnaddr.ll29 define i8* @rt2() nounwind readnone {
31 ; CHECK-LABEL: rt2:
/external/llvm/test/CodeGen/AArch64/
Dreturnaddr.ll11 define i8* @rt2() nounwind readnone {
13 ; CHECK-LABEL: rt2:
Darm64-returnaddr.ll12 define i8* @rt2() nounwind readnone {
14 ; CHECK-LABEL: rt2:
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dreturnaddr.ll12 define i8* @rt2() nounwind readnone {
14 ; CHECK-LABEL: rt2:
Darm64-returnaddr.ll13 define i8* @rt2() nounwind readnone {
15 ; CHECK-LABEL: rt2:
/external/llvm/test/CodeGen/ARM/
Darm-returnaddr.ll16 define i8* @rt2() nounwind readnone {
18 ; CHECK-LABEL: rt2:
/external/llvm-project/llvm/test/CodeGen/ARM/
Darm-returnaddr.ll16 define i8* @rt2() nounwind readnone {
18 ; CHECK-LABEL: rt2:
/external/rust/crates/tokio/src/runtime/tests/
Dloom_basic_scheduler.rs53 let rt2 = rt1.clone(); in block_on_num_polls() localVariable
57 let th2 = thread::spawn(move || assert_at_most_num_polls(rt2, at_most)); in block_on_num_polls()
/external/vixl/src/aarch32/
Dmacro-assembler-aarch32.cc1677 Register rt2, in Delegate() argument
1686 temps.Include(rt, rt2); in Delegate()
1689 ldrd(rt, rt2, MemOperandComputationHelper(cond, scratch, location, mask)); in Delegate()
1693 Assembler::Delegate(type, instruction, cond, rt, rt2, location); in Delegate()
1898 Register rt2, in Delegate() argument
1919 if (((rt.GetCode() + 1) % kNumberOfRegisters) != rt2.GetCode()) { in Delegate()
1950 if (!rt2.Is(rn)) temps.Include(rt2); in Delegate()
1965 rt2, in Delegate()
1975 if (!rt2.Is(rn)) temps.Include(rt2); in Delegate()
1990 rt2, in Delegate()
[all …]
/external/pdfium/xfa/fxfa/
Dcxfa_ffpageview.cpp426 const CFX_RectF& rt2 = arg2->GetWidget()->GetWidgetRect(); in OrderContainer() local
427 if (rt1.top - rt2.top >= kXFAWidgetPrecision) in OrderContainer()
428 return rt1.top < rt2.top; in OrderContainer()
429 return rt1.left < rt2.left; in OrderContainer()
/external/rust/crates/tokio/tests/
Drt_common.rs318 let rt2 = rt(); localVariable
320 rt1.block_on(async { rt2.block_on(async { "hello" }) });
326 let rt2 = rt1.block_on(async { rt() }); localVariable
327 let out = rt2.block_on(async { "ZOMG" });
563 let rt2 = rt.clone(); localVariable
577 rt2.block_on(async move {

123