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/external/llvm-project/llvm/test/MC/VE/
DCVTQD.s6 # CHECK-INST: cvt.q.d %s18, %s12
8 cvt.q.d %s18, %s12
10 # CHECK-INST: cvt.q.d %s18, 63
12 cvt.q.d %s18, 63
14 # CHECK-INST: cvt.q.d %s18, -64
16 cvt.q.d %s18, -64
18 # CHECK-INST: cvt.q.d %s18, -1
20 cvt.q.d %s18, -1
DCVTQS.s6 # CHECK-INST: cvt.q.s %s18, %s12
8 cvt.q.s %s18, %s12
10 # CHECK-INST: cvt.q.s %s18, 63
12 cvt.q.s %s18, 63
14 # CHECK-INST: cvt.q.s %s18, -64
16 cvt.q.s %s18, -64
18 # CHECK-INST: cvt.q.s %s18, -1
20 cvt.q.s %s18, -1
/external/llvm-project/llvm/test/CodeGen/Thumb2/
Dmve-vcmpfr.ll843 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
844 ; CHECK-MVE-NEXT: vmov r0, s18
845 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
846 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
854 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
857 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
859 ; CHECK-MVE-NEXT: vmov r0, s18
868 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
869 ; CHECK-MVE-NEXT: vmov r0, s18
870 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
[all …]
Dmve-fmath.ll89 ; CHECK-NEXT: vmov r0, s18
97 ; CHECK-NEXT: vmov s18, r4
141 ; CHECK-NEXT: vcvtb.f32.f16 s0, s18
146 ; CHECK-NEXT: vcvtt.f32.f16 s0, s18
201 ; CHECK-NEXT: vmov r0, s18
209 ; CHECK-NEXT: vmov s18, r4
253 ; CHECK-NEXT: vcvtb.f32.f16 s0, s18
258 ; CHECK-NEXT: vcvtt.f32.f16 s0, s18
313 ; CHECK-NEXT: vmov r0, s18
321 ; CHECK-NEXT: vmov s18, r4
[all …]
/external/llvm-project/llvm/test/CodeGen/VE/Scalar/
Dfp_extload_truncstore.ll70 ; CHECK-NEXT: st %s18, 288(, %s11) # 8-byte Folded Spill
71 ; CHECK-NEXT: or %s18, 0, %s0
77 ; CHECK-NEXT: st2b %s0, (, %s18)
78 ; CHECK-NEXT: ld %s18, 288(, %s11) # 8-byte Folded Reload
88 ; CHECK-NEXT: st %s18, 288(, %s11) # 8-byte Folded Spill
90 ; CHECK-NEXT: or %s18, 0, %s0
102 ; CHECK-NEXT: st2b %s19, (, %s18)
104 ; CHECK-NEXT: ld %s18, 288(, %s11) # 8-byte Folded Reload
125 ; CHECK-NEXT: st %s18, 288(, %s11) # 8-byte Folded Spill
126 ; CHECK-NEXT: or %s18, 0, %s0
[all …]
Dtls.ll97 ; GENDYN-NEXT: st %s18, 288(, %s11) # 8-byte Folded Spill
98 ; GENDYN-NEXT: or %s18, 0, %s0
107 ; GENDYN-NEXT: stl %s18, (, %s0)
108 ; GENDYN-NEXT: ld %s18, 288(, %s11) # 8-byte Folded Reload
113 ; GENDYNPIC-NEXT: st %s18, 288(, %s11) # 8-byte Folded Spill
114 ; GENDYNPIC-NEXT: or %s18, 0, %s0
127 ; GENDYNPIC-NEXT: stl %s18, (, %s0)
128 ; GENDYNPIC-NEXT: ld %s18, 288(, %s11) # 8-byte Folded Reload
148 ; GENDYN-NEXT: st %s18, 288(, %s11) # 8-byte Folded Spill
149 ; GENDYN-NEXT: or %s18, 0, %s0
[all …]
Dsymbol_relocation_tls.ll106 ; GENDYN-NEXT: stl %s18, (, %s0)
107 ; GENDYN-NEXT: ld %s18, 288(, %s11)
128 ; GENDYNPIC-NEXT: stl %s18, (, %s0)
129 ; GENDYNPIC-NEXT: ld %s18, 288(, %s11)
150 ; GENDYN-NEXT: stl %s18, (, %s0)
151 ; GENDYN-NEXT: ld %s18, 288(, %s11)
172 ; GENDYNPIC-NEXT: stl %s18, (, %s0)
173 ; GENDYNPIC-NEXT: ld %s18, 288(, %s11)
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dmul.ll789 ; GFX7-NEXT: s_mul_i32 s18, s0, s9
790 ; GFX7-NEXT: s_add_u32 s17, s17, s18
791 ; GFX7-NEXT: s_cselect_b32 s18, 1, 0
793 ; GFX7-NEXT: s_and_b32 s18, s18, 1
795 ; GFX7-NEXT: v_add_i32_e32 v1, vcc, s18, v1
797 ; GFX7-NEXT: s_mul_i32 s18, s1, s9
799 ; GFX7-NEXT: s_add_u32 s17, s17, s18
800 ; GFX7-NEXT: s_cselect_b32 s18, 1, 0
803 ; GFX7-NEXT: s_and_b32 s18, s18, 1
810 ; GFX7-NEXT: s_add_i32 s18, s18, s19
[all …]
Dinsertelement.i8.ll3086 ; GFX9-NEXT: s_movk_i32 s18, 0xff
3091 ; GFX9-NEXT: s_and_b32 s6, s6, s18
3094 ; GFX9-NEXT: s_and_b32 s0, s0, s18
3097 ; GFX9-NEXT: s_and_b32 s6, s7, s18
3103 ; GFX9-NEXT: s_and_b32 s6, s9, s18
3106 ; GFX9-NEXT: s_and_b32 s1, s1, s18
3109 ; GFX9-NEXT: s_and_b32 s6, s10, s18
3115 ; GFX9-NEXT: s_and_b32 s6, s12, s18
3118 ; GFX9-NEXT: s_and_b32 s2, s2, s18
3121 ; GFX9-NEXT: s_and_b32 s6, s13, s18
[all …]
/external/XNNPACK/src/f32-gemm/
D4x4-minmax-aarch32-vfp-ld64.S108 VMLA.F32 s18, s14, s0
129 VMLA.F32 s18, s12, s1
151 VCMPE.F32 s8, s18
155 VMOVPL.F32 s18, s8
199 VCMPE.F32 s9, s18
203 VMOVMI.F32 s18, s9
275 VMLA.F32 s18, s14, s0
300 VMOV.F32 s16, s18
D4x4-aarch32-vfp-ld64.S104 VMLA.F32 s18, s10, s0
124 VMLA.F32 s18, s14, s1
173 VMLA.F32 s18, s14, s0
198 VMOV.F32 s16, s18
/external/vixl/test/aarch64/
Dtest-assembler-fp-aarch64.cc441 __ Fmov(s18, 1.0f); in TEST()
451 __ Fadd(s0, s17, s18); in TEST()
452 __ Fadd(s1, s18, s19); in TEST()
453 __ Fadd(s2, s14, s18); in TEST()
454 __ Fadd(s3, s15, s18); in TEST()
455 __ Fadd(s4, s16, s18); in TEST()
533 __ Fmov(s18, 1.0f); in TEST()
543 __ Fsub(s0, s17, s18); in TEST()
544 __ Fsub(s1, s18, s19); in TEST()
545 __ Fsub(s2, s14, s18); in TEST()
[all …]
/external/llvm-project/llvm/test/CodeGen/ARM/
Dcmse-clear-float-hard.ll222 ; CHECK-81M-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s…
223 …1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22…
228 ; CHECK-81M-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s3…
322 ; CHECK-81M-LE-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29…
323 …m {s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22…
328 ; CHECK-81M-LE-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29,…
343 ; CHECK-81M-BE-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29…
344 …m {s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19, s20, s21, s22…
349 ; CHECK-81M-BE-NEXT: vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29,…
403 ; CHECK-81M-NEXT: vpush {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s…
[all …]
/external/llvm-project/llvm/test/CodeGen/VE/VELIntrinsics/
Dlvlgen.ll73 ; CHECK-NEXT: st %s18, 288(, %s11) # 8-byte Folded Spill
76 ; CHECK-NEXT: or %s18, 0, %s1
87 ; CHECK-NEXT: vld %v0, 16, %s18
89 ; CHECK-NEXT: vld %v0, 8, %s18
93 ; CHECK-NEXT: ld %s18, 288(, %s11) # 8-byte Folded Reload
/external/llvm-project/clang/test/CodeGen/
Darm-arguments.c104 struct s18 { short f0; char f1 : 4; }; struct
105 struct s18 f18(void) {} in f18()
/external/clang/test/CodeGen/
Darm-arguments.c104 struct s18 { short f0; char f1 : 4; }; struct
105 struct s18 f18(void) {} in f18()
/external/llvm-project/llvm/test/MC/Disassembler/ARM/
Dvscclrm.txt11 # CHECK: vscclrm {s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, vpr}
29 # CHECK: vscclrmhi {s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, s15, s16, s17, s18, s19…
/external/llvm-project/lldb/test/API/arm/emulation/new-test-files/
Dtest-sub-4-thumb.dat42 s18=0x00000000
95 s18=0x00000000
Dtest-add-1-thumb.dat42 s18=0x00000000
95 s18=0x00000000
Dtest-push-3-thumb.dat42 s18=0x00000000
95 s18=0x00000000
Dtest-add-5-arm.dat42 s18=0x00000012
95 s18=0x00000012
Dtest-bic-1-arm.dat42 s18=0x00000012
95 s18=0x00000012
Dtest-mov-30-thumb.dat42 s18=0x00000000
95 s18=0x00000000
Dtest-subs-8-thumb.dat42 s18=0x00000000
95 s18=0x00000000
Dtest-mov-23-thumb.dat42 s18=0x00000000
95 s18=0x00000000

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