| /external/llvm-project/llvm/test/MC/VE/ |
| D | VST.s | 10 # CHECK-INST: vst.nc %vix, 63, %s22
12 vst.nc %vix, 63, %s22
26 # CHECK-INST: vst.nc %vix, 63, %s22, %vm1
28 vst.nc %vix, 63, %s22, %vm1
42 # CHECK-INST: vstu.nc %vix, 63, %s22
44 vstu.nc %vix, 63, %s22
58 # CHECK-INST: vstu.nc %vix, 63, %s22, %vm1
60 vstu.nc %vix, 63, %s22, %vm1
74 # CHECK-INST: vstl.nc %vix, 63, %s22
76 vstl.nc %vix, 63, %s22
[all …]
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| D | VBRD.s | 14 # CHECK-INST: vbrd %vix, %s22
16 vbrd %vix, %s22, %vm0
26 # CHECK-INST: vbrdl %vix, %s22
28 vbrdl %vix, %s22, %vm0
38 # CHECK-INST: vbrdu %vix, %s22
40 vbrdu %vix, %s22, %vm0
50 # CHECK-INST: pvbrd %vix, %s22
52 pvbrd %vix, %s22, %vm0
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| D | FMAXMIN.s | 6 # CHECK-INST: fmax.d %s11, %s20, %s22
8 fmax.d %s11, %s20, %s22
10 # CHECK-INST: fmax.s %s11, 22, %s22
12 fmax.s %s11, 22, %s22
18 # CHECK-INST: fmin.s %s11, -64, %s22
20 fmin.s %s11, -64, %s22
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| D | ADD.s | 6 # CHECK-INST: addu.l %s11, %s20, %s22
8 addu.l %s11, %s20, %s22
10 # CHECK-INST: addu.w %s11, 22, %s22
12 addu.w %s11, 22, %s22
18 # CHECK-INST: adds.w.zx %s11, -64, %s22
20 adds.w.zx %s11, -64, %s22
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| D | DIV.s | 6 # CHECK-INST: divu.l %s11, %s20, %s22
8 divu.l %s11, %s20, %s22
10 # CHECK-INST: divu.w %s11, 22, %s22
12 divu.w %s11, 22, %s22
18 # CHECK-INST: divs.w.zx %s11, -64, %s22
20 divs.w.zx %s11, -64, %s22
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| D | FSUB.s | 6 # CHECK-INST: fsub.d %s11, %s20, %s22
8 fsub.d %s11, %s20, %s22
10 # CHECK-INST: fsub.s %s11, 22, %s22
12 fsub.s %s11, 22, %s22
22 # CHECK-INST: fsub.q %s12, %s20, %s22
24 fsub.q %s12, %s20, %s22
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| D | SUB.s | 6 # CHECK-INST: subu.l %s11, %s20, %s22
8 subu.l %s11, %s20, %s22
10 # CHECK-INST: subu.w %s11, 22, %s22
12 subu.w %s11, 22, %s22
18 # CHECK-INST: subs.w.zx %s11, -64, %s22
20 subs.w.zx %s11, -64, %s22
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| D | CMP.s | 6 # CHECK-INST: cmpu.l %s11, %s20, %s22
8 cmpu.l %s11, %s20, %s22
10 # CHECK-INST: cmpu.w %s11, 22, %s22
12 cmpu.w %s11, 22, %s22
18 # CHECK-INST: cmps.w.zx %s11, -64, %s22
20 cmps.w.zx %s11, -64, %s22
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| D | FADD.s | 6 # CHECK-INST: fadd.d %s11, %s20, %s22
8 fadd.d %s11, %s20, %s22
10 # CHECK-INST: fadd.s %s11, 22, %s22
12 fadd.s %s11, 22, %s22
22 # CHECK-INST: fadd.q %s12, %s20, %s22
24 fadd.q %s12, %s20, %s22
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| D | FCMP.s | 6 # CHECK-INST: fcmp.d %s11, %s20, %s22
8 fcmp.d %s11, %s20, %s22
10 # CHECK-INST: fcmp.s %s11, 22, %s22
12 fcmp.s %s11, 22, %s22
22 # CHECK-INST: fcmp.q %s11, %s20, %s22
24 fcmp.q %s11, %s20, %s22
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| D | FMUL.s | 6 # CHECK-INST: fmul.d %s11, %s20, %s22
8 fmul.d %s11, %s20, %s22
10 # CHECK-INST: fmul.s %s11, 22, %s22
12 fmul.s %s11, 22, %s22
22 # CHECK-INST: fmul.q %s12, %s20, %s22
24 fmul.q %s12, %s20, %s22
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| D | VLD.s | 10 # CHECK-INST: vld.nc %vix, 63, %s22
12 vld.nc %vix, 63, %s22
26 # CHECK-INST: vldl.sx.nc %vix, 63, %s22
28 vldl.sx.nc %vix, 63, %s22
42 # CHECK-INST: vld2d.nc %vix, 63, %s22
44 vld2d.nc %vix, 63, %s22
58 # CHECK-INST: vldl2d.sx.nc %vix, 63, %s22
60 vldl2d.sx.nc %vix, 63, %s22
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| D | MAXMIN.s | 6 # CHECK-INST: maxs.w.sx %s11, %s20, %s22
8 maxs.w.sx %s11, %s20, %s22
10 # CHECK-INST: maxs.w.zx %s11, 22, %s22
12 maxs.w.zx %s11, 22, %s22
18 # CHECK-INST: mins.w.zx %s11, -64, %s22
20 mins.w.zx %s11, -64, %s22
|
| D | MUL.s | 6 # CHECK-INST: mulu.l %s11, %s20, %s22
8 mulu.l %s11, %s20, %s22
10 # CHECK-INST: mulu.w %s11, 22, %s22
12 mulu.w %s11, 22, %s22
18 # CHECK-INST: muls.w.zx %s11, -64, %s22
20 muls.w.zx %s11, -64, %s22
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| D | FDIV.s | 6 # CHECK-INST: fdiv.d %s11, %s20, %s22
8 fdiv.d %s11, %s20, %s22
10 # CHECK-INST: fdiv.s %s11, 22, %s22
12 fdiv.s %s11, 22, %s22
|
| /external/capstone/suite/MC/AArch64/ |
| D | neon-scalar-cvt.s.cs | 2 0xb6,0xd9,0x21,0x5e = scvtf s22, s13
4 0xb6,0xd9,0x21,0x7e = ucvtf s22, s13
6 0xb6,0xe5,0x20,0x5f = scvtf s22, s13, #32
8 0xb6,0xe5,0x20,0x7f = ucvtf s22, s13, #32
14 0xb6,0x69,0x61,0x7e = fcvtxn s22, d13
19 0xb6,0xb9,0x21,0x5e = fcvtms s22, s13
23 0xb6,0xa9,0x21,0x5e = fcvtns s22, s13
27 0xb6,0xa9,0xa1,0x5e = fcvtps s22, s13
|
| D | neon-scalar-mul.s.cs | 6 0xd4,0xde,0x2f,0x5e = fmulx s20, s22, s15
13 0xcf,0xd2,0xac,0x5e = sqdmull d15, s22, s12
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-cvt.s | 10 scvtf s22, s13
22 ucvtf s22, s13
34 scvtf s22, s13, #32
46 ucvtf s22, s13, #32
82 fcvtxn s22, d13
118 fcvtms s22, s13
144 fcvtns s22, s13
170 fcvtps s22, s13
|
| D | neon-scalar-mul.s | 30 fmulx s20, s22, s15
62 sqdmull d15, s22, s12
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | neon-scalar-cvt.s | 10 scvtf s22, s13
22 ucvtf s22, s13
34 scvtf s22, s13, #32
46 ucvtf s22, s13, #32
82 fcvtxn s22, d13
118 fcvtms s22, s13
144 fcvtns s22, s13
170 fcvtps s22, s13
|
| /external/tensorflow/tensorflow/core/platform/ |
| D | ctstring_test.cc | 72 TF_TString s20, s21, s22; in TEST() local
75 TF_TString_Init(&s22); in TEST()
93 TF_TString_Move(&s22, &s21); in TEST()
95 EXPECT_EQ(1, TF_TString_GetSize(&s22)); in TEST()
96 EXPECT_EQ(TF_TSTR_SMALL, TF_TString_GetType(&s22)); in TEST()
97 EXPECT_STREQ("a", TF_TString_GetDataPointer(&s22)); in TEST()
98 EXPECT_STREQ("a", TF_TString_GetMutableDataPointer(&s22)); in TEST()
99 EXPECT_EQ(TF_TString_SmallCapacity, TF_TString_GetCapacity(&s22)); in TEST()
103 TF_TString_Dealloc(&s22); in TEST()
|
| D | stringpiece_test.cc | 38 StringPiece s22(hello, 6); in TEST() local
39 EXPECT_TRUE(s22.data() == hello); in TEST()
40 EXPECT_EQ(6, s22.size()); in TEST()
|
| /external/llvm-project/llvm/test/CodeGen/Thumb2/ |
| D | mve-vcmpf.ll | 787 ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
805 ; CHECK-MVE-NEXT: vcmp.f16 s22, s20
814 ; CHECK-MVE-NEXT: vmovx.f16 s22, s13
816 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
826 ; CHECK-MVE-NEXT: vmovx.f16 s22, s2
832 ; CHECK-MVE-NEXT: vcmp.f16 s22, s20
841 ; CHECK-MVE-NEXT: vmovx.f16 s22, s14
843 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
915 ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
935 ; CHECK-MVE-NEXT: vcmp.f16 s22, s20
[all …]
|
| /external/XNNPACK/src/f32-gemm/ |
| D | 4x4-minmax-aarch32-vfp-ld64.S | 110 VMLA.F32 s22, s14, s2
131 VMLA.F32 s22, s12, s3
163 VCMPE.F32 s8, s22
167 VMOVPL.F32 s22, s8
211 VCMPE.F32 s9, s22
215 VMOVMI.F32 s22, s9
280 VMLA.F32 s22, s14, s1
302 VMOV.F32 s20, s22
|
| /external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
| D | mul.ll | 913 ; GFX7-NEXT: s_mul_i32 s22, s0, s13
915 ; GFX7-NEXT: s_add_u32 s17, s17, s22
959 ; GFX7-NEXT: s_mul_i32 s22, s1, s13
962 ; GFX7-NEXT: s_add_u32 s17, s17, s22
1173 ; GFX8-NEXT: s_mul_i32 s22, s0, s13
1175 ; GFX8-NEXT: s_add_u32 s17, s17, s22
1219 ; GFX8-NEXT: s_mul_i32 s22, s1, s13
1222 ; GFX8-NEXT: s_add_u32 s17, s17, s22
1325 ; GFX9-NEXT: s_mul_hi_u32 s22, s1, s8
1327 ; GFX9-NEXT: s_add_u32 s19, s19, s22
[all …]
|