/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | load-constant-i16.ll | 4780 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[2:3], 0x100000 4781 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x100000 4799 ; GCN-HSA-NEXT: s_bfe_i64 s[0:1], s[0:1], 0x100000 4800 ; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x100000 4818 ; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[6:7], s[4:5], 0x100000 4820 ; GCN-NOHSA-VI-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x100000 4985 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[10:11], s[4:5], 0x100000 4987 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x100000 4988 ; GCN-NOHSA-SI-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x100000 5010 ; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x100000 [all …]
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D | sext-divergence-driven-isel.ll | 33 ; GCN-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x100000
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D | sext-in-reg.ll | 81 ; GCN-DAG: s_bfe_i64 s{{\[}}[[SLO:[0-9]+]]:[[SHI:[0-9]+]]{{\]}}, [[VAL]], 0x10000 95 ; GCN-DAG: s_bfe_i64 s{{\[}}[[SLO:[0-9]+]]:[[SHI:[0-9]+]]{{\]}}, [[VAL]], 0x80000 109 ; GCN-DAG: s_bfe_i64 s{{\[}}[[SLO:[0-9]+]]:[[SHI:[0-9]+]]{{\]}}, [[VAL]], 0x100000 124 ; GCN-DAG: s_bfe_i64 s{{\[}}[[SLO:[0-9]+]]:[[SHI:[0-9]+]]{{\]}}, [[VAL]], 0x200000
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D | sign_extend.ll | 192 ; SI-NEXT: s_bfe_i64 s[0:1], s[0:1], 0x100000 205 ; VI-NEXT: s_bfe_i64 s[0:1], s[0:1], 0x100000 463 ; FIXME: s_bfe_i64, same on SI and VI
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D | kernel-args.ll | 812 ; GCN: s_bfe_i64
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/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
D | mubuf-global.ll | 257 ; GFX6-NEXT: s_bfe_i64 s[2:3], s[4:5], 0x200000 271 ; GFX7-NEXT: s_bfe_i64 s[2:3], s[4:5], 0x200000 288 ; GFX6-NEXT: s_bfe_i64 s[0:1], s[2:3], 0x200000 298 ; GFX7-NEXT: s_bfe_i64 s[0:1], s[2:3], 0x200000 313 ; GFX6-NEXT: s_bfe_i64 s[0:1], s[2:3], 0x200000 323 ; GFX7-NEXT: s_bfe_i64 s[0:1], s[2:3], 0x200000 342 ; GFX6-NEXT: s_bfe_i64 s[0:1], s[2:3], 0x200000 358 ; GFX7-NEXT: s_bfe_i64 s[0:1], s[2:3], 0x200000 713 ; GFX6-NEXT: s_bfe_i64 s[2:3], s[4:5], 0x200000 727 ; GFX7-NEXT: s_bfe_i64 s[2:3], s[4:5], 0x200000 [all …]
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D | shl-ext-reduce.ll | 109 ; GCN-NEXT: s_bfe_i64 s[0:1], s[0:1], 0x200000 341 ; GCN-NEXT: s_bfe_i64 s[2:3], s[0:1], 0x200000 343 ; GCN-NEXT: s_bfe_i64 s[4:5], s[0:1], 0x200000
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D | llvm.amdgcn.sbfe.ll | 38 ; GFX6-NEXT: s_bfe_i64 s[0:1], s[0:1], s2
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/external/llvm/test/MC/AMDGPU/ |
D | sop2.s | 155 s_bfe_i64 s[2:3], s[4:5], s6 label
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/external/llvm-project/llvm/test/MC/AMDGPU/ |
D | sop2.s | 211 s_bfe_i64 s[2:3], s[4:5], s6 label
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | sop2_vi.txt | 87 # VI: s_bfe_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x02,0x94]
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/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
D | sop2_vi.txt | 87 # VI: s_bfe_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x02,0x94]
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D | gfx8_dasm_all.txt | 20052 # CHECK: s_bfe_i64 s[10:11], s[2:3], s2 ; encoding: [0x02,0x02,0x0a,0x94] 20055 # CHECK: s_bfe_i64 s[12:13], s[2:3], s2 ; encoding: [0x02,0x02,0x0c,0x94] 20058 # CHECK: s_bfe_i64 s[100:101], s[2:3], s2 ; encoding: [0x02,0x02,0x64,0x94] 20061 # CHECK: s_bfe_i64 flat_scratch, s[2:3], s2 ; encoding: [0x02,0x02,0x66,0x94] 20064 # CHECK: s_bfe_i64 vcc, s[2:3], s2 ; encoding: [0x02,0x02,0x6a,0x94] 20067 # CHECK: s_bfe_i64 tba, s[2:3], s2 ; encoding: [0x02,0x02,0x6c,0x94] 20070 # CHECK: s_bfe_i64 tma, s[2:3], s2 ; encoding: [0x02,0x02,0x6e,0x94] 20073 # CHECK: s_bfe_i64 ttmp[10:11], s[2:3], s2 ; encoding: [0x02,0x02,0x7a,0x94] 20076 # CHECK: s_bfe_i64 exec, s[2:3], s2 ; encoding: [0x02,0x02,0x7e,0x94] 20079 # CHECK: s_bfe_i64 s[10:11], s[4:5], s2 ; encoding: [0x04,0x02,0x0a,0x94] [all …]
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D | gfx9_dasm_all.txt | 17541 # CHECK: s_bfe_i64 s[10:11], s[2:3], s2 ; encoding: [0x02,0x02,0x0a,0x94] 17544 # CHECK: s_bfe_i64 s[12:13], s[2:3], s2 ; encoding: [0x02,0x02,0x0c,0x94] 17547 # CHECK: s_bfe_i64 s[100:101], s[2:3], s2 ; encoding: [0x02,0x02,0x64,0x94] 17550 # CHECK: s_bfe_i64 flat_scratch, s[2:3], s2 ; encoding: [0x02,0x02,0x66,0x94] 17553 # CHECK: s_bfe_i64 vcc, s[2:3], s2 ; encoding: [0x02,0x02,0x6a,0x94] 17556 # CHECK: s_bfe_i64 exec, s[2:3], s2 ; encoding: [0x02,0x02,0x7e,0x94] 17559 # CHECK: s_bfe_i64 s[10:11], s[4:5], s2 ; encoding: [0x04,0x02,0x0a,0x94] 17562 # CHECK: s_bfe_i64 s[10:11], s[100:101], s2 ; encoding: [0x64,0x02,0x0a,0x94] 17565 # CHECK: s_bfe_i64 s[10:11], flat_scratch, s2 ; encoding: [0x66,0x02,0x0a,0x94] 17568 # CHECK: s_bfe_i64 s[10:11], vcc, s2 ; encoding: [0x6a,0x02,0x0a,0x94] [all …]
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D | gfx10_dasm_all.txt | 10274 # GFX10: s_bfe_i64 exec, s[2:3], s4 ; encoding: [0x02,0x04,0x7e,0x95] 10277 # GFX10: s_bfe_i64 s[0:1], -1, s4 ; encoding: [0xc1,0x04,0x00,0x95] 10280 # GFX10: s_bfe_i64 s[0:1], -4.0, s4 ; encoding: [0xf7,0x04,0x00,0x95] 10283 # GFX10: s_bfe_i64 s[0:1], 0, s4 ; encoding: [0x80,0x04,0x00,0x95] 10286 # GFX10: s_bfe_i64 s[0:1], 0.5, s4 ; encoding: [0xf0,0x04,0x00,0x95] 10289 # GFX10: s_bfe_i64 s[0:1], 0x3f717273, s4 ; encoding: [0xff,0x04,0x00,0x95,0x73,0x72,0x71,0x… 10292 # GFX10: s_bfe_i64 s[0:1], 0xaf123456, s4 ; encoding: [0xff,0x04,0x00,0x95,0x56,0x34,0x12,0x… 10295 # GFX10: s_bfe_i64 s[0:1], exec, s4 ; encoding: [0x7e,0x04,0x00,0x95] 10298 # GFX10: s_bfe_i64 s[0:1], s[102:103], s100 ; encoding: [0x66,0x64,0x00,0x95] 10301 # GFX10: s_bfe_i64 s[0:1], s[102:103], s4 ; encoding: [0x66,0x04,0x00,0x95] [all …]
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/external/llvm/test/CodeGen/AMDGPU/ |
D | sext-in-reg.ll | 80 ; SI-DAG: s_bfe_i64 s{{\[}}[[SLO:[0-9]+]]:[[SHI:[0-9]+]]{{\]}}, [[VAL]], 0x10000 94 ; SI-DAG: s_bfe_i64 s{{\[}}[[SLO:[0-9]+]]:[[SHI:[0-9]+]]{{\]}}, [[VAL]], 0x80000 108 ; SI-DAG: s_bfe_i64 s{{\[}}[[SLO:[0-9]+]]:[[SHI:[0-9]+]]{{\]}}, [[VAL]], 0x100000 123 ; SI-DAG: s_bfe_i64 s{{\[}}[[SLO:[0-9]+]]:[[SHI:[0-9]+]]{{\]}}, [[VAL]], 0x200000
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D | sign_extend.ll | 123 ; FIXME: s_bfe_i64
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/external/llvm-project/llvm/docs/ |
D | AMDGPUOperandSyntax.rst | 1042 s_bfe_i64 s[0:1], 0xffefffff, s3 // src0 = 0xffffffffffefffff 1047 s_bfe_i64 s[0:1], x, s3 // src0 = 0xffffffffffefffff
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SOPInstructions.td | 562 def S_BFE_I64 : SOP2_64_32 <"s_bfe_i64">;
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SOPInstructions.td | 615 def S_BFE_I64 : SOP2_64_32 <"s_bfe_i64">;
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 311 defm S_BFE_I64 : SOP2_64_32 <sop2<0x2a, 0x28>, "s_bfe_i64", []>;
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/external/llvm-project/llvm/docs/AMDGPU/ |
D | AMDGPUAsmGFX7.rst | 516 …s_bfe_i64 :ref:`sdst<amdgpu_synid7_sdst64_1>`, :ref:`ssrc0<amdgpu_synid7_…
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D | AMDGPUAsmGFX8.rst | 538 …s_bfe_i64 :ref:`sdst<amdgpu_synid8_sdst64_1>`, :ref:`ssrc0<amdgpu_synid8_…
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D | AMDGPUAsmGFX9.rst | 701 …s_bfe_i64 :ref:`sdst<amdgpu_synid9_sdst64_1>`, :ref:`ssrc0<amdgpu_synid9_…
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D | AMDGPUAsmGFX10.rst | 1180 …s_bfe_i64 :ref:`sdst<amdgpu_synid10_sdst64_1>`, :ref:`ssrc0<amdgpu_synid1…
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