/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | llvm.amdgcn.s.buffer.load.ll | 7 ;SI: s_buffer_load_dword s{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], 0x1 8 ;CI: s_buffer_load_dword s{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], 0x1 9 ;VI: s_buffer_load_dword s{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], 0x4 20 ;GCN: s_buffer_load_dword s{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} 249 ; GCN: s_buffer_load_dword s0, s[0:3], [[K]]{{$}} 257 ; SI: s_buffer_load_dword s0, s[0:3], [[K]]{{$}} 259 ; CI: s_buffer_load_dword s0, s[0:3], 0x3fffffff{{$}} 262 ; VI: s_buffer_load_dword s0, s[0:3], [[K]]{{$}} 270 ; SI: s_buffer_load_dword s0, s[0:3], [[K]]{{$}} 272 ; CI: s_buffer_load_dword s0, s[0:3], 0x3ffffffe{{$}} [all …]
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D | smrd-gfx10.ll | 4 ; GCN: s_buffer_load_dword s0, s[0:3], 0x0 dlc ; encoding: [0x00,0x40,0x20,0xf4,0x00,0x00,0x00,0xfa] 12 ; GCN: s_buffer_load_dword s0, s[0:3], s4 dlc ; encoding: [0x00,0x40,0x20,0xf4,0x00,0x00,0x00,0x08] 20 ; GCN: s_buffer_load_dword s0, s[0:3], 0x0 glc dlc ; encoding: [0x00,0x40,0x21,0xf4,0x00,0x00,0x00,… 28 ; GCN: s_buffer_load_dword s0, s[0:3], s4 glc dlc ; encoding: [0x00,0x40,0x21,0xf4,0x00,0x00,0x00,0…
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D | smrd.ll | 123 ; GCN-NEXT: s_buffer_load_dword s0, s[0:3], 0x0 136 ; SICI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x4 ; encoding: [0x04 137 ; VIGFX9_10: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x10 150 ; SICI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xff ; encoding: [0xff 151 ; SICI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xff glc ; encoding: [0xff 152 ; VIGFX9_10-DAG: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3fc ; 153 ; VIGFX9_10-DAG: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3fc glc ; 171 ; SI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], s[[OFFSET]] ; encoding: [0x0[[OFFSET]] 172 ; SI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], s[[OFFSET]] ; encoding: [0x0[[OFFSET]] 173 ; CI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x100 [all …]
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D | spill-m0.ll | 58 ; GCN-NOT: s_buffer_load_dword m0 108 ; GCN-NOT: s_buffer_load_dword m0 155 ; TOSMEM: s_buffer_load_dword s2, s[88:91], m0 ; 4-byte Folded Reload
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D | si-scheduler.ll | 68 ; CHECK: s_buffer_load_dword
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D | sgpr-copy.ll | 5 ; CHECK: s_buffer_load_dword [[DST:s[0-9]]], {{s\[[0-9]+:[0-9]+\]}}, 0x0
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D | si-sgpr-spill.ll | 23 ; GCN-NOT: s_buffer_load_dword m0
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/external/llvm-project/llvm/test/MC/AMDGPU/ |
D | smrd.s | 134 s_buffer_load_dword s1, s[4:7], 1 label 138 s_buffer_load_dword s1, s[4:7], s4 label 142 s_buffer_load_dword tba_lo, s[4:7], s4 label 146 s_buffer_load_dword tba_hi, s[4:7], s4 label 150 s_buffer_load_dword tma_lo, s[4:7], s4 label 154 s_buffer_load_dword tma_hi, s[4:7], s4 label 158 s_buffer_load_dword ttmp1, ttmp[4:7], ttmp4 label
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D | smem-err.s | 45 s_buffer_load_dword m0, s[0:3], s4 label 48 s_buffer_load_dword exec_lo, s[0:3], s4 label 51 s_buffer_load_dword exec_hi, s[0:3], s4 label
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D | smem.s | 173 s_buffer_load_dword s10, s[92:95], m0 label 178 s_buffer_load_dword tba_lo, s[92:95], m0 label 183 s_buffer_load_dword tba_hi, s[92:95], m0 label 188 s_buffer_load_dword tma_lo, s[92:95], m0 label 193 s_buffer_load_dword tma_hi, s[92:95], m0 label 198 s_buffer_load_dword ttmp0, s[92:95], m0 label 726 s_buffer_load_dword s10, s[92:95], -1 label 770 s_buffer_load_dword s10, s[92:95], 0xFFFFFFFFFFF00000 label
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D | reg-syntax-extra.s | 98 s_buffer_load_dword ttmp1, [ttmp4,ttmp5,ttmp6,ttmp7], ttmp4 label
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/external/llvm/test/CodeGen/AMDGPU/ |
D | smrd.ll | 89 ; SICI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x4 ; encoding: [0x04 90 ; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x10 103 ; SICI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xff ; encoding: [0xff 104 ; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3fc 118 ; SI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], s[[OFFSET]] ; encoding: [0x0[[OFFSET]] 119 ; CI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x100 120 ; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x400 133 ; SI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]] 134 ; CI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3ffff 135 ; VI: s_buffer_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xffffc [all …]
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D | sgpr-copy.ll | 12 ; CHECK: s_buffer_load_dword [[DST:s[0-9]]], {{s\[[0-9]+:[0-9]+\]}}, 0x0
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D | si-sgpr-spill.ll | 23 ; CHECK-NOT: s_buffer_load_dword m0
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/external/llvm/test/MC/AMDGPU/ |
D | smrd.s | 87 s_buffer_load_dword s1, s[4:7], 1 label 91 s_buffer_load_dword s1, s[4:7], s4 label 95 s_buffer_load_dword ttmp1, ttmp[4:7], ttmp4 label
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D | reg-syntax-extra.s | 77 s_buffer_load_dword ttmp1, [ttmp4,ttmp5,ttmp6,ttmp7], ttmp4 label
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/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
D | smrd_vi.txt | 42 # VI: s_buffer_load_dword s1, s[4:7], 0x1 ; encoding: [0x42,0x00,0x22,0xc0,0x01,0x00,0x00,0x00] 45 # VI: s_buffer_load_dword s1, s[4:7], s4 ; encoding: [0x42,0x00,0x20,0xc0,0x04,0x00,0x00,0x00]
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D | smem_vi.txt | 39 # VI: s_buffer_load_dword s10, s[92:95], m0 ; encoding: [0xae,0x02,0x20,0xc0,0x7c,0x00,0x00,0x00]
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D | gfx8_dasm_all.txt | 9924 # CHECK: s_buffer_load_dword s5, s[4:7], s2 ; encoding: [0x42,0x01,0x20,0xc0,0x02,0x00,0x00,0x… 9927 # CHECK: s_buffer_load_dword s101, s[4:7], s2 ; encoding: [0x42,0x19,0x20,0xc0,0x02,0x00,0x00,0x… 9930 # CHECK: s_buffer_load_dword flat_scratch_lo, s[4:7], s2 ; encoding: [0x82,0x19,0x20,0xc0,0x02,0x00… 9933 # CHECK: s_buffer_load_dword flat_scratch_hi, s[4:7], s2 ; encoding: [0xc2,0x19,0x20,0xc0,0x02,0x00… 9936 # CHECK: s_buffer_load_dword vcc_lo, s[4:7], s2 ; encoding: [0x82,0x1a,0x20,0xc0,0x02,0x00,0x00,0x… 9939 # CHECK: s_buffer_load_dword vcc_hi, s[4:7], s2 ; encoding: [0xc2,0x1a,0x20,0xc0,0x02,0x00,0x00,0x… 9942 # CHECK: s_buffer_load_dword tba_lo, s[4:7], s2 ; encoding: [0x02,0x1b,0x20,0xc0,0x02,0x00,0x00,0x… 9945 # CHECK: s_buffer_load_dword tba_hi, s[4:7], s2 ; encoding: [0x42,0x1b,0x20,0xc0,0x02,0x00,0x00,0x… 9948 # CHECK: s_buffer_load_dword tma_lo, s[4:7], s2 ; encoding: [0x82,0x1b,0x20,0xc0,0x02,0x00,0x00,0x… 9951 # CHECK: s_buffer_load_dword tma_hi, s[4:7], s2 ; encoding: [0xc2,0x1b,0x20,0xc0,0x02,0x00,0x00,0x… [all …]
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | smrd_vi.txt | 39 # VI: s_buffer_load_dword s1, s[4:7], 0x1 ; encoding: [0x42,0x00,0x22,0xc0,0x01,0x00,0x00,0x00] 42 # VI: s_buffer_load_dword s1, s[4:7], s4 ; encoding: [0x42,0x00,0x20,0xc0,0x04,0x00,0x00,0x00]
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SMInstructions.td | 280 "s_buffer_load_dword", SReg_128, SReg_32_XM0_XEXEC
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SMInstructions.td | 270 "s_buffer_load_dword", SReg_128, SReg_32_XM0_XEXEC
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 54 smrd<0x08>, "s_buffer_load_dword", SReg_128, SReg_32_XM0
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/external/llvm-project/llvm/docs/AMDGPU/ |
D | AMDGPUAsmGFX7.rst | 428 …s_buffer_load_dword :ref:`sdst<amdgpu_synid7_sdst32_0>`, :ref:`sbase<amdgpu_synid7_…
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D | AMDGPUAsmGFX8.rst | 440 …s_buffer_load_dword :ref:`sdst<amdgpu_synid8_sdst32_0>`, :ref:`sbase<amdgpu_synid8_…
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