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/external/llvm/test/CodeGen/AArch64/
Dbitfield-extract.ll4 ; CHECK: sbfx {{x[0-9]+}}, x0, #23, #9
13 ; CHECK: sbfx w0, w0, #23, #8
21 ; CHECK: sbfx w0, w0, #23, #8
29 ; CHECK: sbfx w0, w0, #15, #16
37 ; CHECK: sbfx w0, w0, #16, #8
45 ; CHECK: sbfx x0, x0, #30, #8
53 ; CHECK: sbfx x0, x0, #23, #16
90 ; CHECK: sbfx x0, x0, #23, #16
Dbool-loads.ll11 ; CHECK: {{sbfx x[0-9]+, x[0-9]+, #0, #1|sbfx w[0-9]+, w[0-9]+, #0, #1}}
23 ; CHECK: {{sbfx x[0-9]+, x[0-9]+, #0, #1}}
Dfast-isel-shift.ll12 ; CHECK: sbfx [[REG1:w[0-9]+]], {{w[0-9]*}}, #0, #1
29 ; CHECK: sbfx {{w[0-9]*}}, {{w[0-9]*}}, #0, #1
45 ; CHECK: sbfx {{x[0-9]*}}, {{x[0-9]*}}, #0, #1
61 ; CHECK: sbfx [[REG1:w[0-9]+]], {{w[0-9]*}}, #0, #1
79 ; CHECK: sbfx [[REG1:w[0-9]+]], {{w[0-9]*}}, #0, #1
406 ; CHECK: sbfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
421 ; CHECK: sbfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
437 ; CHECK: sbfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
455 ; CHECK: sbfx {{w[0-9]*}}, {{w[0-9]*}}, #8, #8
491 ; CHECK-NEXT: sbfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
Darm64-shifted-sext.ll21 ; CHECK: sbfx w0, [[REG]], #4, #4
69 ; CHECK: sbfx w0, [[REG]], #4, #4
114 ; CHECK: sbfx x0, x[[REG]], #4, #4
159 ; CHECK: sbfx w0, [[REG]], #4, #12
204 ; CHECK: sbfx x0, x[[REG]], #4, #12
249 ; CHECK: sbfx x0, x[[REG]], #4, #28
Dbitfield.ll139 ; CHECK: sbfx {{x[0-9]+}}, {{x[0-9]+}}, #0, #1
189 ; sbfx rather than just 32-bits.
190 ; CHECK: sbfx x0, x0, #0, #1
216 ; CHECK: sbfx {{w[0-9]+}}, {{w[0-9]+}}, #6, #3
226 ; CHECK: sbfx {{x[0-9]+}}, {{x[0-9]+}}, #0, #63
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dbitfield-extract.ll4 ; CHECK: sbfx {{x[0-9]+}}, x0, #23, #9
13 ; CHECK: sbfx w0, w0, #23, #8
21 ; CHECK: sbfx w0, w0, #23, #8
29 ; CHECK: sbfx w0, w0, #15, #16
37 ; CHECK: sbfx w0, w0, #16, #8
45 ; CHECK: sbfx x0, x0, #30, #8
53 ; CHECK: sbfx x0, x0, #23, #16
90 ; CHECK: sbfx x0, x0, #23, #16
Dselect-sve.ll8 ; CHECK-NEXT: sbfx x8, x0, #0, #1
20 ; CHECK-NEXT: sbfx x8, x0, #0, #1
32 ; CHECK-NEXT: sbfx x8, x0, #0, #1
44 ; CHECK-NEXT: sbfx x8, x0, #0, #1
56 ; CHECK-NEXT: sbfx x8, x0, #0, #1
68 ; CHECK-NEXT: sbfx x8, x0, #0, #1
80 ; CHECK-NEXT: sbfx x8, x0, #0, #1
92 ; CHECK-NEXT: sbfx x8, x0, #0, #1
104 ; CHECK-NEXT: sbfx x8, x0, #0, #1
116 ; CHECK-NEXT: sbfx x8, x0, #0, #1
[all …]
Dbool-loads.ll11 ; CHECK: {{sbfx x[0-9]+, x[0-9]+, #0, #1|sbfx w[0-9]+, w[0-9]+, #0, #1}}
23 ; CHECK: {{sbfx x[0-9]+, x[0-9]+, #0, #1}}
Dfast-isel-shift.ll12 ; CHECK: sbfx [[REG1:w[0-9]+]], {{w[0-9]*}}, #0, #1
29 ; CHECK: sbfx {{w[0-9]*}}, {{w[0-9]*}}, #0, #1
45 ; CHECK: sbfx {{x[0-9]*}}, {{x[0-9]*}}, #0, #1
61 ; CHECK: sbfx [[REG1:w[0-9]+]], {{w[0-9]*}}, #0, #1
79 ; CHECK: sbfx [[REG1:w[0-9]+]], {{w[0-9]*}}, #0, #1
406 ; CHECK: sbfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
421 ; CHECK: sbfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
437 ; CHECK: sbfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
455 ; CHECK: sbfx {{w[0-9]*}}, {{w[0-9]*}}, #8, #8
491 ; CHECK-NEXT: sbfx {{w[0-9]*}}, {{w[0-9]*}}, #4, #4
Darm64-shifted-sext.ll21 ; CHECK: sbfx w0, [[REG]], #4, #4
69 ; CHECK: sbfx w0, [[REG]], #4, #4
114 ; CHECK: sbfx x0, x[[REG]], #4, #4
159 ; CHECK: sbfx w0, [[REG]], #4, #12
204 ; CHECK: sbfx x0, x[[REG]], #4, #12
249 ; CHECK: sbfx x0, x[[REG]], #4, #28
Dbitfield.ll139 ; CHECK: sbfx {{x[0-9]+}}, {{x[0-9]+}}, #0, #1
189 ; sbfx rather than just 32-bits.
190 ; CHECK: sbfx x0, x0, #0, #1
216 ; CHECK: sbfx {{w[0-9]+}}, {{w[0-9]+}}, #6, #3
226 ; CHECK: sbfx {{x[0-9]+}}, {{x[0-9]+}}, #0, #63
Dhwasan-check-memaccess.ll47 ; CHECK-NEXT: sbfx x16, x0, #4, #52
78 ; CHECK-NEXT: sbfx x16, x1, #4, #52
94 ; CHECK-NEXT: sbfx x16, x1, #4, #52
/external/llvm/test/CodeGen/ARM/
Dsbfx.ll6 ; CHECK: sbfx r0, r0, #0, #20
24 ; CHECK: sbfx r0, r0, #5, #3
42 ; CHECK-NOT: sbfx
51 ; CHECK: sbfx r0, r0, #23, #8
60 ; CHECK-NOT: sbfx
/external/llvm-project/llvm/test/CodeGen/ARM/
Dsbfx.ll6 ; CHECK: sbfx r0, r0, #0, #20
24 ; CHECK: sbfx r0, r0, #5, #3
42 ; CHECK-NOT: sbfx
51 ; CHECK: sbfx r0, r0, #23, #8
60 ; CHECK-NOT: sbfx
/external/libhevc/common/arm64/
Dihevc_intra_pred_filters_chroma_mode_19_to_25.s266 sbfx x9,x14,#0,#8
271 sbfx x9,x14,#8,#8
276 sbfx x9,x14,#16,#8
288 sbfx x9,x14,#24,#8
315 sbfx x9,x14,#0,#8
323 sbfx x9,x14,#8,#8
334 sbfx x9,x14,#16,#8
348 sbfx x9,x14,#24,#8
391 sbfx x9,x14,#0,#8
397 sbfx x9,x14,#8,#8
[all …]
Dihevc_intra_pred_filters_luma_mode_19_to_25.s269 sbfx x9,x14,#0,#8
274 sbfx x9,x14,#8,#8
279 sbfx x9,x14,#16,#8
291 sbfx x9,x14,#24,#8
318 sbfx x9,x14,#0,#8
326 sbfx x9,x14,#8,#8
337 sbfx x9,x14,#16,#8
351 sbfx x9,x14,#24,#8
390 sbfx x9,x14,#0,#8
396 sbfx x9,x14,#8,#8
[all …]
/external/libhevc/common/arm/
Dihevc_intra_pred_filters_chroma_mode_19_to_25.s273 sbfx r9,lr,#0,#8
278 sbfx r9,lr,#8,#8
283 sbfx r9,lr,#16,#8
295 sbfx r9,lr,#24,#8
322 sbfx r9,lr,#0,#8
330 sbfx r9,lr,#8,#8
341 sbfx r9,lr,#16,#8
355 sbfx r9,lr,#24,#8
396 sbfx r9,lr,#0,#8
402 sbfx r9,lr,#8,#8
[all …]
Dihevc_intra_pred_filters_luma_mode_19_to_25.s276 sbfx r9,lr,#0,#8
281 sbfx r9,lr,#8,#8
286 sbfx r9,lr,#16,#8
298 sbfx r9,lr,#24,#8
324 sbfx r9,lr,#0,#8
332 sbfx r9,lr,#8,#8
343 sbfx r9,lr,#16,#8
357 sbfx r9,lr,#24,#8
393 sbfx r9,lr,#0,#8
399 sbfx r9,lr,#8,#8
[all …]
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-bitfield.txt16 # CHECK: sbfx w1, w2, #1, #15
17 # CHECK: sbfx x1, x2, #1, #15
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/
Darm64-bitfield.txt16 # CHECK: sbfx w1, w2, #1, #15
17 # CHECK: sbfx x1, x2, #1, #15
/external/llvm/test/MC/AArch64/
Darm64-bitfield-encoding.s21 ; CHECK: sbfx w1, w2, #1, #15 ; encoding: [0x41,0x3c,0x01,0x13]
22 ; CHECK: sbfx x1, x2, #1, #15 ; encoding: [0x41,0x3c,0x41,0x93]
/external/llvm-project/llvm/test/MC/AArch64/
Darm64-bitfield-encoding.s21 ; CHECK: sbfx w1, w2, #1, #15 ; encoding: [0x41,0x3c,0x01,0x13]
22 ; CHECK: sbfx x1, x2, #1, #15 ; encoding: [0x41,0x3c,0x41,0x93]
/external/llvm-project/llvm/test/CodeGen/Thumb2/
Dthumb2-sxt_rot.ll17 ; CHECK-DSP: sbfx r0, r0, #8, #8
18 ; CHECK-NO-DSP: sbfx r0, r0, #8, #8
/external/webrtc/common_audio/signal_processing/
Dfilter_ar_fast_q12_armv7.S88 sbfx r11, r6, #12, #16
99 sbfx r11, r6, #12, #16
/external/llvm/test/CodeGen/Thumb2/
Dbfx.ll5 ; CHECK: sbfx r0, r0, #7, #11

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