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Searched refs:sevl (Results 1 – 25 of 47) sorted by relevance

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/external/llvm/test/MC/ARM/
Dbasic-thumb2-instructions-v8.s86 sevl
87 sevl.w
91 @ CHECK-V8: sevl @ encoding: [0x50,0xbf]
92 @ CHECK-V8: sevl.w @ encoding: [0xaf,0xf3,0x05,0x80]
Dbasic-arm-instructions-v8.s56 sevl
58 @ CHECK-V8: sevl @ encoding: [0x05,0xf0,0x20,0xe3]
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2-v8.txt2 # CHECK: sevl
3 # CHECK: sevl.w
Dbasic-arm-instructions-v8.txt23 # CHECK: sevl
/external/llvm-project/llvm/test/MC/Disassembler/ARM/
Dthumb2-v8.txt2 # CHECK: sevl
3 # CHECK: sevl.w
Dbasic-arm-instructions-v8.txt23 # CHECK: sevl
/external/llvm-project/llvm/test/MC/ARM/
Dbasic-thumb2-instructions-v8.s96 sevl
97 sevl.w
101 @ CHECK-V8: sevl @ encoding: [0x50,0xbf]
102 @ CHECK-V8: sevl.w @ encoding: [0xaf,0xf3,0x05,0x80]
Dbasic-arm-instructions-v8.s56 sevl
58 @ CHECK-V8: sevl @ encoding: [0x05,0xf0,0x20,0xe3]
/external/llvm-project/clang/test/CodeGen/
Dbuiltins-arm-microsoft.c35 void sevl() { in sevl() function
Dbuiltins-arm.c69 void sevl() { in sevl() function
/external/clang/test/CodeGen/
Dbuiltins-arm-microsoft.c35 void sevl() { in sevl() function
Dbuiltins-arm.c53 void sevl() { in sevl() function
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions-v8.s.cs10 0x05,0xf0,0x20,0xe3 = sevl
/external/arm-trusted-firmware/lib/locks/exclusive/aarch64/
Dspinlock.S52 sevl
/external/llvm-project/llvm/test/CodeGen/ARM/
Dintrinsics-v8.ll12 ; CHECK: sevl
/external/llvm/test/CodeGen/ARM/
Dintrinsics-v8.ll12 ; CHECK: sevl
/external/llvm/test/CodeGen/AArch64/
Dhints.ll57 ; CHECK: sevl
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dhints.ll57 ; CHECK: sevl
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-system.txt13 # CHECK: sevl
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/
Darm64-system.txt13 # CHECK: sevl
/external/llvm/test/MC/AArch64/
Darm64-system-encoding.s12 sevl
19 ; CHECK: sevl ; encoding: [0xbf,0x20,0x03,0xd5]
/external/llvm-project/llvm/test/MC/AArch64/
Darm64-system-encoding.s13 sevl
20 ; CHECK: sevl ; encoding: [0xbf,0x20,0x03,0xd5]
/external/llvm-project/llvm/test/tools/llvm-mca/ARM/
Dcortex-a57-basic-instructions.s865 sevl
1735 # CHECK-NEXT: 0 0 0.00 * * U sevl
2612 # CHECK-NEXT: - - - - - - - - sevl
/external/llvm/lib/Target/ARM/
DARMInstrThumb.td307 def : tInstAlias<"sevl$p", (tHINT 5, pred:$p), 1> {
/external/capstone/suite/MC/AArch64/
Dbasic-a64-instructions.s.cs1347 0xbf,0x20,0x03,0xd5 = sevl

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