Home
last modified time | relevance | path

Searched refs:shift_right_logical (Results 1 – 14 of 14) sorted by relevance

/external/llvm-project/mlir/test/Dialect/SPIRV/Serialization/
Dbit-ops.mlir53 …spv.func @shift_right_logical(%arg0: vector<2xi32>, %arg1 : vector<2xi8>) -> vector<2xi32> "None" {
/external/tensorflow/tensorflow/compiler/mlir/hlo/tests/
Dhlo-legalize-to-lhlo.mlir421 // CHECK-LABEL: func @shift_right_logical
422 func @shift_right_logical(%lhs: tensor<2x2xi32>, %rhs: tensor<2x2xi32>)
424 %result = "mhlo.shift_right_logical"(%lhs, %rhs)
426 // CHECK: "lmhlo.shift_right_logical"(%{{.*}}, %{{.*}})
Dchlo_legalize_to_hlo_broadcasts.mlir220 // CHECK: mhlo.shift_right_logical %arg0, %arg1
Dhlo-legalize-to-linalg.mlir854 func @shift_right_logical(%lhs: tensor<2x2xi32>,
856 %result = "mhlo.shift_right_logical"(%lhs, %rhs)
860 // CHECK-LABEL: func @shift_right_logical
Dlhlo_ops.mlir737 …"lmhlo.shift_right_logical"(%arg0, %arg1, %arg_out) : (memref<1xi32>, memref<1xi32>, memref<1xi32>…
745 …"lmhlo.shift_right_logical"(%arg0, %arg1, %arg_out) : (memref<1xf32>, memref<1xf32>, memref<1xf32>…
/external/tensorflow/tensorflow/compiler/tests/
Dxla_ops_test.py106 xla.shift_right_logical,
111 xla.shift_right_logical,
/external/tensorflow/tensorflow/compiler/tf2xla/python/
Dxla.py202 shift_right_logical = _broadcasting_binary_op(_shift_right_logical_helper) variable
/external/tensorflow/tensorflow/compiler/mlir/xla/tests/hlo_to_lhlo_with_xla/
Dops.mlir573 // CHECK: lmhlo.shift_right_logical
576 …%res = "mhlo.shift_right_logical"(%value0, %value1) : (tensor<2x2xi32>, tensor<2x2xi32>) -> tensor…
/external/llvm/bindings/ocaml/llvm/
Dllvm.ml823 let align = Int32.logand (Int32.shift_right_logical a 16) 31l in
831 let stackalign = Int32.logand (Int32.shift_right_logical a 26) 7l in
/external/tensorflow/tensorflow/compiler/mlir/hlo/include/mlir-hlo/Dialect/mhlo/IR/
Dlhlo_ops.td193 def LHLO_ShiftRightLogicalOp : LHLO_BinaryElementwiseOp<"shift_right_logical", LHLO_IntBuffer>, BAS…
Dhlo_ops.td360 def HLO_ShiftRightLogicalOp : HLO_BinaryElementwiseOp<"shift_right_logical",
/external/llvm-project/mlir/test/Dialect/SPIRV/
Dops.mlir1033 func @shift_right_logical(%arg0: vector<2xi32>, %arg1 : vector<2xi8>) -> vector<2xi32> {
/external/tensorflow/tensorflow/compiler/mlir/xla/tests/translate/
Dexport.mlir120 %3 = mhlo.shift_right_logical %arg0, %arg1 : tensor<4xi32>
Dimport.hlotxt986 // CHECK: mhlo.shift_right_logical [[VAL_0]], [[VAL_1]]