/external/mesa3d/src/gallium/drivers/freedreno/ |
D | freedreno_draw.h | 46 enum pc_di_src_sel src_sel, uint32_t count, in fd_draw() argument 97 OUT_RING(ring, DRAW_A20X(primtype, DI_FACE_CULL_NONE, src_sel, in fd_draw() 110 OUT_RINGP(ring, DRAW(primtype, src_sel, idx_type, 0, instances), in fd_draw() 113 OUT_RING(ring, DRAW(primtype, src_sel, idx_type, vismode, instances)); in fd_draw() 152 enum pc_di_src_sel src_sel; in fd_draw_emit() local 162 src_sel = DI_SRC_SEL_DMA; in fd_draw_emit() 168 src_sel = DI_SRC_SEL_AUTO_INDEX; in fd_draw_emit() 171 fd_draw(batch, ring, primtype, vismode, src_sel, in fd_draw_emit()
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/external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
D | fd5_draw.h | 46 enum pc_di_src_sel src_sel, uint32_t count, in fd5_draw() argument 64 OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0), in fd5_draw() 67 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode)); in fd5_draw() 91 enum pc_di_src_sel src_sel; in fd5_draw_emit() local 131 src_sel = DI_SRC_SEL_DMA; in fd5_draw_emit() 137 src_sel = DI_SRC_SEL_AUTO_INDEX; in fd5_draw_emit() 140 fd5_draw(batch, ring, primtype, vismode, src_sel, in fd5_draw_emit()
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/external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
D | fd4_draw.h | 52 enum pc_di_src_sel src_sel, uint32_t count, in fd4_draw() argument 70 OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0), in fd4_draw() 73 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode)); in fd4_draw() 97 enum pc_di_src_sel src_sel; in fd4_draw_emit() local 136 src_sel = DI_SRC_SEL_DMA; in fd4_draw_emit() 142 src_sel = DI_SRC_SEL_AUTO_INDEX; in fd4_draw_emit() 145 fd4_draw(batch, ring, primtype, vismode, src_sel, in fd4_draw_emit()
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/external/mesa3d/src/gallium/drivers/r600/sb/ |
D | sb_bc_builder.cpp | 556 .SRC_SEL_X(bc.src_sel[0]) in build_fetch_tex() 557 .SRC_SEL_Y(bc.src_sel[1]) in build_fetch_tex() 558 .SRC_SEL_Z(bc.src_sel[2]) in build_fetch_tex() 559 .SRC_SEL_W(bc.src_sel[3]); in build_fetch_tex() 581 .SRC_SEL_X(bc.src_sel[0]) in build_fetch_gds() 582 .SRC_SEL_Y(bc.src_sel[1]) in build_fetch_gds() 583 .SRC_SEL_Z(bc.src_sel[2]); in build_fetch_gds() 619 .SRC_SEL_X(bc.src_sel[0]) in build_fetch_vtx() 631 .SRC_SEL_X(bc.src_sel[0]) in build_fetch_vtx() 632 .SRC_SEL_Y(bc.src_sel[1]) in build_fetch_vtx() [all …]
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D | sb_bc_decoder.cpp | 491 bc.src_sel[0] = w2.get_SRC_SEL_X(); in decode_fetch() 492 bc.src_sel[1] = w2.get_SRC_SEL_Y(); in decode_fetch() 493 bc.src_sel[2] = w2.get_SRC_SEL_Z(); in decode_fetch() 494 bc.src_sel[3] = w2.get_SRC_SEL_W(); in decode_fetch() 514 bc.src_sel[0] = w0.get_SRC_SEL_X(); in decode_fetch_gds() 515 bc.src_sel[1] = w0.get_SRC_SEL_Y(); in decode_fetch_gds() 516 bc.src_sel[2] = w0.get_SRC_SEL_Z(); in decode_fetch_gds() 550 bc.src_sel[1] = w0.get_SRC_SEL_Y(); in decode_fetch_mem() 553 bc.src_sel[0] = w0.get_SRC_SEL_X(); in decode_fetch_mem() 593 bc.src_sel[0] = w0.get_SRC_SEL_X(); in decode_fetch_vtx() [all …]
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D | sb_bc_finalize.cpp | 537 dst.bc.src_sel[chan] = sel; in copy_fetch_src() 600 unsigned sel = f->bc.src_sel[chan]; in finalize_fetch() 644 f->bc.src_sel[chan] = sel; in finalize_fetch()
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D | sb_bc_parser.cpp | 689 unsigned sw = n->bc.src_sel[s]; in prepare_fetch_clause() 720 if (n->bc.src_sel[s] <= SEL_W) in prepare_fetch_clause() 722 n->bc.src_sel[s], false); in prepare_fetch_clause()
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D | sb_bc_dump.cpp | 505 s << chans[n.bc.src_sel[k]]; in dump()
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D | sb_bc.h | 579 unsigned src_sel[4]; member
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/external/mesa3d/src/gallium/drivers/r600/sfn/ |
D | sfn_instruction_gds.h | 47 int src_sel() const { in src_sel() function
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D | sfn_ir_to_assembly.cpp | 872 gds.src_gpr = instr.src_sel(); in emit_gds()
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/external/mesa3d/src/gallium/drivers/radeonsi/ |
D | si_cp_dma.c | 596 struct si_resource *dst, unsigned dst_offset, unsigned src_sel, in si_cp_copy_data() argument 611 radeon_emit(cs, COPY_DATA_SRC_SEL(src_sel) | COPY_DATA_DST_SEL(dst_sel) | COPY_DATA_WR_CONFIRM); in si_cp_copy_data()
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D | si_pipe.h | 1382 struct si_resource *dst, unsigned dst_offset, unsigned src_sel,
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/external/mesa3d/src/gallium/drivers/nouveau/nvc0/ |
D | nvc0_query_hw_sm.c | 601 uint32_t src_sel; /* signal selection for up to 4 sources */ member 2370 PUSH_DATA (push, cfg->ctr[i].src_sel + 0x2108421 * (c & 3)); in nve4_hw_sm_begin_query() 2451 PUSH_DATA (push, cfg->ctr[i].src_sel | mask_sel); in nvc0_hw_sm_begin_query()
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/external/cpuinfo/test/dmesg/ |
D | xiaomi-mi-5c.log | 49 [ 0.000000] rate: 460800000, src_sel: 1, div: 0, gr: 4 50 [ 0.000000] rate: 624000000, src_sel: 3, div: 0, gr: 8 51 [ 0.000000] rate: 921600000, src_sel: 1, div: 0, gr: 8 52 [ 0.000000] rate: 1248000000, src_sel: 3, div: 0, gr: 16 53 [ 0.000000] rate: 1558000000, src_sel: 2, div: 0, gr: 16 54 [ 0.000000] rate: 1843200000, src_sel: 1, div: 0, gr: 16 55 [ 0.000000] rate: 1950000000, src_sel: 0, div: 0, gr: 16 56 [ 0.000000] rate: 2002000000, src_sel: 0, div: 0, gr: 16 57 [ 0.000000] rate: 2106000000, src_sel: 0, div: 0, gr: 16 58 [ 0.000000] rate: 2158000000, src_sel: 0, div: 0, gr: 16 [all …]
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/external/mesa3d/src/freedreno/vulkan/ |
D | tu_cmd_buffer.c | 3408 tu_draw_initiator(struct tu_cmd_buffer *cmd, enum pc_di_src_sel src_sel) in tu_draw_initiator() argument 3418 CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT(src_sel) | in tu_draw_initiator()
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/external/llvm/lib/Target/AMDGPU/ |
D | R600Instructions.td | 40 // src_sel for ALU src operands, see also ALU_CONST, ALU_PARAM registers
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | R600Instructions.td | 45 // src_sel for ALU src operands, see also ALU_CONST, ALU_PARAM registers
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | R600Instructions.td | 45 // src_sel for ALU src operands, see also ALU_CONST, ALU_PARAM registers
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