/external/llvm-project/llvm/test/CodeGen/XCore/ |
D | store.ll | 21 define void @store16(i16* %p, i32 %offset, i16 %val) nounwind { 23 ; CHECK-LABEL: store16:
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/external/llvm/test/CodeGen/XCore/ |
D | store.ll | 21 define void @store16(i16* %p, i32 %offset, i16 %val) nounwind { 23 ; CHECK-LABEL: store16:
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/external/llvm/test/CodeGen/WebAssembly/ |
D | store-trunc.ll | 17 ; CHECK: i32.store16 $drop=, 0($0), $1{{$}} 33 ; CHECK: i64.store16 $drop=, 0($0), $1{{$}}
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D | i32-load-store-alignment.ll | 189 ; CHECK-NEXT: i32.store16 $drop=, 0($0):p2align=0, $1{{$}} 198 ; CHECK-NEXT: i32.store16 $drop=, 0($0), $1{{$}} 207 ; CHECK-NEXT: i32.store16 $drop=, 0($0), $1{{$}}
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D | i64-load-store-alignment.ll | 259 ; CHECK-NEXT: i64.store16 $drop=, 0($0):p2align=0, $1{{$}} 269 ; CHECK-NEXT: i64.store16 $drop=, 0($0), $1{{$}} 279 ; CHECK-NEXT: i64.store16 $drop=, 0($0), $1{{$}}
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D | inline-asm.ll | 62 ; CHECK: i32.store16 $drop=, 0($0), $1{{$}}
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/external/llvm-project/llvm/test/CodeGen/WebAssembly/ |
D | store-trunc.ll | 15 ; CHECK: i32.store16 0($0), $1{{$}} 31 ; CHECK: i64.store16 0($0), $1{{$}}
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D | store-trunc-atomic.ll | 15 ; CHECK: i32.atomic.store16 0($0), $1{{$}} 31 ; CHECK: i64.atomic.store16 0($0), $1{{$}}
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D | simd-illegal-signext.ll | 14 ; CHECK-NEXT: i32.store16
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D | i32-load-store-alignment.ll | 189 ; CHECK-NEXT: i32.store16 0($0):p2align=0, $1{{$}} 198 ; CHECK-NEXT: i32.store16 0($0), $1{{$}} 207 ; CHECK-NEXT: i32.store16 0($0), $1{{$}}
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D | pr47375.ll | 30 ; CHECK-NEXT: i32.store16 0
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D | simd-load-lane-offset.ll | 18 declare void @llvm.wasm.store16.lane(i16*, <8 x i16>, i32) 388 tail call void @llvm.wasm.store16.lane(i16* %p, <8 x i16> %v, i32 0) 405 tail call void @llvm.wasm.store16.lane(i16* %s, <8 x i16> %v, i32 0) 420 tail call void @llvm.wasm.store16.lane(i16* %s, <8 x i16> %v, i32 0) 435 tail call void @llvm.wasm.store16.lane(i16* %s, <8 x i16> %v, i32 0) 452 tail call void @llvm.wasm.store16.lane(i16* %s, <8 x i16> %v, i32 0) 467 tail call void @llvm.wasm.store16.lane(i16* %s, <8 x i16> %v, i32 0) 480 tail call void @llvm.wasm.store16.lane(i16* %s, <8 x i16> %v, i32 0) 492 tail call void @llvm.wasm.store16.lane(i16* @gv_i16, <8 x i16> %v, i32 0)
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D | i64-load-store-alignment.ll | 254 ; CHECK-NEXT: i64.store16 0($0):p2align=0, $1{{$}} 264 ; CHECK-NEXT: i64.store16 0($0), $1{{$}} 274 ; CHECK-NEXT: i64.store16 0($0), $1{{$}}
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/external/llvm-project/llvm/test/MC/WebAssembly/ |
D | atomics-encodings.s | 37 # CHECK: i32.atomic.store16 0 # encoding: [0xfe,0x1a,0x01,0x00] 38 i32.atomic.store16 0 41 # CHECK: i64.atomic.store16 0 # encoding: [0xfe,0x1c,0x01,0x00] 42 i64.atomic.store16 0
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/external/llvm/test/Instrumentation/DataFlowSanitizer/ |
D | store.ll | 47 define void @store16(i16 %v, i16* %p) { 48 ; NO_COMBINE_PTR_LABEL: @"dfs$store16" 60 ; COMBINE_PTR_LABEL: @"dfs$store16"
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/external/llvm-project/llvm/test/Instrumentation/DataFlowSanitizer/ |
D | store.ll | 47 define void @store16(i16 %v, i16* %p) { 48 ; NO_COMBINE_PTR_LABEL: @"dfs$store16" 60 ; COMBINE_PTR_LABEL: @"dfs$store16"
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/external/llvm/test/Instrumentation/AddressSanitizer/ |
D | experiment.ll | 97 define void @store16(i128* %p) sanitize_address { 101 ; CHECK-LABEL: define void @store16
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D | experiment-call.ll | 97 define void @store16(i128* %p) sanitize_address { 101 ; CHECK-LABEL: define void @store16
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/external/llvm-project/llvm/test/Instrumentation/AddressSanitizer/ |
D | experiment.ll | 98 define void @store16(i128* %p) sanitize_address { 102 ; CHECK-LABEL: define void @store16
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D | experiment-call.ll | 98 define void @store16(i128* %p) sanitize_address { 102 ; CHECK-LABEL: define void @store16
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/external/llvm-project/clang/test/CodeGenCXX/ |
D | atomic-inline.cpp | 53 void store16() { in store16() function
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/external/llvm-project/llvm/test/CodeGen/AVR/ |
D | store.ll | 10 define void @store16(i16* %x, i16 %y) { 11 ; CHECK-LABEL: store16:
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/external/llvm-project/llvm/test/CodeGen/ARC/ |
D | ldst.ll | 89 ; CHECK-LABEL: store16 93 define void @store16(i16 zeroext %val, i16* %bp) nounwind {
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/external/llvm-project/llvm/test/CodeGen/X86/ |
D | masked_compressstore.ll | 75 ; SSE-NEXT: LBB0_13: ## %cond.store16 142 ; AVX1-NEXT: LBB0_13: ## %cond.store16 210 ; AVX2-NEXT: LBB0_13: ## %cond.store16 334 ; SSE-NEXT: LBB1_13: ## %cond.store16 472 ; AVX1OR2-NEXT: LBB1_13: ## %cond.store16 912 ; SSE2-NEXT: LBB4_13: ## %cond.store16 984 ; SSE42-NEXT: LBB4_13: ## %cond.store16 1054 ; AVX1-NEXT: LBB4_13: ## %cond.store16 1125 ; AVX2-NEXT: LBB4_13: ## %cond.store16 1429 ; SSE2-NEXT: LBB6_13: ## %cond.store16 [all …]
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/external/skia/src/opts/ |
D | SkVM_opts.h | 106 STRIDE_1(Op::store16): memcpy(args[immA], &r[x].i32, 2); break; in interpret_skvm() 112 STRIDE_K(Op::store16): skvx::cast<uint16_t>(r[x].i32).store(args[immA]); break; in interpret_skvm()
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