| /external/arm-trusted-firmware/drivers/renesas/common/scif/ |
| D | scif.S | 186 strh w1, [x0, #SCIF_SCSCR]
190 strh w1, [x0, #SCIF_SCFCR]
196 strh w1, [x0, #SCIF_SCFSR]
198 strh w1, [x0, #SCIF_SCLSR]
204 strh w1, [x0, #SCIF_SCSCR]
207 strh w1, [x0, #SCIF_SCSMR]
246 strh w1, [x0, #SCIF_DL]
248 strh w1, [x0, #SCIF_CKS]
260 strh w1, [x0, #SCIF_SCFCR]
264 strh w1, [x0, #SCIF_SCSCR]
[all …]
|
| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-strh.ll | 5 ; CHECK: strh r0, [r1]
12 ; CHECK: strh.w r0, [r1, #4092]
20 ; CHECK: strh r0, [r1, #-128]
29 ; CHECK: strh r0, [r1, r2]
38 ; CHECK: strh r0, [r1, #-128]
48 ; CHECK: strh r0, [r1, r2]
58 ; CHECK: strh.w r0, [r1, r2, lsl #2]
70 ; CHECK: strh r0, [r1, r2]
|
| /external/llvm-project/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-strh.ll | 5 ; CHECK: strh r0, [r1]
12 ; CHECK: strh.w r0, [r1, #4092]
20 ; CHECK: strh r0, [r1, #-128]
29 ; CHECK: strh r0, [r1, r2]
38 ; CHECK: strh r0, [r1, #-128]
48 ; CHECK: strh r0, [r1, r2]
58 ; CHECK: strh.w r0, [r1, r2, lsl #2]
70 ; CHECK: strh r0, [r1, r2]
|
| D | mve-scatter-ind16-unscaled.ll | 78 ; CHECK-NEXT: strh r1, [r0]
81 ; CHECK-NEXT: strh r1, [r0]
84 ; CHECK-NEXT: strh r1, [r0]
87 ; CHECK-NEXT: strh r1, [r0]
90 ; CHECK-NEXT: strh r1, [r0]
93 ; CHECK-NEXT: strh r1, [r0]
96 ; CHECK-NEXT: strh r1, [r0]
99 ; CHECK-NEXT: strh r1, [r0]
158 ; CHECK-NEXT: strh r1, [r0]
161 ; CHECK-NEXT: strh r1, [r0]
[all …]
|
| D | mve-scatter-ind16-scaled.ll | 62 ; CHECK-NEXT: strh r1, [r0]
65 ; CHECK-NEXT: strh r1, [r0]
68 ; CHECK-NEXT: strh r1, [r0]
71 ; CHECK-NEXT: strh r1, [r0]
74 ; CHECK-NEXT: strh r1, [r0]
77 ; CHECK-NEXT: strh r1, [r0]
80 ; CHECK-NEXT: strh r1, [r0]
83 ; CHECK-NEXT: strh r1, [r0]
194 ; CHECK-NEXT: strh r1, [r0]
197 ; CHECK-NEXT: strh r1, [r0]
[all …]
|
| D | mve-scatter-ptrs.ll | 208 ; CHECK-NEXT: strh r1, [r0]
211 ; CHECK-NEXT: strh r1, [r0]
214 ; CHECK-NEXT: strh r1, [r0]
217 ; CHECK-NEXT: strh r1, [r0]
220 ; CHECK-NEXT: strh r1, [r0]
223 ; CHECK-NEXT: strh r1, [r0]
226 ; CHECK-NEXT: strh r1, [r0]
229 ; CHECK-NEXT: strh r1, [r0]
243 ; CHECK-NEXT: strh r2, [r1]
245 ; CHECK-NEXT: strh r1, [r0]
[all …]
|
| /external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Exynos/ |
| D | store.s | 8 strh w0, [sp, #2]! label
11 strh w0, [sp, x31, lsl #1] label
50 # M3-NEXT: 1 1 1.00 * strh w0, [sp, #2]!
53 # M3-NEXT: 1 1 1.00 * strh w0, [sp, xzr, lsl #1]
62 # M4-NEXT: 1 1 0.50 * strh w0, [sp, #2]!
65 # M4-NEXT: 1 1 0.50 * strh w0, [sp, xzr, lsl #1]
74 # M5-NEXT: 1 1 0.50 * strh w0, [sp, #2]!
77 # M5-NEXT: 1 1 0.50 * strh w0, [sp, xzr, lsl #1]
|
| /external/capstone/suite/MC/ARM/ |
| D | arm-memory-instructions.s.cs | 126 0xb0,0x30,0xc4,0xe1 = strh r3, [r4]
127 0xb4,0x20,0xc7,0xe1 = strh r2, [r7, #4]
128 0xb0,0x14,0xe8,0xe1 = strh r1, [r8, #64]!
129 0xb4,0xc0,0xcd,0xe0 = strh r12, [sp], #4
130 0xb4,0x60,0x85,0xe1 = strh r6, [r5, r4]
131 0xbb,0x30,0xa8,0xe1 = strh r3, [r8, r11]!
132 0xb1,0x10,0x22,0xe1 = strh r1, [r2, -r1]!
133 0xb2,0x90,0x87,0xe0 = strh r9, [r7], r2
134 0xb2,0x40,0x03,0xe0 = strh r4, [r3], -r2
|
| D | basic-thumb-instructions.s.cs | 114 0x1b,0x80 = strh r3, [r3]
115 0x74,0x80 = strh r4, [r6, #2]
116 0xfd,0x87 = strh r5, [r7, #62]
117 0x96,0x53 = strh r6, [r2, r6]
|
| /external/llvm-project/llvm/test/CodeGen/Thumb/ |
| D | bic_imm.ll | 44 ; CHECK-T1-NEXT: strh r0, [r1]
50 ; CHECK-T2-NEXT: strh r0, [r1]
62 ; CHECK-T1-NEXT: strh r0, [r1]
68 ; CHECK-T2-NEXT: strh r0, [r1]
80 ; CHECK-T1-NEXT: strh r0, [r1]
86 ; CHECK-T2-NEXT: strh r0, [r1]
99 ; CHECK-T1-NEXT: strh r2, [r1]
110 ; CHECK-T2-NEXT: strh r0, [r1]
|
| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | cortex-a57-memory-instructions.s | 154 strh r3, [r4]
155 strh r2, [r7, #4]
156 strh r1, [r8, #64]!
157 strh r12, [sp], #4
158 strh r6, [r5, r4]
159 strh r3, [r8, r11]!
160 strh r1, [r2, -r1]!
161 strh r9, [r7], r2
162 strh r4, [r3], -r2
326 # CHECK-NEXT: 1 1 1.00 * strh r3, [r4]
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | illegal-bitfield-loadstore.ll | 10 ; LE-NEXT: strh r1, [r0]
21 ; BE-NEXT: strh r1, [r0]
35 ; LE-NEXT: strh r1, [r0]
44 ; BE-NEXT: strh r1, [r0]
61 ; LE-NEXT: strh r1, [r0]
72 ; BE-NEXT: strh r1, [r0]
102 ; BE-NEXT: strh r3, [r1]
134 ; BE-NEXT: strh r3, [r1]
169 ; BE-NEXT: strh r3, [r2]
|
| D | 2014-07-18-earlyclobber-str-post.ll | 15 define i16* @earlyclobber-strh-post(i16* %addr) nounwind {
16 ; CHECK-LABEL: earlyclobber-strh-post
17 ; CHECK-NOT: strh r[[REG:[0-9]+]], [r[[REG]]], #2
|
| D | fast-isel-ldrh-strh-arm.ll | 86 ; ARM: strh [[REG0]], [{{r[0-9]+}}, #-16]
91 ; strh r2, [r0, r1]
100 ; ARM: strh [[REG1]], {{\[}}[[REG0]]]
110 ; ARM: strh [[REG1]], [{{r[0-9]+}}, #16]
115 ; strh r2, [r0, r1]
123 ; ARM: strh [[REG1]], {{\[}}[[REG0]]]
|
| D | fast-isel-intrinsic.ll | 153 ; ARM: strh [[REG3]], {{\[}}[[REG0]], #12]
164 ; THUMB: strh [[REG4]], {{\[}}[[REG1]], #12]
183 ; ARM: strh [[REG1]], {{\[}}[[REG0]], #4]
185 ; ARM: strh [[REG2]], {{\[}}[[REG0]], #6]
187 ; ARM: strh [[REG3]], {{\[}}[[REG0]], #8]
189 ; ARM: strh [[REG4]], {{\[}}[[REG0]], #10]
191 ; ARM: strh [[REG5]], {{\[}}[[REG0]], #12]
198 ; THUMB: strh [[REG2]], {{\[}}[[REG1]], #4]
200 ; THUMB: strh [[REG3]], {{\[}}[[REG1]], #6]
202 ; THUMB: strh [[REG4]], {{\[}}[[REG1]], #8]
[all …]
|
| D | str_trunc.ll | 15 ; CHECK: strh
16 ; CHECK-NOT: strh
|
| D | arm-bf16-pcs.ll | 40 ; BASE-NEXT: strh r1, [r0]
56 ; BASE-NEXT: strh r1, [r0]
104 ; BASE-ARM-NEXT: strh r0, [sp, #2]
113 ; BASE-THUMB-NEXT: strh.w r0, [sp, #2]
133 ; BASE-ARM-NEXT: strh r0, [sp, #2]
143 ; BASE-THUMB-NEXT: strh.w r0, [sp, #2]
170 ; BASE-ARM-NEXT: strh r0, [sp, #6]
190 ; BASE-THUMB-NEXT: strh.w r0, [sp, #6]
259 ; BASE-ARM-NEXT: strh r0, [sp, #6]
286 ; BASE-THUMB-NEXT: strh.w r0, [sp, #6]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | fast-isel-ldrh-strh-arm.ll | 85 ; ARM: strh r1, [r0, #-16]
90 ; strh r2, [r0, r1]
98 ; ARM: strh r{{[1-9]}}, [r0]
107 ; ARM: strh r{{[1-9]}}, [r0, #16]
112 ; strh r2, [r0, r1]
119 ; ARM: strh r{{[1-9]}}, [r0]
|
| D | 2014-07-18-earlyclobber-str-post.ll | 15 define i16* @earlyclobber-strh-post(i16* %addr) nounwind {
16 ; CHECK-LABEL: earlyclobber-strh-post
17 ; CHECK-NOT: strh r[[REG:[0-9]+]], [r[[REG]]], #2
|
| D | fast-isel-intrinsic.ll | 163 ; ARM: strh r1, [r0, #12]
174 ; THUMB: strh r1, [r0, #12]
193 ; ARM: strh r1, [r0, #4]
195 ; ARM: strh r1, [r0, #6]
197 ; ARM: strh r1, [r0, #8]
199 ; ARM: strh r1, [r0, #10]
201 ; ARM: strh r1, [r0, #12]
208 ; THUMB: strh r1, [r0, #4]
210 ; THUMB: strh r1, [r0, #6]
212 ; THUMB: strh r1, [r0, #8]
[all …]
|
| D | str_trunc.ll | 15 ; CHECK: strh
16 ; CHECK-NOT: strh
|
| /external/llvm-project/llvm/test/tools/llvm-symbolizer/ |
| D | frame.s | 117 strh w8, [x25, x22]
126 strh w8, [x25, x23]
135 strh w8, [x25, x24]
154 strh w8, [x25, x26]
171 strh wzr, [x25, x22]
172 strh wzr, [x25, x23]
173 strh wzr, [x25, x24]
174 strh wzr, [x25, x26]
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | merge-trunc-store.ll | 8 ; LE-NEXT: strh w0, [x1]
15 ; BE-NEXT: strh w8, [x1]
29 ; LE-NEXT: strh w0, [x1]
36 ; BE-NEXT: strh w8, [x1]
74 ; LE-NEXT: strh w8, [x1]
79 ; BE-NEXT: strh w0, [x1]
469 ; BE-NEXT: strh w0, [x1]
470 ; BE-NEXT: strh w8, [x1, #2]
471 ; BE-NEXT: strh w9, [x1, #4]
472 ; BE-NEXT: strh w10, [x1, #6]
[all …]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | memory-arm-instructions.txt | 428 # CHECK: strh r3, [r4
429 # CHECK: strh r2, [r7, #4
430 # CHECK: strh r1, [r8, #64]!
431 # CHECK: strh r12, [sp], #4
447 # CHECK: strh r6, [r5, r4
448 # CHECK: strh r3, [r8, r11]!
449 # CHECK: strh r1, [r2, -r1]!
450 # CHECK: strh r9, [r7], r2
451 # CHECK: strh r4, [r3], -r2
|
| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | memory-arm-instructions.txt | 428 # CHECK: strh r3, [r4
429 # CHECK: strh r2, [r7, #4
430 # CHECK: strh r1, [r8, #64]!
431 # CHECK: strh r12, [sp], #4
447 # CHECK: strh r6, [r5, r4
448 # CHECK: strh r3, [r8, r11]!
449 # CHECK: strh r1, [r2, -r1]!
450 # CHECK: strh r9, [r7], r2
451 # CHECK: strh r4, [r3], -r2
|