| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | armv8.6a-simd-matmul-error.s | 21 sudot v31.2s, v1.8b, v2.4b[4] label
23 sudot v31.4s, v1.16b, v2.4b[4] label
31 sudot v31.4s, v1.8b, v2.4b[0] label
33 sudot v31.2s, v1.16b, v2.4b[0] label
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| D | armv8.6a-simd-matmul.s | 36 sudot v31.2s, v1.8b, v2.4b[3] label
37 sudot v31.4s, v1.16b, v2.4b[3] label
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| /external/llvm-project/llvm/test/MC/AArch64/SVE/ |
| D | matrix-multiply-int8-diagnostics.s | 54 sudot z0.s, z1.h, z2.b[0] label
62 sudot z0.s, z1.b, z9.b[0] label
68 sudot z0.s, z1.b, z2.b[4] label
77 sudot z0.s, z1.b, z2.b[3] label
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| D | matrix-multiply-int8.s | 101 sudot z0.s, z1.b, z2.b[3] label
125 sudot z0.s, z1.b, z2.b[0] label
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| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | sve-intrinsics-matmul-int8.ll | 82 ; CHECK-NEXT: sudot z0.s, z1.b, z2.b[0]
84 …%val = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> %r, <v…
91 ; CHECK-NEXT: sudot z0.s, z1.b, z2.b[1]
93 …%val = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> %r, <v…
100 ; CHECK-NEXT: sudot z0.s, z1.b, z2.b[2]
102 …%val = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> %r, <v…
109 ; CHECK-NEXT: sudot z0.s, z1.b, z2.b[3]
111 …%val = tail call <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32> %r, <v…
122 declare <vscale x 4 x i32> @llvm.aarch64.sve.sudot.lane.nxv4i32(<vscale x 4 x i32>, <vscale x 16 x …
|
| D | aarch64-matmul.ll | 49 ; CHECK: sudot v0.2s, v1.8b, v2.4b[0]
71 ; CHECK: sudot v0.2s, v1.8b, v2.4b[0]
101 ; CHECK: sudot v0.4s, v1.16b, v2.4b[0]
123 ; CHECK: sudot v0.4s, v1.16b, v2.4b[0]
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| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.6a-simd-matmul.txt | 31 # CHECK: sudot v31.2s, v1.8b, v2.4b[3]
32 # CHECK: sudot v31.4s, v1.16b, v2.4b[3]
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| /external/llvm-project/clang/include/clang/Basic/ |
| D | arm_neon.td | 231 // sudot splats the second vector and then calls vusdot
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 835 // sudot lane has a pattern where usdot is expected (there is no sudot).
841 : BaseSIMDThreeSameVectorDotIndex<Q, 0, 1, 0b00, "sudot", dst_kind,
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| D | AArch64SVEInstrInfo.td | 2356 defm SUDOT_ZZZI : sve_int_dot_mixed_indexed<1, "sudot", int_aarch64_sve_sudot_lane>;
|