1 /*
2  * Copyright © 2007-2019 Advanced Micro Devices, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining
6  * a copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * The above copyright notice and this permission notice (including the
23  * next paragraph) shall be included in all copies or substantial portions
24  * of the Software.
25  */
26 
27 /**
28 ****************************************************************************************************
29 * @file  addrinterface.h
30 * @brief Contains the addrlib interfaces declaration and parameter defines
31 ****************************************************************************************************
32 */
33 #ifndef __ADDR_INTERFACE_H__
34 #define __ADDR_INTERFACE_H__
35 
36 #include "addrtypes.h"
37 
38 #if defined(__cplusplus)
39 extern "C"
40 {
41 #endif
42 
43 #define ADDRLIB_VERSION_MAJOR 6
44 #define ADDRLIB_VERSION_MINOR 2
45 #define ADDRLIB_VERSION ((ADDRLIB_VERSION_MAJOR << 16) | ADDRLIB_VERSION_MINOR)
46 
47 /// Virtually all interface functions need ADDR_HANDLE as first parameter
48 typedef VOID*   ADDR_HANDLE;
49 
50 /// Client handle used in callbacks
51 typedef VOID*   ADDR_CLIENT_HANDLE;
52 
53 /**
54 * /////////////////////////////////////////////////////////////////////////////////////////////////
55 * //                                  Callback functions
56 * /////////////////////////////////////////////////////////////////////////////////////////////////
57 *    typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)(
58 *         const ADDR_ALLOCSYSMEM_INPUT* pInput);
59 *    typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)(
60 *         VOID* pVirtAddr);
61 *    typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)(
62 *         const ADDR_DEBUGPRINT_INPUT* pInput);
63 *
64 * /////////////////////////////////////////////////////////////////////////////////////////////////
65 * //                               Create/Destroy/Config functions
66 * /////////////////////////////////////////////////////////////////////////////////////////////////
67 *     AddrCreate()
68 *     AddrDestroy()
69 *
70 * /////////////////////////////////////////////////////////////////////////////////////////////////
71 * //                                  Surface functions
72 * /////////////////////////////////////////////////////////////////////////////////////////////////
73 *     AddrComputeSurfaceInfo()
74 *     AddrComputeSurfaceAddrFromCoord()
75 *     AddrComputeSurfaceCoordFromAddr()
76 *
77 * /////////////////////////////////////////////////////////////////////////////////////////////////
78 * //                                   HTile functions
79 * /////////////////////////////////////////////////////////////////////////////////////////////////
80 *     AddrComputeHtileInfo()
81 *     AddrComputeHtileAddrFromCoord()
82 *     AddrComputeHtileCoordFromAddr()
83 *
84 * /////////////////////////////////////////////////////////////////////////////////////////////////
85 * //                                   C-mask functions
86 * /////////////////////////////////////////////////////////////////////////////////////////////////
87 *     AddrComputeCmaskInfo()
88 *     AddrComputeCmaskAddrFromCoord()
89 *     AddrComputeCmaskCoordFromAddr()
90 *
91 * /////////////////////////////////////////////////////////////////////////////////////////////////
92 * //                                   F-mask functions
93 * /////////////////////////////////////////////////////////////////////////////////////////////////
94 *     AddrComputeFmaskInfo()
95 *     AddrComputeFmaskAddrFromCoord()
96 *     AddrComputeFmaskCoordFromAddr()
97 *
98 * /////////////////////////////////////////////////////////////////////////////////////////////////
99 * //                               Element/Utility functions
100 * /////////////////////////////////////////////////////////////////////////////////////////////////
101 *     ElemFlt32ToDepthPixel()
102 *     ElemFlt32ToColorPixel()
103 *     AddrExtractBankPipeSwizzle()
104 *     AddrCombineBankPipeSwizzle()
105 *     AddrComputeSliceSwizzle()
106 *     AddrConvertTileInfoToHW()
107 *     AddrConvertTileIndex()
108 *     AddrConvertTileIndex1()
109 *     AddrGetTileIndex()
110 *     AddrComputeBaseSwizzle()
111 *     AddrUseTileIndex()
112 *     AddrUseCombinedSwizzle()
113 *
114 **/
115 
116 ////////////////////////////////////////////////////////////////////////////////////////////////////
117 //                                      Callback functions
118 ////////////////////////////////////////////////////////////////////////////////////////////////////
119 
120 /**
121 ****************************************************************************************************
122 * @brief channel setting structure
123 ****************************************************************************************************
124 */
125 typedef union _ADDR_CHANNEL_SETTING
126 {
127     struct
128     {
129         UINT_8 valid   : 1;    ///< Indicate whehter this channel setting is valid
130         UINT_8 channel : 2;    ///< 0 for x channel, 1 for y channel, 2 for z channel
131         UINT_8 index   : 5;    ///< Channel index
132     };
133     UINT_8 value;              ///< Value
134 } ADDR_CHANNEL_SETTING;
135 
136 /**
137 ****************************************************************************************************
138 * @brief address equation key structure
139 ****************************************************************************************************
140 */
141 typedef union _ADDR_EQUATION_KEY
142 {
143     struct
144     {
145         UINT_32 log2ElementBytes : 3; ///< Log2 of Bytes per pixel
146         UINT_32 tileMode         : 5; ///< Tile mode
147         UINT_32 microTileType    : 3; ///< Micro tile type
148         UINT_32 pipeConfig       : 5; ///< pipe config
149         UINT_32 numBanksLog2     : 3; ///< Number of banks log2
150         UINT_32 bankWidth        : 4; ///< Bank width
151         UINT_32 bankHeight       : 4; ///< Bank height
152         UINT_32 macroAspectRatio : 3; ///< Macro tile aspect ratio
153         UINT_32 prt              : 1; ///< SI only, indicate whether this equation is for prt
154         UINT_32 reserved         : 1; ///< Reserved bit
155     } fields;
156     UINT_32 value;
157 } ADDR_EQUATION_KEY;
158 
159 /**
160 ****************************************************************************************************
161 * @brief address equation structure
162 ****************************************************************************************************
163 */
164 #define ADDR_MAX_EQUATION_BIT 20u
165 
166 // Invalid equation index
167 #define ADDR_INVALID_EQUATION_INDEX 0xFFFFFFFF
168 
169 typedef struct _ADDR_EQUATION
170 {
171     ADDR_CHANNEL_SETTING addr[ADDR_MAX_EQUATION_BIT];  ///< addr setting
172                                                        ///< each bit is result of addr ^ xor ^ xor2
173     ADDR_CHANNEL_SETTING xor1[ADDR_MAX_EQUATION_BIT];  ///< xor setting
174     ADDR_CHANNEL_SETTING xor2[ADDR_MAX_EQUATION_BIT];  ///< xor2 setting
175     UINT_32              numBits;                      ///< The number of bits in equation
176     BOOL_32              stackedDepthSlices;           ///< TRUE if depth slices are treated as being
177                                                        ///< stacked vertically prior to swizzling
178 } ADDR_EQUATION;
179 
180 
181 /**
182 ****************************************************************************************************
183 * @brief Alloc system memory flags.
184 * @note These flags are reserved for future use and if flags are added will minimize the impact
185 *       of the client.
186 ****************************************************************************************************
187 */
188 typedef union _ADDR_ALLOCSYSMEM_FLAGS
189 {
190     struct
191     {
192         UINT_32 reserved    : 32;  ///< Reserved for future use.
193     } fields;
194     UINT_32 value;
195 
196 } ADDR_ALLOCSYSMEM_FLAGS;
197 
198 /**
199 ****************************************************************************************************
200 * @brief Alloc system memory input structure
201 ****************************************************************************************************
202 */
203 typedef struct _ADDR_ALLOCSYSMEM_INPUT
204 {
205     UINT_32                 size;           ///< Size of this structure in bytes
206 
207     ADDR_ALLOCSYSMEM_FLAGS  flags;          ///< System memory flags.
208     UINT_32                 sizeInBytes;    ///< System memory allocation size in bytes.
209     ADDR_CLIENT_HANDLE      hClient;        ///< Client handle
210 } ADDR_ALLOCSYSMEM_INPUT;
211 
212 /**
213 ****************************************************************************************************
214 * ADDR_ALLOCSYSMEM
215 *   @brief
216 *       Allocate system memory callback function. Returns valid pointer on success.
217 ****************************************************************************************************
218 */
219 typedef VOID* (ADDR_API* ADDR_ALLOCSYSMEM)(
220     const ADDR_ALLOCSYSMEM_INPUT* pInput);
221 
222 /**
223 ****************************************************************************************************
224 * @brief Free system memory input structure
225 ****************************************************************************************************
226 */
227 typedef struct _ADDR_FREESYSMEM_INPUT
228 {
229     UINT_32                 size;           ///< Size of this structure in bytes
230 
231     VOID*                   pVirtAddr;      ///< Virtual address
232     ADDR_CLIENT_HANDLE      hClient;        ///< Client handle
233 } ADDR_FREESYSMEM_INPUT;
234 
235 /**
236 ****************************************************************************************************
237 * ADDR_FREESYSMEM
238 *   @brief
239 *       Free system memory callback function.
240 *       Returns ADDR_OK on success.
241 ****************************************************************************************************
242 */
243 typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_FREESYSMEM)(
244     const ADDR_FREESYSMEM_INPUT* pInput);
245 
246 /**
247 ****************************************************************************************************
248 * @brief Print debug message input structure
249 ****************************************************************************************************
250 */
251 typedef struct _ADDR_DEBUGPRINT_INPUT
252 {
253     UINT_32             size;           ///< Size of this structure in bytes
254 
255     CHAR*               pDebugString;   ///< Debug print string
256     va_list             ap;             ///< Variable argument list
257     ADDR_CLIENT_HANDLE  hClient;        ///< Client handle
258 } ADDR_DEBUGPRINT_INPUT;
259 
260 /**
261 ****************************************************************************************************
262 * ADDR_DEBUGPRINT
263 *   @brief
264 *       Print debug message callback function.
265 *       Returns ADDR_OK on success.
266 ****************************************************************************************************
267 */
268 typedef ADDR_E_RETURNCODE (ADDR_API* ADDR_DEBUGPRINT)(
269     const ADDR_DEBUGPRINT_INPUT* pInput);
270 
271 /**
272 ****************************************************************************************************
273 * ADDR_CALLBACKS
274 *
275 *   @brief
276 *       Address Library needs client to provide system memory alloc/free routines.
277 ****************************************************************************************************
278 */
279 typedef struct _ADDR_CALLBACKS
280 {
281     ADDR_ALLOCSYSMEM allocSysMem;   ///< Routine to allocate system memory
282     ADDR_FREESYSMEM  freeSysMem;    ///< Routine to free system memory
283     ADDR_DEBUGPRINT  debugPrint;    ///< Routine to print debug message
284 } ADDR_CALLBACKS;
285 
286 ////////////////////////////////////////////////////////////////////////////////////////////////////
287 //                               Create/Destroy functions
288 ////////////////////////////////////////////////////////////////////////////////////////////////////
289 
290 /**
291 ****************************************************************************************************
292 * ADDR_CREATE_FLAGS
293 *
294 *   @brief
295 *       This structure is used to pass some setup in creation of AddrLib
296 *   @note
297 ****************************************************************************************************
298 */
299 typedef union _ADDR_CREATE_FLAGS
300 {
301     struct
302     {
303         UINT_32 noCubeMipSlicesPad     : 1;    ///< Turn cubemap faces padding off
304         UINT_32 fillSizeFields         : 1;    ///< If clients fill size fields in all input and
305                                                ///  output structure
306         UINT_32 useTileIndex           : 1;    ///< Make tileIndex field in input valid
307         UINT_32 useCombinedSwizzle     : 1;    ///< Use combined tile swizzle
308         UINT_32 checkLast2DLevel       : 1;    ///< Check the last 2D mip sub level
309         UINT_32 useHtileSliceAlign     : 1;    ///< Do htile single slice alignment
310         UINT_32 allowLargeThickTile    : 1;    ///< Allow 64*thickness*bytesPerPixel > rowSize
311         UINT_32 forceDccAndTcCompat    : 1;    ///< Force enable DCC and TC compatibility
312         UINT_32 nonPower2MemConfig     : 1;    ///< Video memory bit width is not power of 2
313         UINT_32 enableAltTiling        : 1;    ///< Enable alt tile mode
314         UINT_32 reserved               : 22;   ///< Reserved bits for future use
315     };
316 
317     UINT_32 value;
318 } ADDR_CREATE_FLAGS;
319 
320 /**
321 ****************************************************************************************************
322 *   ADDR_REGISTER_VALUE
323 *
324 *   @brief
325 *       Data from registers to setup AddrLib global data, used in AddrCreate
326 ****************************************************************************************************
327 */
328 typedef struct _ADDR_REGISTER_VALUE
329 {
330     UINT_32  gbAddrConfig;       ///< For R8xx, use GB_ADDR_CONFIG register value.
331                                  ///  For R6xx/R7xx, use GB_TILING_CONFIG.
332                                  ///  But they can be treated as the same.
333                                  ///  if this value is 0, use chip to set default value
334     UINT_32  backendDisables;    ///< 1 bit per backend, starting with LSB. 1=disabled,0=enabled.
335                                  ///  Register value of CC_RB_BACKEND_DISABLE.BACKEND_DISABLE
336 
337                                  ///  R800 registers-----------------------------------------------
338     UINT_32  noOfBanks;          ///< Number of h/w ram banks - For r800: MC_ARB_RAMCFG.NOOFBANK
339                                  ///  No enums for this value in h/w header files
340                                  ///  0: 4
341                                  ///  1: 8
342                                  ///  2: 16
343     UINT_32  noOfRanks;          ///  MC_ARB_RAMCFG.NOOFRANK
344                                  ///  0: 1
345                                  ///  1: 2
346                                  ///  SI (R1000) registers-----------------------------------------
347     const UINT_32* pTileConfig;  ///< Global tile setting tables
348     UINT_32  noOfEntries;        ///< Number of entries in pTileConfig
349 
350                                  ///< CI registers-------------------------------------------------
351     const UINT_32* pMacroTileConfig;    ///< Global macro tile mode table
352     UINT_32  noOfMacroEntries;   ///< Number of entries in pMacroTileConfig
353 } ADDR_REGISTER_VALUE;
354 
355 /**
356 ****************************************************************************************************
357 * ADDR_CREATE_INPUT
358 *
359 *   @brief
360 *       Parameters use to create an AddrLib Object. Caller must provide all fields.
361 *
362 ****************************************************************************************************
363 */
364 typedef struct _ADDR_CREATE_INPUT
365 {
366     UINT_32             size;                ///< Size of this structure in bytes
367 
368     UINT_32             chipEngine;          ///< Chip Engine
369     UINT_32             chipFamily;          ///< Chip Family
370     UINT_32             chipRevision;        ///< Chip Revision
371     ADDR_CALLBACKS      callbacks;           ///< Callbacks for sysmem alloc/free/print
372     ADDR_CREATE_FLAGS   createFlags;         ///< Flags to setup AddrLib
373     ADDR_REGISTER_VALUE regValue;            ///< Data from registers to setup AddrLib global data
374     ADDR_CLIENT_HANDLE  hClient;             ///< Client handle
375     UINT_32             minPitchAlignPixels; ///< Minimum pitch alignment in pixels
376 } ADDR_CREATE_INPUT;
377 
378 /**
379 ****************************************************************************************************
380 * ADDR_CREATEINFO_OUTPUT
381 *
382 *   @brief
383 *       Return AddrLib handle to client driver
384 *
385 ****************************************************************************************************
386 */
387 typedef struct _ADDR_CREATE_OUTPUT
388 {
389     UINT_32              size;            ///< Size of this structure in bytes
390 
391     ADDR_HANDLE          hLib;            ///< Address lib handle
392 
393     UINT_32              numEquations;    ///< Number of equations in the table
394     const ADDR_EQUATION* pEquationTable;  ///< Pointer to the equation table
395 } ADDR_CREATE_OUTPUT;
396 
397 /**
398 ****************************************************************************************************
399 *   AddrCreate
400 *
401 *   @brief
402 *       Create AddrLib object, must be called before any interface calls
403 *
404 *   @return
405 *       ADDR_OK if successful
406 ****************************************************************************************************
407 */
408 ADDR_E_RETURNCODE ADDR_API AddrCreate(
409     const ADDR_CREATE_INPUT*    pAddrCreateIn,
410     ADDR_CREATE_OUTPUT*         pAddrCreateOut);
411 
412 
413 
414 /**
415 ****************************************************************************************************
416 *   AddrDestroy
417 *
418 *   @brief
419 *       Destroy AddrLib object, must be called to free internally allocated resources.
420 *
421 *   @return
422 *      ADDR_OK if successful
423 ****************************************************************************************************
424 */
425 ADDR_E_RETURNCODE ADDR_API AddrDestroy(
426     ADDR_HANDLE hLib);
427 
428 
429 
430 ////////////////////////////////////////////////////////////////////////////////////////////////////
431 //                                    Surface functions
432 ////////////////////////////////////////////////////////////////////////////////////////////////////
433 
434 /**
435 ****************************************************************************************************
436 * @brief
437 *       Bank/tiling parameters. On function input, these can be set as desired or
438 *       left 0 for AddrLib to calculate/default. On function output, these are the actual
439 *       parameters used.
440 * @note
441 *       Valid bankWidth/bankHeight value:
442 *       1,2,4,8. They are factors instead of pixels or bytes.
443 *
444 *       The bank number remains constant across each row of the
445 *       macro tile as each pipe is selected, so the number of
446 *       tiles in the x direction with the same bank number will
447 *       be bank_width * num_pipes.
448 ****************************************************************************************************
449 */
450 typedef struct _ADDR_TILEINFO
451 {
452     ///  Any of these parameters can be set to 0 to use the HW default.
453     UINT_32     banks;              ///< Number of banks, numerical value
454     UINT_32     bankWidth;          ///< Number of tiles in the X direction in the same bank
455     UINT_32     bankHeight;         ///< Number of tiles in the Y direction in the same bank
456     UINT_32     macroAspectRatio;   ///< Macro tile aspect ratio. 1-1:1, 2-4:1, 4-16:1, 8-64:1
457     UINT_32     tileSplitBytes;     ///< Tile split size, in bytes
458     AddrPipeCfg pipeConfig;         ///< Pipe Config = HW enum + 1
459 } ADDR_TILEINFO;
460 
461 // Create a define to avoid client change. The removal of R800 is because we plan to implement SI
462 // within 800 HWL - An AddrPipeCfg is added in above data structure
463 typedef ADDR_TILEINFO ADDR_R800_TILEINFO;
464 
465 /**
466 ****************************************************************************************************
467 * @brief
468 *       Information needed by quad buffer stereo support
469 ****************************************************************************************************
470 */
471 typedef struct _ADDR_QBSTEREOINFO
472 {
473     UINT_32         eyeHeight;          ///< Height (in pixel rows) to right eye
474     UINT_32         rightOffset;        ///< Offset (in bytes) to right eye
475     UINT_32         rightSwizzle;       ///< TileSwizzle for right eyes
476 } ADDR_QBSTEREOINFO;
477 
478 /**
479 ****************************************************************************************************
480 *   ADDR_SURFACE_FLAGS
481 *
482 *   @brief
483 *       Surface flags
484 ****************************************************************************************************
485 */
486 typedef union _ADDR_SURFACE_FLAGS
487 {
488     struct
489     {
490         UINT_32 color                : 1; ///< Flag indicates this is a color buffer
491         UINT_32 depth                : 1; ///< Flag indicates this is a depth/stencil buffer
492         UINT_32 stencil              : 1; ///< Flag indicates this is a stencil buffer
493         UINT_32 texture              : 1; ///< Flag indicates this is a texture
494         UINT_32 cube                 : 1; ///< Flag indicates this is a cubemap
495         UINT_32 volume               : 1; ///< Flag indicates this is a volume texture
496         UINT_32 fmask                : 1; ///< Flag indicates this is an fmask
497         UINT_32 cubeAsArray          : 1; ///< Flag indicates if treat cubemap as arrays
498         UINT_32 compressZ            : 1; ///< Flag indicates z buffer is compressed
499         UINT_32 overlay              : 1; ///< Flag indicates this is an overlay surface
500         UINT_32 noStencil            : 1; ///< Flag indicates this depth has no separate stencil
501         UINT_32 display              : 1; ///< Flag indicates this should match display controller req.
502         UINT_32 opt4Space            : 1; ///< Flag indicates this surface should be optimized for space
503                                           ///  i.e. save some memory but may lose performance
504         UINT_32 prt                  : 1; ///< Flag for partially resident texture
505         UINT_32 qbStereo             : 1; ///< Quad buffer stereo surface
506         UINT_32 pow2Pad              : 1; ///< SI: Pad to pow2, must set for mipmap (include level0)
507         UINT_32 interleaved          : 1; ///< Special flag for interleaved YUV surface padding
508         UINT_32 tcCompatible         : 1; ///< Flag indicates surface needs to be shader readable
509         UINT_32 dispTileType         : 1; ///< NI: force display Tiling for 128 bit shared resoruce
510         UINT_32 dccCompatible        : 1; ///< VI: whether to make MSAA surface support dcc fast clear
511         UINT_32 dccPipeWorkaround    : 1; ///< VI: whether to workaround the HW limit that
512                                           ///  dcc can't be enabled if pipe config of tile mode
513                                           ///  is different from that of ASIC, this flag
514                                           ///  is address lib internal flag, client should ignore it
515         UINT_32 czDispCompatible     : 1; ///< SI+: CZ family has a HW bug needs special alignment.
516                                           ///  This flag indicates we need to follow the
517                                           ///  alignment with CZ families or other ASICs under
518                                           ///  PX configuration + CZ.
519         UINT_32 nonSplit             : 1; ///< CI: depth texture should not be split
520         UINT_32 disableLinearOpt     : 1; ///< Disable tile mode optimization to linear
521         UINT_32 needEquation         : 1; ///< Make the surface tile setting equation compatible.
522                                           ///  This flag indicates we need to override tile
523                                           ///  mode to PRT_* tile mode to disable slice rotation,
524                                           ///  which is needed by swizzle pattern equation.
525         UINT_32 skipIndicesOutput    : 1; ///< Skipping indices in output.
526         UINT_32 rotateDisplay        : 1; ///< Rotate micro tile type
527         UINT_32 minimizeAlignment    : 1; ///< Minimize alignment
528         UINT_32 preferEquation       : 1; ///< Return equation index without adjusting tile mode
529         UINT_32 matchStencilTileCfg  : 1; ///< Select tile index of stencil as well as depth surface
530                                           ///  to make sure they share same tile config parameters
531         UINT_32 disallowLargeThickDegrade   : 1;    ///< Disallow large thick tile degrade
532         UINT_32 reserved             : 1; ///< Reserved bits
533     };
534 
535     UINT_32 value;
536 } ADDR_SURFACE_FLAGS;
537 
538 /**
539 ****************************************************************************************************
540 *   ADDR_COMPUTE_SURFACE_INFO_INPUT
541 *
542 *   @brief
543 *       Input structure for AddrComputeSurfaceInfo
544 ****************************************************************************************************
545 */
546 typedef struct _ADDR_COMPUTE_SURFACE_INFO_INPUT
547 {
548     UINT_32             size;               ///< Size of this structure in bytes
549 
550     AddrTileMode        tileMode;           ///< Tile mode
551     AddrFormat          format;             ///< If format is set to valid one, bpp/width/height
552                                             ///  might be overwritten
553     UINT_32             bpp;                ///< Bits per pixel
554     UINT_32             numSamples;         ///< Number of samples
555     UINT_32             width;              ///< Width, in pixels
556     UINT_32             height;             ///< Height, in pixels
557     UINT_32             numSlices;          ///< Number of surface slices or depth
558     UINT_32             slice;              ///< Slice index
559     UINT_32             mipLevel;           ///< Current mipmap level
560     UINT_32             numMipLevels;       ///< Number of mips in mip chain
561     ADDR_SURFACE_FLAGS  flags;              ///< Surface type flags
562     UINT_32             numFrags;           ///< Number of fragments, leave it zero or the same as
563                                             ///  number of samples for normal AA; Set it to the
564                                             ///  number of fragments for EQAA
565     /// r800 and later HWL parameters
566     // Needed by 2D tiling, for linear and 1D tiling, just keep them 0's
567     ADDR_TILEINFO*      pTileInfo;          ///< 2D tile parameters. Set to 0 to default/calculate
568     AddrTileType        tileType;           ///< Micro tiling type, not needed when tileIndex != -1
569     INT_32              tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
570                                             ///  while the global useTileIndex is set to 1
571     UINT_32             basePitch;          ///< Base level pitch in pixels, 0 means ignored, is a
572                                             ///  must for mip levels from SI+.
573                                             ///  Don't use pitch in blocks for compressed formats!
574     UINT_32             maxBaseAlign;       ///< Max base alignment request from client
575     UINT_32             pitchAlign;         ///< Pitch alignment request from client
576     UINT_32             heightAlign;        ///< Height alignment request from client
577 } ADDR_COMPUTE_SURFACE_INFO_INPUT;
578 
579 /**
580 ****************************************************************************************************
581 *   ADDR_COMPUTE_SURFACE_INFO_OUTPUT
582 *
583 *   @brief
584 *       Output structure for AddrComputeSurfInfo
585 *   @note
586         Element: AddrLib unit for computing. e.g. BCn: 4x4 blocks; R32B32B32: 32bit with 3x pitch
587         Pixel: Original pixel
588 ****************************************************************************************************
589 */
590 typedef struct _ADDR_COMPUTE_SURFACE_INFO_OUTPUT
591 {
592     UINT_32         size;           ///< Size of this structure in bytes
593 
594     UINT_32         pitch;          ///< Pitch in elements (in blocks for compressed formats)
595     UINT_32         height;         ///< Height in elements (in blocks for compressed formats)
596     UINT_32         depth;          ///< Number of slice/depth
597     UINT_64         surfSize;       ///< Surface size in bytes
598     AddrTileMode    tileMode;       ///< Actual tile mode. May differ from that in input
599     UINT_32         baseAlign;      ///< Base address alignment
600     UINT_32         pitchAlign;     ///< Pitch alignment, in elements
601     UINT_32         heightAlign;    ///< Height alignment, in elements
602     UINT_32         depthAlign;     ///< Depth alignment, aligned to thickness, for 3d texture
603     UINT_32         bpp;            ///< Bits per elements (e.g. blocks for BCn, 1/3 for 96bit)
604     UINT_32         pixelPitch;     ///< Pitch in original pixels
605     UINT_32         pixelHeight;    ///< Height in original pixels
606     UINT_32         pixelBits;      ///< Original bits per pixel, passed from input
607     UINT_64         sliceSize;      ///< Size of slice specified by input's slice
608                                     ///  The result is controlled by surface flags & createFlags
609                                     ///  By default this value equals to surfSize for volume
610     UINT_32         pitchTileMax;   ///< PITCH_TILE_MAX value for h/w register
611     UINT_32         heightTileMax;  ///< HEIGHT_TILE_MAX value for h/w register
612     UINT_32         sliceTileMax;   ///< SLICE_TILE_MAX value for h/w register
613 
614     UINT_32         numSamples;     ///< Pass the effective numSamples processed in this call
615 
616     /// r800 and later HWL parameters
617     ADDR_TILEINFO*  pTileInfo;      ///< Tile parameters used. Filled in if 0 on input
618     AddrTileType    tileType;       ///< Micro tiling type, only valid when tileIndex != -1
619     INT_32          tileIndex;      ///< Tile index, MAY be "downgraded"
620 
621     INT_32          macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
622     /// Output flags
623     struct
624     {
625         /// Special information to work around SI mipmap swizzle bug UBTS #317508
626         UINT_32     last2DLevel  : 1;  ///< TRUE if this is the last 2D(3D) tiled
627                                        ///< Only meaningful when create flag checkLast2DLevel is set
628         UINT_32     tcCompatible : 1;  ///< If the surface can be shader compatible
629         UINT_32     dccUnsupport : 1;  ///< If the surface can support DCC compressed rendering
630         UINT_32     prtTileIndex : 1;  ///< SI only, indicate the returned tile index is for PRT
631                                        ///< If address lib return true for mip 0, client should set prt flag
632                                        ///< for child mips in subsequent compute surface info calls
633         UINT_32     reserved     :28;  ///< Reserved bits
634     };
635 
636     UINT_32         equationIndex;     ///< Equation index in the equation table;
637 
638     UINT_32         blockWidth;        ///< Width in element inside one block(1D->Micro, 2D->Macro)
639     UINT_32         blockHeight;       ///< Height in element inside one block(1D->Micro, 2D->Macro)
640     UINT_32         blockSlices;       ///< Slice number inside one block(1D->Micro, 2D->Macro)
641 
642     /// Stereo info
643     ADDR_QBSTEREOINFO*  pStereoInfo;///< Stereo information, needed when .qbStereo flag is TRUE
644 
645     INT_32          stencilTileIdx; ///< stencil tile index output when matchStencilTileCfg was set
646 } ADDR_COMPUTE_SURFACE_INFO_OUTPUT;
647 
648 /**
649 ****************************************************************************************************
650 *   AddrComputeSurfaceInfo
651 *
652 *   @brief
653 *       Compute surface width/height/depth/alignments and suitable tiling mode
654 ****************************************************************************************************
655 */
656 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo(
657     ADDR_HANDLE                             hLib,
658     const ADDR_COMPUTE_SURFACE_INFO_INPUT*  pIn,
659     ADDR_COMPUTE_SURFACE_INFO_OUTPUT*       pOut);
660 
661 
662 
663 /**
664 ****************************************************************************************************
665 *   ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
666 *
667 *   @brief
668 *       Input structure for AddrComputeSurfaceAddrFromCoord
669 ****************************************************************************************************
670 */
671 typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
672 {
673     UINT_32         size;               ///< Size of this structure in bytes
674 
675     UINT_32         x;                  ///< X coordinate
676     UINT_32         y;                  ///< Y coordinate
677     UINT_32         slice;              ///< Slice index
678     UINT_32         sample;             ///< Sample index, use fragment index for EQAA
679 
680     UINT_32         bpp;                ///< Bits per pixel
681     UINT_32         pitch;              ///< Surface pitch, in pixels
682     UINT_32         height;             ///< Surface height, in pixels
683     UINT_32         numSlices;          ///< Surface depth
684     UINT_32         numSamples;         ///< Number of samples
685 
686     AddrTileMode    tileMode;           ///< Tile mode
687     BOOL_32         isDepth;            ///< TRUE if the surface uses depth sample ordering within
688                                         ///  micro tile. Textures can also choose depth sample order
689     UINT_32         tileBase;           ///< Base offset (in bits) inside micro tile which handles
690                                         ///  the case that components are stored separately
691     UINT_32         compBits;           ///< The component bits actually needed(for planar surface)
692 
693     UINT_32         numFrags;           ///< Number of fragments, leave it zero or the same as
694                                         ///  number of samples for normal AA; Set it to the
695                                         ///  number of fragments for EQAA
696     /// r800 and later HWL parameters
697     // Used for 1D tiling above
698     AddrTileType    tileType;           ///< See defintion of AddrTileType
699     struct
700     {
701         UINT_32     ignoreSE : 1;       ///< TRUE if shader engines are ignored. This is texture
702                                         ///  only flag. Only non-RT texture can set this to TRUE
703         UINT_32     reserved :31;       ///< Reserved for future use.
704     };
705     // 2D tiling needs following structure
706     ADDR_TILEINFO*  pTileInfo;          ///< 2D tile parameters. Client must provide all data
707     INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
708                                         ///  while the global useTileIndex is set to 1
709     union
710     {
711         struct
712         {
713             UINT_32  bankSwizzle;       ///< Bank swizzle
714             UINT_32  pipeSwizzle;       ///< Pipe swizzle
715         };
716         UINT_32     tileSwizzle;        ///< Combined swizzle, if useCombinedSwizzle is TRUE
717     };
718 } ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT;
719 
720 /**
721 ****************************************************************************************************
722 *   ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
723 *
724 *   @brief
725 *       Output structure for AddrComputeSurfaceAddrFromCoord
726 ****************************************************************************************************
727 */
728 typedef struct _ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
729 {
730     UINT_32 size;           ///< Size of this structure in bytes
731 
732     UINT_64 addr;           ///< Byte address
733     UINT_32 bitPosition;    ///< Bit position within surfaceAddr, 0-7.
734                             ///  For surface bpp < 8, e.g. FMT_1.
735     UINT_32 prtBlockIndex;  ///< Index of a PRT tile (64K block)
736 } ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT;
737 
738 /**
739 ****************************************************************************************************
740 *   AddrComputeSurfaceAddrFromCoord
741 *
742 *   @brief
743 *       Compute surface address from a given coordinate.
744 ****************************************************************************************************
745 */
746 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord(
747     ADDR_HANDLE                                     hLib,
748     const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
749     ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT*      pOut);
750 
751 
752 
753 /**
754 ****************************************************************************************************
755 *   ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT
756 *
757 *   @brief
758 *       Input structure for AddrComputeSurfaceCoordFromAddr
759 ****************************************************************************************************
760 */
761 typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT
762 {
763     UINT_32         size;               ///< Size of this structure in bytes
764 
765     UINT_64         addr;               ///< Address in bytes
766     UINT_32         bitPosition;        ///< Bit position in addr. 0-7. for surface bpp < 8,
767                                         ///  e.g. FMT_1;
768     UINT_32         bpp;                ///< Bits per pixel
769     UINT_32         pitch;              ///< Pitch, in pixels
770     UINT_32         height;             ///< Height in pixels
771     UINT_32         numSlices;          ///< Surface depth
772     UINT_32         numSamples;         ///< Number of samples
773 
774     AddrTileMode    tileMode;           ///< Tile mode
775     BOOL_32         isDepth;            ///< Surface uses depth sample ordering within micro tile.
776                                         ///  Note: Textures can choose depth sample order as well.
777     UINT_32         tileBase;           ///< Base offset (in bits) inside micro tile which handles
778                                         ///  the case that components are stored separately
779     UINT_32         compBits;           ///< The component bits actually needed(for planar surface)
780 
781     UINT_32         numFrags;           ///< Number of fragments, leave it zero or the same as
782                                         ///  number of samples for normal AA; Set it to the
783                                         ///  number of fragments for EQAA
784     /// r800 and later HWL parameters
785     // Used for 1D tiling above
786     AddrTileType    tileType;           ///< See defintion of AddrTileType
787     struct
788     {
789         UINT_32     ignoreSE : 1;       ///< TRUE if shader engines are ignored. This is texture
790                                         ///  only flag. Only non-RT texture can set this to TRUE
791         UINT_32     reserved :31;       ///< Reserved for future use.
792     };
793     // 2D tiling needs following structure
794     ADDR_TILEINFO*  pTileInfo;          ///< 2D tile parameters. Client must provide all data
795     INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
796                                         ///  while the global useTileIndex is set to 1
797     union
798     {
799         struct
800         {
801             UINT_32  bankSwizzle;       ///< Bank swizzle
802             UINT_32  pipeSwizzle;       ///< Pipe swizzle
803         };
804         UINT_32     tileSwizzle;        ///< Combined swizzle, if useCombinedSwizzle is TRUE
805     };
806 } ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT;
807 
808 /**
809 ****************************************************************************************************
810 *   ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
811 *
812 *   @brief
813 *       Output structure for AddrComputeSurfaceCoordFromAddr
814 ****************************************************************************************************
815 */
816 typedef struct _ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
817 {
818     UINT_32 size;   ///< Size of this structure in bytes
819 
820     UINT_32 x;      ///< X coordinate
821     UINT_32 y;      ///< Y coordinate
822     UINT_32 slice;  ///< Index of slices
823     UINT_32 sample; ///< Index of samples, means fragment index for EQAA
824 } ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT;
825 
826 /**
827 ****************************************************************************************************
828 *   AddrComputeSurfaceCoordFromAddr
829 *
830 *   @brief
831 *       Compute coordinate from a given surface address
832 ****************************************************************************************************
833 */
834 ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr(
835     ADDR_HANDLE                                     hLib,
836     const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
837     ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT*      pOut);
838 
839 ////////////////////////////////////////////////////////////////////////////////////////////////////
840 //                                   HTile functions
841 ////////////////////////////////////////////////////////////////////////////////////////////////////
842 
843 /**
844 ****************************************************************************************************
845 *   ADDR_HTILE_FLAGS
846 *
847 *   @brief
848 *       HTILE flags
849 ****************************************************************************************************
850 */
851 typedef union _ADDR_HTILE_FLAGS
852 {
853     struct
854     {
855         UINT_32 tcCompatible          : 1;  ///< Flag indicates surface needs to be shader readable
856         UINT_32 skipTcCompatSizeAlign : 1;  ///< Flag indicates that addrLib will not align htile
857                                             ///  size to 256xBankxPipe when computing tc-compatible
858                                             ///  htile info.
859         UINT_32 reserved              : 30; ///< Reserved bits
860     };
861 
862     UINT_32 value;
863 } ADDR_HTILE_FLAGS;
864 
865 /**
866 ****************************************************************************************************
867 *   ADDR_COMPUTE_HTILE_INFO_INPUT
868 *
869 *   @brief
870 *       Input structure of AddrComputeHtileInfo
871 ****************************************************************************************************
872 */
873 typedef struct _ADDR_COMPUTE_HTILE_INFO_INPUT
874 {
875     UINT_32            size;            ///< Size of this structure in bytes
876 
877     ADDR_HTILE_FLAGS   flags;           ///< HTILE flags
878     UINT_32            pitch;           ///< Surface pitch, in pixels
879     UINT_32            height;          ///< Surface height, in pixels
880     UINT_32            numSlices;       ///< Number of slices
881     BOOL_32            isLinear;        ///< Linear or tiled HTILE layout
882     AddrHtileBlockSize blockWidth;      ///< 4 or 8. EG above only support 8
883     AddrHtileBlockSize blockHeight;     ///< 4 or 8. EG above only support 8
884     ADDR_TILEINFO*     pTileInfo;       ///< Tile info
885 
886     INT_32             tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
887                                         ///  while the global useTileIndex is set to 1
888     INT_32             macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
889                                         ///< README: When tileIndex is not -1, this must be valid
890 } ADDR_COMPUTE_HTILE_INFO_INPUT;
891 
892 /**
893 ****************************************************************************************************
894 *   ADDR_COMPUTE_HTILE_INFO_OUTPUT
895 *
896 *   @brief
897 *       Output structure of AddrComputeHtileInfo
898 ****************************************************************************************************
899 */
900 typedef struct _ADDR_COMPUTE_HTILE_INFO_OUTPUT
901 {
902     UINT_32 size;               ///< Size of this structure in bytes
903 
904     UINT_32 pitch;              ///< Pitch in pixels of depth buffer represented in this
905                                 ///  HTile buffer. This might be larger than original depth
906                                 ///  buffer pitch when called with an unaligned pitch.
907     UINT_32 height;             ///< Height in pixels, as above
908     UINT_64 htileBytes;         ///< Size of HTILE buffer, in bytes
909     UINT_32 baseAlign;          ///< Base alignment
910     UINT_32 bpp;                ///< Bits per pixel for HTILE is how many bits for an 8x8 block!
911     UINT_32 macroWidth;         ///< Macro width in pixels, actually squared cache shape
912     UINT_32 macroHeight;        ///< Macro height in pixels
913     UINT_64 sliceSize;          ///< Slice size, in bytes.
914     BOOL_32 sliceInterleaved;   ///< Flag to indicate if different slice's htile is interleaved
915                                 ///  Compute engine clear can't be used if htile is interleaved
916     BOOL_32 nextMipLevelCompressible;   ///< Flag to indicate whether HTILE can be enabled in
917                                         ///  next mip level, it also indicates if memory set based
918                                         ///  fast clear can be used for current mip level.
919 } ADDR_COMPUTE_HTILE_INFO_OUTPUT;
920 
921 /**
922 ****************************************************************************************************
923 *   AddrComputeHtileInfo
924 *
925 *   @brief
926 *       Compute Htile pitch, height, base alignment and size in bytes
927 ****************************************************************************************************
928 */
929 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo(
930     ADDR_HANDLE                             hLib,
931     const ADDR_COMPUTE_HTILE_INFO_INPUT*    pIn,
932     ADDR_COMPUTE_HTILE_INFO_OUTPUT*         pOut);
933 
934 
935 
936 /**
937 ****************************************************************************************************
938 *   ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
939 *
940 *   @brief
941 *       Input structure for AddrComputeHtileAddrFromCoord
942 ****************************************************************************************************
943 */
944 typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
945 {
946     UINT_32            size;            ///< Size of this structure in bytes
947 
948     UINT_32            pitch;           ///< Pitch, in pixels
949     UINT_32            height;          ///< Height in pixels
950     UINT_32            x;               ///< X coordinate
951     UINT_32            y;               ///< Y coordinate
952     UINT_32            slice;           ///< Index of slice
953     UINT_32            numSlices;       ///< Number of slices
954     BOOL_32            isLinear;        ///< Linear or tiled HTILE layout
955     ADDR_HTILE_FLAGS   flags;           ///< htile flags
956     AddrHtileBlockSize blockWidth;      ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8
957     AddrHtileBlockSize blockHeight;     ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8
958     ADDR_TILEINFO*     pTileInfo;       ///< Tile info
959 
960     INT_32             tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
961                                         ///  while the global useTileIndex is set to 1
962     INT_32             macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
963                                         ///< README: When tileIndex is not -1, this must be valid
964     UINT_32            bpp;             ///< depth/stencil buffer bit per pixel size
965     UINT_32            zStencilAddr;    ///< tcCompatible Z/Stencil surface address
966 } ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT;
967 
968 /**
969 ****************************************************************************************************
970 *   ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
971 *
972 *   @brief
973 *       Output structure for AddrComputeHtileAddrFromCoord
974 ****************************************************************************************************
975 */
976 typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
977 {
978     UINT_32 size;           ///< Size of this structure in bytes
979 
980     UINT_64 addr;           ///< Address in bytes
981     UINT_32 bitPosition;    ///< Bit position, 0 or 4. CMASK and HTILE shares some lib method.
982                             ///  So we keep bitPosition for HTILE as well
983 } ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT;
984 
985 /**
986 ****************************************************************************************************
987 *   AddrComputeHtileAddrFromCoord
988 *
989 *   @brief
990 *       Compute Htile address according to coordinates (of depth buffer)
991 ****************************************************************************************************
992 */
993 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord(
994     ADDR_HANDLE                                     hLib,
995     const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT*   pIn,
996     ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT*        pOut);
997 
998 
999 
1000 /**
1001 ****************************************************************************************************
1002 *   ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT
1003 *
1004 *   @brief
1005 *       Input structure for AddrComputeHtileCoordFromAddr
1006 ****************************************************************************************************
1007 */
1008 typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT
1009 {
1010     UINT_32            size;            ///< Size of this structure in bytes
1011 
1012     UINT_64            addr;            ///< Address
1013     UINT_32            bitPosition;     ///< Bit position 0 or 4. CMASK and HTILE share some methods
1014                                         ///  so we keep bitPosition for HTILE as well
1015     UINT_32            pitch;           ///< Pitch, in pixels
1016     UINT_32            height;          ///< Height, in pixels
1017     UINT_32            numSlices;       ///< Number of slices
1018     BOOL_32            isLinear;        ///< Linear or tiled HTILE layout
1019     AddrHtileBlockSize blockWidth;      ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8
1020     AddrHtileBlockSize blockHeight;     ///< 4 or 8. 1 means 8, 0 means 4. R8xx/R9xx only support 8
1021     ADDR_TILEINFO*     pTileInfo;       ///< Tile info
1022 
1023     INT_32             tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
1024                                         ///  while the global useTileIndex is set to 1
1025     INT_32             macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
1026                                         ///< README: When tileIndex is not -1, this must be valid
1027 } ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT;
1028 
1029 /**
1030 ****************************************************************************************************
1031 *   ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
1032 *
1033 *   @brief
1034 *       Output structure for AddrComputeHtileCoordFromAddr
1035 ****************************************************************************************************
1036 */
1037 typedef struct _ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
1038 {
1039     UINT_32 size;   ///< Size of this structure in bytes
1040 
1041     UINT_32 x;      ///< X coordinate
1042     UINT_32 y;      ///< Y coordinate
1043     UINT_32 slice;  ///< Slice index
1044 } ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT;
1045 
1046 /**
1047 ****************************************************************************************************
1048 *   AddrComputeHtileCoordFromAddr
1049 *
1050 *   @brief
1051 *       Compute coordinates within depth buffer (1st pixel of a micro tile) according to
1052 *       Htile address
1053 ****************************************************************************************************
1054 */
1055 ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr(
1056     ADDR_HANDLE                                     hLib,
1057     const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT*   pIn,
1058     ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT*        pOut);
1059 
1060 
1061 
1062 ////////////////////////////////////////////////////////////////////////////////////////////////////
1063 //                                     C-mask functions
1064 ////////////////////////////////////////////////////////////////////////////////////////////////////
1065 
1066 /**
1067 ****************************************************************************************************
1068 *   ADDR_CMASK_FLAGS
1069 *
1070 *   @brief
1071 *       CMASK flags
1072 ****************************************************************************************************
1073 */
1074 typedef union _ADDR_CMASK_FLAGS
1075 {
1076     struct
1077     {
1078         UINT_32 tcCompatible  : 1; ///< Flag indicates surface needs to be shader readable
1079         UINT_32 reserved      :31; ///< Reserved bits
1080     };
1081 
1082     UINT_32 value;
1083 } ADDR_CMASK_FLAGS;
1084 
1085 /**
1086 ****************************************************************************************************
1087 *   ADDR_COMPUTE_CMASK_INFO_INPUT
1088 *
1089 *   @brief
1090 *       Input structure of AddrComputeCmaskInfo
1091 ****************************************************************************************************
1092 */
1093 typedef struct _ADDR_COMPUTE_CMASKINFO_INPUT
1094 {
1095     UINT_32             size;            ///< Size of this structure in bytes
1096 
1097     ADDR_CMASK_FLAGS    flags;           ///< CMASK flags
1098     UINT_32             pitch;           ///< Pitch, in pixels, of color buffer
1099     UINT_32             height;          ///< Height, in pixels, of color buffer
1100     UINT_32             numSlices;       ///< Number of slices, of color buffer
1101     BOOL_32             isLinear;        ///< Linear or tiled layout, Only SI can be linear
1102     ADDR_TILEINFO*      pTileInfo;       ///< Tile info
1103 
1104     INT_32              tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
1105                                          ///  while the global useTileIndex is set to 1
1106     INT_32              macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
1107                                          ///< README: When tileIndex is not -1, this must be valid
1108 } ADDR_COMPUTE_CMASK_INFO_INPUT;
1109 
1110 /**
1111 ****************************************************************************************************
1112 *   ADDR_COMPUTE_CMASK_INFO_OUTPUT
1113 *
1114 *   @brief
1115 *       Output structure of AddrComputeCmaskInfo
1116 ****************************************************************************************************
1117 */
1118 typedef struct _ADDR_COMPUTE_CMASK_INFO_OUTPUT
1119 {
1120     UINT_32 size;           ///< Size of this structure in bytes
1121 
1122     UINT_32 pitch;          ///< Pitch in pixels of color buffer which
1123                             ///  this Cmask matches. The size might be larger than
1124                             ///  original color buffer pitch when called with
1125                             ///  an unaligned pitch.
1126     UINT_32 height;         ///< Height in pixels, as above
1127     UINT_64 cmaskBytes;     ///< Size in bytes of CMask buffer
1128     UINT_32 baseAlign;      ///< Base alignment
1129     UINT_32 blockMax;       ///< Cmask block size. Need this to set CB_COLORn_MASK register
1130     UINT_32 macroWidth;     ///< Macro width in pixels, actually squared cache shape
1131     UINT_32 macroHeight;    ///< Macro height in pixels
1132     UINT_64 sliceSize;      ///< Slice size, in bytes.
1133 } ADDR_COMPUTE_CMASK_INFO_OUTPUT;
1134 
1135 /**
1136 ****************************************************************************************************
1137 *   AddrComputeCmaskInfo
1138 *
1139 *   @brief
1140 *       Compute Cmask pitch, height, base alignment and size in bytes from color buffer
1141 *       info
1142 ****************************************************************************************************
1143 */
1144 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo(
1145     ADDR_HANDLE                             hLib,
1146     const ADDR_COMPUTE_CMASK_INFO_INPUT*    pIn,
1147     ADDR_COMPUTE_CMASK_INFO_OUTPUT*         pOut);
1148 
1149 
1150 
1151 /**
1152 ****************************************************************************************************
1153 *   ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
1154 *
1155 *   @brief
1156 *       Input structure for AddrComputeCmaskAddrFromCoord
1157 *
1158 ****************************************************************************************************
1159 */
1160 typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
1161 {
1162     UINT_32          size;           ///< Size of this structure in bytes
1163     UINT_32          x;              ///< X coordinate
1164     UINT_32          y;              ///< Y coordinate
1165     UINT_64          fmaskAddr;      ///< Fmask addr for tc compatible Cmask
1166     UINT_32          slice;          ///< Slice index
1167     UINT_32          pitch;          ///< Pitch in pixels, of color buffer
1168     UINT_32          height;         ///< Height in pixels, of color buffer
1169     UINT_32          numSlices;      ///< Number of slices
1170     UINT_32          bpp;
1171     BOOL_32          isLinear;       ///< Linear or tiled layout, Only SI can be linear
1172     ADDR_CMASK_FLAGS flags;          ///< CMASK flags
1173     ADDR_TILEINFO*   pTileInfo;      ///< Tile info
1174 
1175     INT_32           tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
1176                                      ///< while the global useTileIndex is set to 1
1177     INT_32           macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1178                                      ///< README: When tileIndex is not -1, this must be valid
1179 } ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT;
1180 
1181 /**
1182 ****************************************************************************************************
1183 *   ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
1184 *
1185 *   @brief
1186 *       Output structure for AddrComputeCmaskAddrFromCoord
1187 ****************************************************************************************************
1188 */
1189 typedef struct _ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
1190 {
1191     UINT_32 size;           ///< Size of this structure in bytes
1192 
1193     UINT_64 addr;           ///< CMASK address in bytes
1194     UINT_32 bitPosition;    ///< Bit position within addr, 0-7. CMASK is 4 bpp,
1195                             ///  so the address may be located in bit 0 (0) or 4 (4)
1196 } ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT;
1197 
1198 /**
1199 ****************************************************************************************************
1200 *   AddrComputeCmaskAddrFromCoord
1201 *
1202 *   @brief
1203 *       Compute Cmask address according to coordinates (of MSAA color buffer)
1204 ****************************************************************************************************
1205 */
1206 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord(
1207     ADDR_HANDLE                                     hLib,
1208     const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT*   pIn,
1209     ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT*        pOut);
1210 
1211 
1212 
1213 /**
1214 ****************************************************************************************************
1215 *   ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT
1216 *
1217 *   @brief
1218 *       Input structure for AddrComputeCmaskCoordFromAddr
1219 ****************************************************************************************************
1220 */
1221 typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT
1222 {
1223     UINT_32        size;            ///< Size of this structure in bytes
1224 
1225     UINT_64        addr;            ///< CMASK address in bytes
1226     UINT_32        bitPosition;     ///< Bit position within addr, 0-7. CMASK is 4 bpp,
1227                                     ///  so the address may be located in bit 0 (0) or 4 (4)
1228     UINT_32        pitch;           ///< Pitch, in pixels
1229     UINT_32        height;          ///< Height in pixels
1230     UINT_32        numSlices;       ///< Number of slices
1231     BOOL_32        isLinear;        ///< Linear or tiled layout, Only SI can be linear
1232     ADDR_TILEINFO* pTileInfo;       ///< Tile info
1233 
1234     INT_32         tileIndex;       ///< Tile index, MUST be -1 if you don't want to use it
1235                                     ///  while the global useTileIndex is set to 1
1236     INT_32         macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
1237                                     ///< README: When tileIndex is not -1, this must be valid
1238 } ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT;
1239 
1240 /**
1241 ****************************************************************************************************
1242 *   ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
1243 *
1244 *   @brief
1245 *       Output structure for AddrComputeCmaskCoordFromAddr
1246 ****************************************************************************************************
1247 */
1248 typedef struct _ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
1249 {
1250     UINT_32 size;   ///< Size of this structure in bytes
1251 
1252     UINT_32 x;      ///< X coordinate
1253     UINT_32 y;      ///< Y coordinate
1254     UINT_32 slice;  ///< Slice index
1255 } ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT;
1256 
1257 /**
1258 ****************************************************************************************************
1259 *   AddrComputeCmaskCoordFromAddr
1260 *
1261 *   @brief
1262 *       Compute coordinates within color buffer (1st pixel of a micro tile) according to
1263 *       Cmask address
1264 ****************************************************************************************************
1265 */
1266 ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr(
1267     ADDR_HANDLE                                     hLib,
1268     const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT*   pIn,
1269     ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT*        pOut);
1270 
1271 
1272 
1273 ////////////////////////////////////////////////////////////////////////////////////////////////////
1274 //                                     F-mask functions
1275 ////////////////////////////////////////////////////////////////////////////////////////////////////
1276 
1277 /**
1278 ****************************************************************************************************
1279 *   ADDR_COMPUTE_FMASK_INFO_INPUT
1280 *
1281 *   @brief
1282 *       Input structure for AddrComputeFmaskInfo
1283 ****************************************************************************************************
1284 */
1285 typedef struct _ADDR_COMPUTE_FMASK_INFO_INPUT
1286 {
1287     UINT_32         size;               ///< Size of this structure in bytes
1288 
1289     AddrTileMode    tileMode;           ///< Tile mode
1290     UINT_32         pitch;              ///< Surface pitch, in pixels
1291     UINT_32         height;             ///< Surface height, in pixels
1292     UINT_32         numSlices;          ///< Number of slice/depth
1293     UINT_32         numSamples;         ///< Number of samples
1294     UINT_32         numFrags;           ///< Number of fragments, leave it zero or the same as
1295                                         ///  number of samples for normal AA; Set it to the
1296                                         ///  number of fragments for EQAA
1297     /// r800 and later HWL parameters
1298     struct
1299     {
1300         UINT_32 resolved:   1;          ///< TRUE if the surface is for resolved fmask, only used
1301                                         ///  by H/W clients. S/W should always set it to FALSE.
1302         UINT_32 reserved:  31;          ///< Reserved for future use.
1303     };
1304     ADDR_TILEINFO*  pTileInfo;          ///< 2D tiling parameters. Clients must give valid data
1305     INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
1306                                         ///  while the global useTileIndex is set to 1
1307 } ADDR_COMPUTE_FMASK_INFO_INPUT;
1308 
1309 /**
1310 ****************************************************************************************************
1311 *   ADDR_COMPUTE_FMASK_INFO_OUTPUT
1312 *
1313 *   @brief
1314 *       Output structure for AddrComputeFmaskInfo
1315 ****************************************************************************************************
1316 */
1317 typedef struct _ADDR_COMPUTE_FMASK_INFO_OUTPUT
1318 {
1319     UINT_32         size;           ///< Size of this structure in bytes
1320 
1321     UINT_32         pitch;          ///< Pitch of fmask in pixels
1322     UINT_32         height;         ///< Height of fmask in pixels
1323     UINT_32         numSlices;      ///< Slices of fmask
1324     UINT_64         fmaskBytes;     ///< Size of fmask in bytes
1325     UINT_32         baseAlign;      ///< Base address alignment
1326     UINT_32         pitchAlign;     ///< Pitch alignment
1327     UINT_32         heightAlign;    ///< Height alignment
1328     UINT_32         bpp;            ///< Bits per pixel of FMASK is: number of bit planes
1329     UINT_32         numSamples;     ///< Number of samples, used for dump, export this since input
1330                                     ///  may be changed in 9xx and above
1331     /// r800 and later HWL parameters
1332     ADDR_TILEINFO*  pTileInfo;      ///< Tile parameters used. Fmask can have different
1333                                     ///  bank_height from color buffer
1334     INT_32          tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
1335                                     ///  while the global useTileIndex is set to 1
1336     INT_32          macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1337     UINT_64         sliceSize;      ///< Size of slice in bytes
1338 } ADDR_COMPUTE_FMASK_INFO_OUTPUT;
1339 
1340 /**
1341 ****************************************************************************************************
1342 *   AddrComputeFmaskInfo
1343 *
1344 *   @brief
1345 *       Compute Fmask pitch/height/depth/alignments and size in bytes
1346 ****************************************************************************************************
1347 */
1348 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo(
1349     ADDR_HANDLE                             hLib,
1350     const ADDR_COMPUTE_FMASK_INFO_INPUT*    pIn,
1351     ADDR_COMPUTE_FMASK_INFO_OUTPUT*         pOut);
1352 
1353 
1354 
1355 /**
1356 ****************************************************************************************************
1357 *   ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
1358 *
1359 *   @brief
1360 *       Input structure for AddrComputeFmaskAddrFromCoord
1361 ****************************************************************************************************
1362 */
1363 typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
1364 {
1365     UINT_32         size;               ///< Size of this structure in bytes
1366 
1367     UINT_32         x;                  ///< X coordinate
1368     UINT_32         y;                  ///< Y coordinate
1369     UINT_32         slice;              ///< Slice index
1370     UINT_32         plane;              ///< Plane number
1371     UINT_32         sample;             ///< Sample index (fragment index for EQAA)
1372 
1373     UINT_32         pitch;              ///< Surface pitch, in pixels
1374     UINT_32         height;             ///< Surface height, in pixels
1375     UINT_32         numSamples;         ///< Number of samples
1376     UINT_32         numFrags;           ///< Number of fragments, leave it zero or the same as
1377                                         ///  number of samples for normal AA; Set it to the
1378                                         ///  number of fragments for EQAA
1379 
1380     AddrTileMode    tileMode;           ///< Tile mode
1381     union
1382     {
1383         struct
1384         {
1385             UINT_32  bankSwizzle;       ///< Bank swizzle
1386             UINT_32  pipeSwizzle;       ///< Pipe swizzle
1387         };
1388         UINT_32     tileSwizzle;        ///< Combined swizzle, if useCombinedSwizzle is TRUE
1389     };
1390 
1391     /// r800 and later HWL parameters
1392     struct
1393     {
1394         UINT_32 resolved:   1;          ///< TRUE if this is a resolved fmask, used by H/W clients
1395         UINT_32 ignoreSE:   1;          ///< TRUE if shader engines are ignored.
1396         UINT_32 reserved:  30;          ///< Reserved for future use.
1397     };
1398     ADDR_TILEINFO*  pTileInfo;          ///< 2D tiling parameters. Client must provide all data
1399 
1400 } ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT;
1401 
1402 /**
1403 ****************************************************************************************************
1404 *   ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
1405 *
1406 *   @brief
1407 *       Output structure for AddrComputeFmaskAddrFromCoord
1408 ****************************************************************************************************
1409 */
1410 typedef struct _ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
1411 {
1412     UINT_32 size;           ///< Size of this structure in bytes
1413 
1414     UINT_64 addr;           ///< Fmask address
1415     UINT_32 bitPosition;    ///< Bit position within fmaskAddr, 0-7.
1416 } ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT;
1417 
1418 /**
1419 ****************************************************************************************************
1420 *   AddrComputeFmaskAddrFromCoord
1421 *
1422 *   @brief
1423 *       Compute Fmask address according to coordinates (x,y,slice,sample,plane)
1424 ****************************************************************************************************
1425 */
1426 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord(
1427     ADDR_HANDLE                                     hLib,
1428     const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT*   pIn,
1429     ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT*        pOut);
1430 
1431 
1432 
1433 /**
1434 ****************************************************************************************************
1435 *   ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT
1436 *
1437 *   @brief
1438 *       Input structure for AddrComputeFmaskCoordFromAddr
1439 ****************************************************************************************************
1440 */
1441 typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT
1442 {
1443     UINT_32         size;               ///< Size of this structure in bytes
1444 
1445     UINT_64         addr;               ///< Address
1446     UINT_32         bitPosition;        ///< Bit position within addr, 0-7.
1447 
1448     UINT_32         pitch;              ///< Pitch, in pixels
1449     UINT_32         height;             ///< Height in pixels
1450     UINT_32         numSamples;         ///< Number of samples
1451     UINT_32         numFrags;           ///< Number of fragments
1452     AddrTileMode    tileMode;           ///< Tile mode
1453     union
1454     {
1455         struct
1456         {
1457             UINT_32  bankSwizzle;       ///< Bank swizzle
1458             UINT_32  pipeSwizzle;       ///< Pipe swizzle
1459         };
1460         UINT_32     tileSwizzle;        ///< Combined swizzle, if useCombinedSwizzle is TRUE
1461     };
1462 
1463     /// r800 and later HWL parameters
1464     struct
1465     {
1466         UINT_32 resolved:   1;          ///< TRUE if this is a resolved fmask, used by HW components
1467         UINT_32 ignoreSE:   1;          ///< TRUE if shader engines are ignored.
1468         UINT_32 reserved:  30;          ///< Reserved for future use.
1469     };
1470     ADDR_TILEINFO*  pTileInfo;          ///< 2D tile parameters. Client must provide all data
1471 
1472 } ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT;
1473 
1474 /**
1475 ****************************************************************************************************
1476 *   ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
1477 *
1478 *   @brief
1479 *       Output structure for AddrComputeFmaskCoordFromAddr
1480 ****************************************************************************************************
1481 */
1482 typedef struct _ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
1483 {
1484     UINT_32 size;       ///< Size of this structure in bytes
1485 
1486     UINT_32 x;          ///< X coordinate
1487     UINT_32 y;          ///< Y coordinate
1488     UINT_32 slice;      ///< Slice index
1489     UINT_32 plane;      ///< Plane number
1490     UINT_32 sample;     ///< Sample index (fragment index for EQAA)
1491 } ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT;
1492 
1493 /**
1494 ****************************************************************************************************
1495 *   AddrComputeFmaskCoordFromAddr
1496 *
1497 *   @brief
1498 *       Compute FMASK coordinate from an given address
1499 ****************************************************************************************************
1500 */
1501 ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr(
1502     ADDR_HANDLE                                     hLib,
1503     const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT*   pIn,
1504     ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT*        pOut);
1505 
1506 
1507 
1508 ////////////////////////////////////////////////////////////////////////////////////////////////////
1509 //                          Element/utility functions
1510 ////////////////////////////////////////////////////////////////////////////////////////////////////
1511 
1512 /**
1513 ****************************************************************************************************
1514 *   AddrGetVersion
1515 *
1516 *   @brief
1517 *       Get AddrLib version number
1518 ****************************************************************************************************
1519 */
1520 UINT_32 ADDR_API AddrGetVersion(ADDR_HANDLE hLib);
1521 
1522 /**
1523 ****************************************************************************************************
1524 *   AddrUseTileIndex
1525 *
1526 *   @brief
1527 *       Return TRUE if tileIndex is enabled in this address library
1528 ****************************************************************************************************
1529 */
1530 BOOL_32 ADDR_API AddrUseTileIndex(ADDR_HANDLE hLib);
1531 
1532 /**
1533 ****************************************************************************************************
1534 *   AddrUseCombinedSwizzle
1535 *
1536 *   @brief
1537 *       Return TRUE if combined swizzle is enabled in this address library
1538 ****************************************************************************************************
1539 */
1540 BOOL_32 ADDR_API AddrUseCombinedSwizzle(ADDR_HANDLE hLib);
1541 
1542 /**
1543 ****************************************************************************************************
1544 *   ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT
1545 *
1546 *   @brief
1547 *       Input structure of AddrExtractBankPipeSwizzle
1548 ****************************************************************************************************
1549 */
1550 typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT
1551 {
1552     UINT_32         size;           ///< Size of this structure in bytes
1553 
1554     UINT_32         base256b;       ///< Base256b value
1555 
1556     /// r800 and later HWL parameters
1557     ADDR_TILEINFO*  pTileInfo;      ///< 2D tile parameters. Client must provide all data
1558 
1559     INT_32          tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
1560                                     ///  while the global useTileIndex is set to 1
1561     INT_32          macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1562                                     ///< README: When tileIndex is not -1, this must be valid
1563 } ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT;
1564 
1565 /**
1566 ****************************************************************************************************
1567 *   ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT
1568 *
1569 *   @brief
1570 *       Output structure of AddrExtractBankPipeSwizzle
1571 ****************************************************************************************************
1572 */
1573 typedef struct _ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT
1574 {
1575     UINT_32 size;           ///< Size of this structure in bytes
1576 
1577     UINT_32 bankSwizzle;    ///< Bank swizzle
1578     UINT_32 pipeSwizzle;    ///< Pipe swizzle
1579 } ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT;
1580 
1581 /**
1582 ****************************************************************************************************
1583 *   AddrExtractBankPipeSwizzle
1584 *
1585 *   @brief
1586 *       Extract Bank and Pipe swizzle from base256b
1587 *   @return
1588 *       ADDR_OK if no error
1589 ****************************************************************************************************
1590 */
1591 ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle(
1592     ADDR_HANDLE                                 hLib,
1593     const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT*  pIn,
1594     ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT*       pOut);
1595 
1596 
1597 /**
1598 ****************************************************************************************************
1599 *   ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT
1600 *
1601 *   @brief
1602 *       Input structure of AddrCombineBankPipeSwizzle
1603 ****************************************************************************************************
1604 */
1605 typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT
1606 {
1607     UINT_32         size;           ///< Size of this structure in bytes
1608 
1609     UINT_32         bankSwizzle;    ///< Bank swizzle
1610     UINT_32         pipeSwizzle;    ///< Pipe swizzle
1611     UINT_64         baseAddr;       ///< Base address (leave it zero for driver clients)
1612 
1613     /// r800 and later HWL parameters
1614     ADDR_TILEINFO*  pTileInfo;      ///< 2D tile parameters. Client must provide all data
1615 
1616     INT_32          tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
1617                                     ///  while the global useTileIndex is set to 1
1618     INT_32          macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1619                                     ///< README: When tileIndex is not -1, this must be valid
1620 } ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT;
1621 
1622 /**
1623 ****************************************************************************************************
1624 *   ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT
1625 *
1626 *   @brief
1627 *       Output structure of AddrCombineBankPipeSwizzle
1628 ****************************************************************************************************
1629 */
1630 typedef struct _ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT
1631 {
1632     UINT_32 size;           ///< Size of this structure in bytes
1633 
1634     UINT_32 tileSwizzle;    ///< Combined swizzle
1635 } ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT;
1636 
1637 /**
1638 ****************************************************************************************************
1639 *   AddrCombineBankPipeSwizzle
1640 *
1641 *   @brief
1642 *       Combine Bank and Pipe swizzle
1643 *   @return
1644 *       ADDR_OK if no error
1645 *   @note
1646 *       baseAddr here is full MCAddress instead of base256b
1647 ****************************************************************************************************
1648 */
1649 ADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle(
1650     ADDR_HANDLE                                 hLib,
1651     const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT*  pIn,
1652     ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT*       pOut);
1653 
1654 
1655 
1656 /**
1657 ****************************************************************************************************
1658 *   ADDR_COMPUTE_SLICESWIZZLE_INPUT
1659 *
1660 *   @brief
1661 *       Input structure of AddrComputeSliceSwizzle
1662 ****************************************************************************************************
1663 */
1664 typedef struct _ADDR_COMPUTE_SLICESWIZZLE_INPUT
1665 {
1666     UINT_32         size;               ///< Size of this structure in bytes
1667 
1668     AddrTileMode    tileMode;           ///< Tile Mode
1669     UINT_32         baseSwizzle;        ///< Base tile swizzle
1670     UINT_32         slice;              ///< Slice index
1671     UINT_64         baseAddr;           ///< Base address, driver should leave it 0 in most cases
1672 
1673     /// r800 and later HWL parameters
1674     ADDR_TILEINFO*  pTileInfo;          ///< 2D tile parameters. Actually banks needed here!
1675 
1676     INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
1677                                         ///  while the global useTileIndex is set to 1
1678     INT_32          macroModeIndex;     ///< Index in macro tile mode table if there is one (CI)
1679                                         ///< README: When tileIndex is not -1, this must be valid
1680 } ADDR_COMPUTE_SLICESWIZZLE_INPUT;
1681 
1682 
1683 
1684 /**
1685 ****************************************************************************************************
1686 *   ADDR_COMPUTE_SLICESWIZZLE_OUTPUT
1687 *
1688 *   @brief
1689 *       Output structure of AddrComputeSliceSwizzle
1690 ****************************************************************************************************
1691 */
1692 typedef struct _ADDR_COMPUTE_SLICESWIZZLE_OUTPUT
1693 {
1694     UINT_32  size;           ///< Size of this structure in bytes
1695 
1696     UINT_32  tileSwizzle;    ///< Recalculated tileSwizzle value
1697 } ADDR_COMPUTE_SLICESWIZZLE_OUTPUT;
1698 
1699 /**
1700 ****************************************************************************************************
1701 *   AddrComputeSliceSwizzle
1702 *
1703 *   @brief
1704 *       Extract Bank and Pipe swizzle from base256b
1705 *   @return
1706 *       ADDR_OK if no error
1707 ****************************************************************************************************
1708 */
1709 ADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle(
1710     ADDR_HANDLE                             hLib,
1711     const ADDR_COMPUTE_SLICESWIZZLE_INPUT*  pIn,
1712     ADDR_COMPUTE_SLICESWIZZLE_OUTPUT*       pOut);
1713 
1714 
1715 /**
1716 ****************************************************************************************************
1717 *   AddrSwizzleGenOption
1718 *
1719 *   @brief
1720 *       Which swizzle generating options: legacy or linear
1721 ****************************************************************************************************
1722 */
1723 typedef enum _AddrSwizzleGenOption
1724 {
1725     ADDR_SWIZZLE_GEN_DEFAULT    = 0,    ///< As is in client driver implemention for swizzle
1726     ADDR_SWIZZLE_GEN_LINEAR     = 1,    ///< Using a linear increment of swizzle
1727 } AddrSwizzleGenOption;
1728 
1729 /**
1730 ****************************************************************************************************
1731 *   AddrSwizzleOption
1732 *
1733 *   @brief
1734 *       Controls how swizzle is generated
1735 ****************************************************************************************************
1736 */
1737 typedef union _ADDR_SWIZZLE_OPTION
1738 {
1739     struct
1740     {
1741         UINT_32 genOption       : 1;    ///< The way swizzle is generated, see AddrSwizzleGenOption
1742         UINT_32 reduceBankBit   : 1;    ///< TRUE if we need reduce swizzle bits
1743         UINT_32 reserved        :30;    ///< Reserved bits
1744     };
1745 
1746     UINT_32 value;
1747 
1748 } ADDR_SWIZZLE_OPTION;
1749 
1750 /**
1751 ****************************************************************************************************
1752 *   ADDR_COMPUTE_BASE_SWIZZLE_INPUT
1753 *
1754 *   @brief
1755 *       Input structure of AddrComputeBaseSwizzle
1756 ****************************************************************************************************
1757 */
1758 typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_INPUT
1759 {
1760     UINT_32             size;           ///< Size of this structure in bytes
1761 
1762     ADDR_SWIZZLE_OPTION option;         ///< Swizzle option
1763     UINT_32             surfIndex;      ///< Index of this surface type
1764     AddrTileMode        tileMode;       ///< Tile Mode
1765 
1766     /// r800 and later HWL parameters
1767     ADDR_TILEINFO*      pTileInfo;      ///< 2D tile parameters. Actually banks needed here!
1768 
1769     INT_32              tileIndex;      ///< Tile index, MUST be -1 if you don't want to use it
1770                                         ///  while the global useTileIndex is set to 1
1771     INT_32              macroModeIndex; ///< Index in macro tile mode table if there is one (CI)
1772                                         ///< README: When tileIndex is not -1, this must be valid
1773 } ADDR_COMPUTE_BASE_SWIZZLE_INPUT;
1774 
1775 /**
1776 ****************************************************************************************************
1777 *   ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT
1778 *
1779 *   @brief
1780 *       Output structure of AddrComputeBaseSwizzle
1781 ****************************************************************************************************
1782 */
1783 typedef struct _ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT
1784 {
1785     UINT_32 size;           ///< Size of this structure in bytes
1786 
1787     UINT_32 tileSwizzle;    ///< Combined swizzle
1788 } ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT;
1789 
1790 /**
1791 ****************************************************************************************************
1792 *   AddrComputeBaseSwizzle
1793 *
1794 *   @brief
1795 *       Return a Combined Bank and Pipe swizzle base on surface based on surface type/index
1796 *   @return
1797 *       ADDR_OK if no error
1798 ****************************************************************************************************
1799 */
1800 ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle(
1801     ADDR_HANDLE                             hLib,
1802     const ADDR_COMPUTE_BASE_SWIZZLE_INPUT*  pIn,
1803     ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT*       pOut);
1804 
1805 
1806 
1807 /**
1808 ****************************************************************************************************
1809 *   ELEM_GETEXPORTNORM_INPUT
1810 *
1811 *   @brief
1812 *       Input structure for ElemGetExportNorm
1813 *
1814 ****************************************************************************************************
1815 */
1816 typedef struct _ELEM_GETEXPORTNORM_INPUT
1817 {
1818     UINT_32             size;       ///< Size of this structure in bytes
1819 
1820     AddrColorFormat     format;     ///< Color buffer format; Client should use ColorFormat
1821     AddrSurfaceNumber   num;        ///< Surface number type; Client should use NumberType
1822     AddrSurfaceSwap     swap;       ///< Surface swap byte swap; Client should use SurfaceSwap
1823     UINT_32             numSamples; ///< Number of samples
1824 } ELEM_GETEXPORTNORM_INPUT;
1825 
1826 /**
1827 ****************************************************************************************************
1828 *  ElemGetExportNorm
1829 *
1830 *   @brief
1831 *       Helper function to check one format can be EXPORT_NUM, which is a register
1832 *       CB_COLOR_INFO.SURFACE_FORMAT. FP16 can be reported as EXPORT_NORM for rv770 in r600
1833 *       family
1834 *   @note
1835 *       The implementation is only for r600.
1836 *       00 - EXPORT_FULL: PS exports are 4 pixels with 4 components with 32-bits-per-component. (two
1837 *       clocks per export)
1838 *       01 - EXPORT_NORM: PS exports are 4 pixels with 4 components with 16-bits-per-component. (one
1839 *       clock per export)
1840 *
1841 ****************************************************************************************************
1842 */
1843 BOOL_32 ADDR_API ElemGetExportNorm(
1844     ADDR_HANDLE                     hLib,
1845     const ELEM_GETEXPORTNORM_INPUT* pIn);
1846 
1847 
1848 
1849 /**
1850 ****************************************************************************************************
1851 *   ELEM_FLT32TODEPTHPIXEL_INPUT
1852 *
1853 *   @brief
1854 *       Input structure for addrFlt32ToDepthPixel
1855 *
1856 ****************************************************************************************************
1857 */
1858 typedef struct _ELEM_FLT32TODEPTHPIXEL_INPUT
1859 {
1860     UINT_32         size;           ///< Size of this structure in bytes
1861 
1862     AddrDepthFormat format;         ///< Depth buffer format
1863     ADDR_FLT_32     comps[2];       ///< Component values (Z/stencil)
1864 } ELEM_FLT32TODEPTHPIXEL_INPUT;
1865 
1866 /**
1867 ****************************************************************************************************
1868 *   ELEM_FLT32TODEPTHPIXEL_INPUT
1869 *
1870 *   @brief
1871 *       Output structure for ElemFlt32ToDepthPixel
1872 *
1873 ****************************************************************************************************
1874 */
1875 typedef struct _ELEM_FLT32TODEPTHPIXEL_OUTPUT
1876 {
1877     UINT_32 size;           ///< Size of this structure in bytes
1878 
1879     UINT_8* pPixel;         ///< Real depth value. Same data type as depth buffer.
1880                             ///  Client must provide enough storage for this type.
1881     UINT_32 depthBase;      ///< Tile base in bits for depth bits
1882     UINT_32 stencilBase;    ///< Tile base in bits for stencil bits
1883     UINT_32 depthBits;      ///< Bits for depth
1884     UINT_32 stencilBits;    ///< Bits for stencil
1885 } ELEM_FLT32TODEPTHPIXEL_OUTPUT;
1886 
1887 /**
1888 ****************************************************************************************************
1889 *   ElemFlt32ToDepthPixel
1890 *
1891 *   @brief
1892 *       Convert a FLT_32 value to a depth/stencil pixel value
1893 *
1894 *   @return
1895 *       Return code
1896 *
1897 ****************************************************************************************************
1898 */
1899 ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel(
1900     ADDR_HANDLE                         hLib,
1901     const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn,
1902     ELEM_FLT32TODEPTHPIXEL_OUTPUT*      pOut);
1903 
1904 
1905 
1906 /**
1907 ****************************************************************************************************
1908 *   ELEM_FLT32TOCOLORPIXEL_INPUT
1909 *
1910 *   @brief
1911 *       Input structure for addrFlt32ToColorPixel
1912 *
1913 ****************************************************************************************************
1914 */
1915 typedef struct _ELEM_FLT32TOCOLORPIXEL_INPUT
1916 {
1917     UINT_32            size;           ///< Size of this structure in bytes
1918 
1919     AddrColorFormat    format;         ///< Color buffer format
1920     AddrSurfaceNumber  surfNum;        ///< Surface number
1921     AddrSurfaceSwap    surfSwap;       ///< Surface swap
1922     ADDR_FLT_32        comps[4];       ///< Component values (r/g/b/a)
1923 } ELEM_FLT32TOCOLORPIXEL_INPUT;
1924 
1925 /**
1926 ****************************************************************************************************
1927 *   ELEM_FLT32TOCOLORPIXEL_INPUT
1928 *
1929 *   @brief
1930 *       Output structure for ElemFlt32ToColorPixel
1931 *
1932 ****************************************************************************************************
1933 */
1934 typedef struct _ELEM_FLT32TOCOLORPIXEL_OUTPUT
1935 {
1936     UINT_32 size;       ///< Size of this structure in bytes
1937 
1938     UINT_8* pPixel;     ///< Real color value. Same data type as color buffer.
1939                         ///  Client must provide enough storage for this type.
1940 } ELEM_FLT32TOCOLORPIXEL_OUTPUT;
1941 
1942 /**
1943 ****************************************************************************************************
1944 *   ElemFlt32ToColorPixel
1945 *
1946 *   @brief
1947 *       Convert a FLT_32 value to a red/green/blue/alpha pixel value
1948 *
1949 *   @return
1950 *       Return code
1951 *
1952 ****************************************************************************************************
1953 */
1954 ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel(
1955     ADDR_HANDLE                         hLib,
1956     const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn,
1957     ELEM_FLT32TOCOLORPIXEL_OUTPUT*      pOut);
1958 
1959 /**
1960 ****************************************************************************************************
1961 *   ElemSize
1962 *
1963 *   @brief
1964 *       Get bits-per-element for specified format
1965 *
1966 *   @return
1967 *       Bits-per-element of specified format
1968 *
1969 ****************************************************************************************************
1970 */
1971 UINT_32 ADDR_API ElemSize(
1972     ADDR_HANDLE hLib,
1973     AddrFormat  format);
1974 
1975 /**
1976 ****************************************************************************************************
1977 *   ADDR_CONVERT_TILEINFOTOHW_INPUT
1978 *
1979 *   @brief
1980 *       Input structure for AddrConvertTileInfoToHW
1981 *   @note
1982 *       When reverse is TRUE, indices are igonred
1983 ****************************************************************************************************
1984 */
1985 typedef struct _ADDR_CONVERT_TILEINFOTOHW_INPUT
1986 {
1987     UINT_32         size;               ///< Size of this structure in bytes
1988     BOOL_32         reverse;            ///< Convert control flag.
1989                                         ///  FALSE: convert from real value to HW value;
1990                                         ///  TRUE: convert from HW value to real value.
1991 
1992     /// r800 and later HWL parameters
1993     ADDR_TILEINFO*  pTileInfo;          ///< Tile parameters with real value
1994 
1995     INT_32          tileIndex;          ///< Tile index, MUST be -1 if you don't want to use it
1996                                         ///  while the global useTileIndex is set to 1
1997     INT_32          macroModeIndex;     ///< Index in macro tile mode table if there is one (CI)
1998                                         ///< README: When tileIndex is not -1, this must be valid
1999     UINT_32         bpp;                ///< Bits per pixel
2000 } ADDR_CONVERT_TILEINFOTOHW_INPUT;
2001 
2002 /**
2003 ****************************************************************************************************
2004 *   ADDR_CONVERT_TILEINFOTOHW_OUTPUT
2005 *
2006 *   @brief
2007 *       Output structure for AddrConvertTileInfoToHW
2008 ****************************************************************************************************
2009 */
2010 typedef struct _ADDR_CONVERT_TILEINFOTOHW_OUTPUT
2011 {
2012     UINT_32             size;               ///< Size of this structure in bytes
2013 
2014     /// r800 and later HWL parameters
2015     ADDR_TILEINFO*      pTileInfo;          ///< Tile parameters with hardware register value
2016 
2017 } ADDR_CONVERT_TILEINFOTOHW_OUTPUT;
2018 
2019 /**
2020 ****************************************************************************************************
2021 *   AddrConvertTileInfoToHW
2022 *
2023 *   @brief
2024 *       Convert tile info from real value to hardware register value
2025 ****************************************************************************************************
2026 */
2027 ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW(
2028     ADDR_HANDLE                             hLib,
2029     const ADDR_CONVERT_TILEINFOTOHW_INPUT*  pIn,
2030     ADDR_CONVERT_TILEINFOTOHW_OUTPUT*       pOut);
2031 
2032 
2033 
2034 /**
2035 ****************************************************************************************************
2036 *   ADDR_CONVERT_TILEINDEX_INPUT
2037 *
2038 *   @brief
2039 *       Input structure for AddrConvertTileIndex
2040 ****************************************************************************************************
2041 */
2042 typedef struct _ADDR_CONVERT_TILEINDEX_INPUT
2043 {
2044     UINT_32         size;               ///< Size of this structure in bytes
2045 
2046     INT_32          tileIndex;          ///< Tile index
2047     INT_32          macroModeIndex;     ///< Index in macro tile mode table if there is one (CI)
2048     UINT_32         bpp;                ///< Bits per pixel
2049     BOOL_32         tileInfoHw;         ///< Set to TRUE if client wants HW enum, otherwise actual
2050 } ADDR_CONVERT_TILEINDEX_INPUT;
2051 
2052 /**
2053 ****************************************************************************************************
2054 *   ADDR_CONVERT_TILEINDEX_OUTPUT
2055 *
2056 *   @brief
2057 *       Output structure for AddrConvertTileIndex
2058 ****************************************************************************************************
2059 */
2060 typedef struct _ADDR_CONVERT_TILEINDEX_OUTPUT
2061 {
2062     UINT_32             size;           ///< Size of this structure in bytes
2063 
2064     AddrTileMode        tileMode;       ///< Tile mode
2065     AddrTileType        tileType;       ///< Tile type
2066     ADDR_TILEINFO*      pTileInfo;      ///< Tile info
2067 
2068 } ADDR_CONVERT_TILEINDEX_OUTPUT;
2069 
2070 /**
2071 ****************************************************************************************************
2072 *   AddrConvertTileIndex
2073 *
2074 *   @brief
2075 *       Convert tile index to tile mode/type/info
2076 ****************************************************************************************************
2077 */
2078 ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex(
2079     ADDR_HANDLE                         hLib,
2080     const ADDR_CONVERT_TILEINDEX_INPUT* pIn,
2081     ADDR_CONVERT_TILEINDEX_OUTPUT*      pOut);
2082 
2083 /**
2084 ****************************************************************************************************
2085 *   ADDR_GET_MACROMODEINDEX_INPUT
2086 *
2087 *   @brief
2088 *       Input structure for AddrGetMacroModeIndex
2089 ****************************************************************************************************
2090 */
2091 typedef struct _ADDR_GET_MACROMODEINDEX_INPUT
2092 {
2093     UINT_32             size;               ///< Size of this structure in bytes
2094     ADDR_SURFACE_FLAGS  flags;              ///< Surface flag
2095     INT_32              tileIndex;          ///< Tile index
2096     UINT_32             bpp;                ///< Bits per pixel
2097     UINT_32             numFrags;           ///< Number of color fragments
2098 } ADDR_GET_MACROMODEINDEX_INPUT;
2099 
2100 /**
2101 ****************************************************************************************************
2102 *   ADDR_GET_MACROMODEINDEX_OUTPUT
2103 *
2104 *   @brief
2105 *       Output structure for AddrGetMacroModeIndex
2106 ****************************************************************************************************
2107 */
2108 typedef struct _ADDR_GET_MACROMODEINDEX_OUTPUT
2109 {
2110     UINT_32             size;            ///< Size of this structure in bytes
2111     INT_32              macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
2112 } ADDR_GET_MACROMODEINDEX_OUTPUT;
2113 
2114 /**
2115 ****************************************************************************************************
2116 *   AddrGetMacroModeIndex
2117 *
2118 *   @brief
2119 *       Get macro mode index based on input parameters
2120 ****************************************************************************************************
2121 */
2122 ADDR_E_RETURNCODE ADDR_API AddrGetMacroModeIndex(
2123     ADDR_HANDLE                          hLib,
2124     const ADDR_GET_MACROMODEINDEX_INPUT* pIn,
2125     ADDR_GET_MACROMODEINDEX_OUTPUT*      pOut);
2126 
2127 /**
2128 ****************************************************************************************************
2129 *   ADDR_CONVERT_TILEINDEX1_INPUT
2130 *
2131 *   @brief
2132 *       Input structure for AddrConvertTileIndex1 (without macro mode index)
2133 ****************************************************************************************************
2134 */
2135 typedef struct _ADDR_CONVERT_TILEINDEX1_INPUT
2136 {
2137     UINT_32         size;               ///< Size of this structure in bytes
2138 
2139     INT_32          tileIndex;          ///< Tile index
2140     UINT_32         bpp;                ///< Bits per pixel
2141     UINT_32         numSamples;         ///< Number of samples
2142     BOOL_32         tileInfoHw;         ///< Set to TRUE if client wants HW enum, otherwise actual
2143 } ADDR_CONVERT_TILEINDEX1_INPUT;
2144 
2145 /**
2146 ****************************************************************************************************
2147 *   AddrConvertTileIndex1
2148 *
2149 *   @brief
2150 *       Convert tile index to tile mode/type/info
2151 ****************************************************************************************************
2152 */
2153 ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1(
2154     ADDR_HANDLE                             hLib,
2155     const ADDR_CONVERT_TILEINDEX1_INPUT*    pIn,
2156     ADDR_CONVERT_TILEINDEX_OUTPUT*          pOut);
2157 
2158 
2159 
2160 /**
2161 ****************************************************************************************************
2162 *   ADDR_GET_TILEINDEX_INPUT
2163 *
2164 *   @brief
2165 *       Input structure for AddrGetTileIndex
2166 ****************************************************************************************************
2167 */
2168 typedef struct _ADDR_GET_TILEINDEX_INPUT
2169 {
2170     UINT_32         size;           ///< Size of this structure in bytes
2171 
2172     AddrTileMode    tileMode;       ///< Tile mode
2173     AddrTileType    tileType;       ///< Tile-type: disp/non-disp/...
2174     ADDR_TILEINFO*  pTileInfo;      ///< Pointer to tile-info structure, can be NULL for linear/1D
2175 } ADDR_GET_TILEINDEX_INPUT;
2176 
2177 /**
2178 ****************************************************************************************************
2179 *   ADDR_GET_TILEINDEX_OUTPUT
2180 *
2181 *   @brief
2182 *       Output structure for AddrGetTileIndex
2183 ****************************************************************************************************
2184 */
2185 typedef struct _ADDR_GET_TILEINDEX_OUTPUT
2186 {
2187     UINT_32         size;           ///< Size of this structure in bytes
2188 
2189     INT_32          index;          ///< index in table
2190 } ADDR_GET_TILEINDEX_OUTPUT;
2191 
2192 /**
2193 ****************************************************************************************************
2194 *   AddrGetTileIndex
2195 *
2196 *   @brief
2197 *       Get the tiling mode index in table
2198 ****************************************************************************************************
2199 */
2200 ADDR_E_RETURNCODE ADDR_API AddrGetTileIndex(
2201     ADDR_HANDLE                     hLib,
2202     const ADDR_GET_TILEINDEX_INPUT* pIn,
2203     ADDR_GET_TILEINDEX_OUTPUT*      pOut);
2204 
2205 
2206 
2207 /**
2208 ****************************************************************************************************
2209 *   ADDR_PRT_INFO_INPUT
2210 *
2211 *   @brief
2212 *       Input structure for AddrComputePrtInfo
2213 ****************************************************************************************************
2214 */
2215 typedef struct _ADDR_PRT_INFO_INPUT
2216 {
2217     AddrFormat          format;        ///< Surface format
2218     UINT_32             baseMipWidth;  ///< Base mipmap width
2219     UINT_32             baseMipHeight; ///< Base mipmap height
2220     UINT_32             baseMipDepth;  ///< Base mipmap depth
2221     UINT_32             numFrags;      ///< Number of fragments,
2222 } ADDR_PRT_INFO_INPUT;
2223 
2224 /**
2225 ****************************************************************************************************
2226 *   ADDR_PRT_INFO_OUTPUT
2227 *
2228 *   @brief
2229 *       Input structure for AddrComputePrtInfo
2230 ****************************************************************************************************
2231 */
2232 typedef struct _ADDR_PRT_INFO_OUTPUT
2233 {
2234     UINT_32             prtTileWidth;
2235     UINT_32             prtTileHeight;
2236 } ADDR_PRT_INFO_OUTPUT;
2237 
2238 /**
2239 ****************************************************************************************************
2240 *   AddrComputePrtInfo
2241 *
2242 *   @brief
2243 *       Compute prt surface related information
2244 ****************************************************************************************************
2245 */
2246 ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo(
2247     ADDR_HANDLE                 hLib,
2248     const ADDR_PRT_INFO_INPUT*  pIn,
2249     ADDR_PRT_INFO_OUTPUT*       pOut);
2250 
2251 
2252 
2253 ////////////////////////////////////////////////////////////////////////////////////////////////////
2254 //                                     DCC key functions
2255 ////////////////////////////////////////////////////////////////////////////////////////////////////
2256 
2257 /**
2258 ****************************************************************************************************
2259 *   _ADDR_COMPUTE_DCCINFO_INPUT
2260 *
2261 *   @brief
2262 *       Input structure of AddrComputeDccInfo
2263 ****************************************************************************************************
2264 */
2265 typedef struct _ADDR_COMPUTE_DCCINFO_INPUT
2266 {
2267     UINT_32             size;            ///< Size of this structure in bytes
2268     UINT_32             bpp;             ///< BitPP of color surface
2269     UINT_32             numSamples;      ///< Sample number of color surface
2270     UINT_64             colorSurfSize;   ///< Size of color surface to which dcc key is bound
2271     AddrTileMode        tileMode;        ///< Tile mode of color surface
2272     ADDR_TILEINFO       tileInfo;        ///< Tile info of color surface
2273     UINT_32             tileSwizzle;     ///< Tile swizzle
2274     INT_32              tileIndex;       ///< Tile index of color surface,
2275                                          ///< MUST be -1 if you don't want to use it
2276                                          ///< while the global useTileIndex is set to 1
2277     INT_32              macroModeIndex;  ///< Index in macro tile mode table if there is one (CI)
2278                                          ///< README: When tileIndex is not -1, this must be valid
2279 } ADDR_COMPUTE_DCCINFO_INPUT;
2280 
2281 /**
2282 ****************************************************************************************************
2283 *   ADDR_COMPUTE_DCCINFO_OUTPUT
2284 *
2285 *   @brief
2286 *       Output structure of AddrComputeDccInfo
2287 ****************************************************************************************************
2288 */
2289 typedef struct _ADDR_COMPUTE_DCCINFO_OUTPUT
2290 {
2291     UINT_32 size;                 ///< Size of this structure in bytes
2292     UINT_32 dccRamBaseAlign;      ///< Base alignment of dcc key
2293     UINT_64 dccRamSize;           ///< Size of dcc key
2294     UINT_64 dccFastClearSize;     ///< Size of dcc key portion that can be fast cleared
2295     BOOL_32 subLvlCompressible;   ///< Whether sub resource is compressiable
2296     BOOL_32 dccRamSizeAligned;    ///< Whether the dcc key size is aligned
2297 } ADDR_COMPUTE_DCCINFO_OUTPUT;
2298 
2299 /**
2300 ****************************************************************************************************
2301 *   AddrComputeDccInfo
2302 *
2303 *   @brief
2304 *       Compute DCC key size, base alignment
2305 *       info
2306 ****************************************************************************************************
2307 */
2308 ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo(
2309     ADDR_HANDLE                             hLib,
2310     const ADDR_COMPUTE_DCCINFO_INPUT*       pIn,
2311     ADDR_COMPUTE_DCCINFO_OUTPUT*            pOut);
2312 
2313 
2314 
2315 /**
2316 ****************************************************************************************************
2317 *   ADDR_GET_MAX_ALIGNMENTS_OUTPUT
2318 *
2319 *   @brief
2320 *       Output structure of AddrGetMaxAlignments
2321 ****************************************************************************************************
2322 */
2323 typedef struct _ADDR_GET_MAX_ALIGNMENTS_OUTPUT
2324 {
2325     UINT_32 size;                   ///< Size of this structure in bytes
2326     UINT_32 baseAlign;              ///< Maximum base alignment in bytes
2327 } ADDR_GET_MAX_ALIGNMENTS_OUTPUT;
2328 
2329 /**
2330 ****************************************************************************************************
2331 *   AddrGetMaxAlignments
2332 *
2333 *   @brief
2334 *       Gets maximnum alignments
2335 ****************************************************************************************************
2336 */
2337 ADDR_E_RETURNCODE ADDR_API AddrGetMaxAlignments(
2338     ADDR_HANDLE                     hLib,
2339     ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut);
2340 
2341 /**
2342 ****************************************************************************************************
2343 *   AddrGetMaxMetaAlignments
2344 *
2345 *   @brief
2346 *       Gets maximnum alignments for metadata
2347 ****************************************************************************************************
2348 */
2349 ADDR_E_RETURNCODE ADDR_API AddrGetMaxMetaAlignments(
2350     ADDR_HANDLE                     hLib,
2351     ADDR_GET_MAX_ALIGNMENTS_OUTPUT* pOut);
2352 
2353 /**
2354 ****************************************************************************************************
2355 *                                Address library interface version 2
2356 *                                    available from Gfx9 hardware
2357 ****************************************************************************************************
2358 *     Addr2ComputeSurfaceInfo()
2359 *     Addr2ComputeSurfaceAddrFromCoord()
2360 *     Addr2ComputeSurfaceCoordFromAddr()
2361 
2362 *     Addr2ComputeHtileInfo()
2363 *     Addr2ComputeHtileAddrFromCoord()
2364 *     Addr2ComputeHtileCoordFromAddr()
2365 *
2366 *     Addr2ComputeCmaskInfo()
2367 *     Addr2ComputeCmaskAddrFromCoord()
2368 *     Addr2ComputeCmaskCoordFromAddr()
2369 *
2370 *     Addr2ComputeFmaskInfo()
2371 *     Addr2ComputeFmaskAddrFromCoord()
2372 *     Addr2ComputeFmaskCoordFromAddr()
2373 *
2374 *     Addr2ComputeDccInfo()
2375 *
2376 **/
2377 
2378 
2379 ////////////////////////////////////////////////////////////////////////////////////////////////////
2380 //                                    Surface functions for Gfx9
2381 ////////////////////////////////////////////////////////////////////////////////////////////////////
2382 
2383 /**
2384 ****************************************************************************************************
2385 *   ADDR2_SURFACE_FLAGS
2386 *
2387 *   @brief
2388 *       Surface flags
2389 ****************************************************************************************************
2390 */
2391 typedef union _ADDR2_SURFACE_FLAGS
2392 {
2393     struct
2394     {
2395         UINT_32 color             :  1; ///< This resource is a color buffer, can be used with RTV
2396         UINT_32 depth             :  1; ///< Thie resource is a depth buffer, can be used with DSV
2397         UINT_32 stencil           :  1; ///< Thie resource is a stencil buffer, can be used with DSV
2398         UINT_32 fmask             :  1; ///< This is an fmask surface
2399         UINT_32 overlay           :  1; ///< This is an overlay surface
2400         UINT_32 display           :  1; ///< This resource is displable, can be used with DRV
2401         UINT_32 prt               :  1; ///< This is a partially resident texture
2402         UINT_32 qbStereo          :  1; ///< This is a quad buffer stereo surface
2403         UINT_32 interleaved       :  1; ///< Special flag for interleaved YUV surface padding
2404         UINT_32 texture           :  1; ///< This resource can be used with SRV
2405         UINT_32 unordered         :  1; ///< This resource can be used with UAV
2406         UINT_32 rotated           :  1; ///< This resource is rotated and displable
2407         UINT_32 needEquation      :  1; ///< This resource needs equation to be generated if possible
2408         UINT_32 opt4space         :  1; ///< This resource should be optimized for space
2409         UINT_32 minimizeAlign     :  1; ///< This resource should use minimum alignment
2410         UINT_32 noMetadata        :  1; ///< This resource has no metadata
2411         UINT_32 metaRbUnaligned   :  1; ///< This resource has rb unaligned metadata
2412         UINT_32 metaPipeUnaligned :  1; ///< This resource has pipe unaligned metadata
2413         UINT_32 view3dAs2dArray   :  1; ///< This resource is a 3D resource viewed as 2D array
2414         UINT_32 reserved          : 13; ///< Reserved bits
2415     };
2416 
2417     UINT_32 value;
2418 } ADDR2_SURFACE_FLAGS;
2419 
2420 /**
2421 ****************************************************************************************************
2422 *   ADDR2_COMPUTE_SURFACE_INFO_INPUT
2423 *
2424 *   @brief
2425 *       Input structure for Addr2ComputeSurfaceInfo
2426 ****************************************************************************************************
2427 */
2428 typedef struct _ADDR2_COMPUTE_SURFACE_INFO_INPUT
2429 {
2430     UINT_32               size;              ///< Size of this structure in bytes
2431 
2432     ADDR2_SURFACE_FLAGS   flags;             ///< Surface flags
2433     AddrSwizzleMode       swizzleMode;       ///< Swizzle Mode for Gfx9
2434     AddrResourceType      resourceType;      ///< Surface type
2435     AddrFormat            format;            ///< Surface format
2436     UINT_32               bpp;               ///< bits per pixel
2437     UINT_32               width;             ///< Width (of mip0), in pixels
2438     UINT_32               height;            ///< Height (of mip0), in pixels
2439     UINT_32               numSlices;         ///< Number surface slice/depth (of mip0),
2440     UINT_32               numMipLevels;      ///< Total mipmap levels.
2441     UINT_32               numSamples;        ///< Number of samples
2442     UINT_32               numFrags;          ///< Number of fragments, leave it zero or the same as
2443                                              ///  number of samples for normal AA; Set it to the
2444                                              ///  number of fragments for EQAA
2445     UINT_32               pitchInElement;    ///< Pitch in elements (blocks for compressed formats)
2446     UINT_32               sliceAlign;        ///< Required slice size in bytes
2447 } ADDR2_COMPUTE_SURFACE_INFO_INPUT;
2448 
2449 /**
2450 ****************************************************************************************************
2451 *   ADDR2_MIP_INFO
2452 *
2453 *   @brief
2454 *       Structure that contains information for mip level
2455 *
2456 ****************************************************************************************************
2457 */
2458 typedef struct _ADDR2_MIP_INFO
2459 {
2460     UINT_32             pitch;              ///< Pitch in elements
2461     UINT_32             height;             ///< Padded height in elements
2462     UINT_32             depth;              ///< Padded depth
2463     UINT_32             pixelPitch;         ///< Pitch in pixels
2464     UINT_32             pixelHeight;        ///< Padded height in pixels
2465     UINT_32             equationIndex;      ///< Equation index in the equation table
2466     UINT_64             offset;             ///< Offset in bytes from mip base, should only be used
2467                                             ///< to setup vam surface descriptor, can't be used
2468                                             ///< to setup swizzle pattern
2469     UINT_64             macroBlockOffset;   ///< macro block offset in bytes from mip base
2470     UINT_32             mipTailOffset;      ///< mip tail offset in bytes
2471     UINT_32             mipTailCoordX;      ///< mip tail coord x
2472     UINT_32             mipTailCoordY;      ///< mip tail coord y
2473     UINT_32             mipTailCoordZ;      ///< mip tail coord z
2474 } ADDR2_MIP_INFO;
2475 
2476 /**
2477 ****************************************************************************************************
2478 *   ADDR2_COMPUTE_SURFACE_INFO_OUTPUT
2479 *
2480 *   @brief
2481 *       Output structure for Addr2ComputeSurfInfo
2482 *   @note
2483         Element: AddrLib unit for computing. e.g. BCn: 4x4 blocks; R32B32B32: 32bit with 3x pitch
2484         Pixel: Original pixel
2485 ****************************************************************************************************
2486 */
2487 typedef struct _ADDR2_COMPUTE_SURFACE_INFO_OUTPUT
2488 {
2489     UINT_32             size;                 ///< Size of this structure in bytes
2490 
2491     UINT_32             pitch;                ///< Pitch in elements (blocks for compressed formats)
2492     UINT_32             height;               ///< Padded height (of mip0) in elements
2493     UINT_32             numSlices;            ///< Padded depth for 3d resource
2494                                               ///< or padded number of slices for 2d array resource
2495     UINT_32             mipChainPitch;        ///< Pitch (of total mip chain) in elements
2496     UINT_32             mipChainHeight;       ///< Padded height (of total mip chain) in elements
2497     UINT_32             mipChainSlice;        ///< Padded depth (of total mip chain)
2498     UINT_64             sliceSize;            ///< Slice (total mip chain) size in bytes
2499     UINT_64             surfSize;             ///< Surface (total mip chain) size in bytes
2500     UINT_32             baseAlign;            ///< Base address alignment
2501     UINT_32             bpp;                  ///< Bits per elements
2502                                               ///  (e.g. blocks for BCn, 1/3 for 96bit)
2503     UINT_32             pixelMipChainPitch;   ///< Mip chain pitch in original pixels
2504     UINT_32             pixelMipChainHeight;  ///< Mip chain height in original pixels
2505     UINT_32             pixelPitch;           ///< Pitch in original pixels
2506     UINT_32             pixelHeight;          ///< Height in original pixels
2507     UINT_32             pixelBits;            ///< Original bits per pixel, passed from input
2508 
2509     UINT_32             blockWidth;           ///< Width in element inside one block
2510     UINT_32             blockHeight;          ///< Height in element inside one block
2511     UINT_32             blockSlices;          ///< Slice number inside one block
2512                                               ///< Prt tile is one block, its width/height/slice
2513                                               ///< equals to blcok width/height/slice
2514 
2515     BOOL_32             epitchIsHeight;       ///< Whether to use height to program epitch register
2516     /// Stereo info
2517     ADDR_QBSTEREOINFO*  pStereoInfo;          ///< Stereo info, needed if qbStereo flag is TRUE
2518     /// Mip info
2519     ADDR2_MIP_INFO*     pMipInfo;             ///< Pointer to mip information array
2520                                               ///  if it is not NULL, the array is assumed to
2521                                               ///  contain numMipLevels entries
2522 
2523     UINT_32             equationIndex;        ///< Equation index in the equation table of mip0
2524     BOOL_32             mipChainInTail;       ///< If whole mipchain falls into mip tail block
2525     UINT_32             firstMipIdInTail;     ///< The id of first mip in tail, if there is no mip
2526                                               ///  in tail, it will be set to number of mip levels
2527 } ADDR2_COMPUTE_SURFACE_INFO_OUTPUT;
2528 
2529 /**
2530 ****************************************************************************************************
2531 *   Addr2ComputeSurfaceInfo
2532 *
2533 *   @brief
2534 *       Compute surface width/height/slices/alignments and suitable tiling mode
2535 ****************************************************************************************************
2536 */
2537 ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceInfo(
2538     ADDR_HANDLE                                hLib,
2539     const ADDR2_COMPUTE_SURFACE_INFO_INPUT*    pIn,
2540     ADDR2_COMPUTE_SURFACE_INFO_OUTPUT*         pOut);
2541 
2542 
2543 
2544 /**
2545 ****************************************************************************************************
2546 *   ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
2547 *
2548 *   @brief
2549 *       Input structure for Addr2ComputeSurfaceAddrFromCoord
2550 ****************************************************************************************************
2551 */
2552 typedef struct _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
2553 {
2554     UINT_32             size;            ///< Size of this structure in bytes
2555 
2556     UINT_32             x;               ///< X coordinate
2557     UINT_32             y;               ///< Y coordinate
2558     UINT_32             slice;           ///< Slice index
2559     UINT_32             sample;          ///< Sample index, use fragment index for EQAA
2560     UINT_32             mipId;           ///< the mip ID in mip chain
2561 
2562     AddrSwizzleMode     swizzleMode;     ///< Swizzle mode for Gfx9
2563     ADDR2_SURFACE_FLAGS flags;           ///< Surface flags
2564     AddrResourceType    resourceType;    ///< Surface type
2565     UINT_32             bpp;             ///< Bits per pixel
2566     UINT_32             unalignedWidth;  ///< Surface original width (of mip0)
2567     UINT_32             unalignedHeight; ///< Surface original height (of mip0)
2568     UINT_32             numSlices;       ///< Surface original slices (of mip0)
2569     UINT_32             numMipLevels;    ///< Total mipmap levels
2570     UINT_32             numSamples;      ///< Number of samples
2571     UINT_32             numFrags;        ///< Number of fragments, leave it zero or the same as
2572                                          ///  number of samples for normal AA; Set it to the
2573                                          ///  number of fragments for EQAA
2574 
2575     UINT_32             pipeBankXor;     ///< Combined swizzle used to do bank/pipe rotation
2576     UINT_32             pitchInElement;  ///< Pitch in elements (blocks for compressed formats)
2577 } ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT;
2578 
2579 /**
2580 ****************************************************************************************************
2581 *   ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
2582 *
2583 *   @brief
2584 *       Output structure for Addr2ComputeSurfaceAddrFromCoord
2585 ****************************************************************************************************
2586 */
2587 typedef struct _ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT
2588 {
2589     UINT_32    size;             ///< Size of this structure in bytes
2590 
2591     UINT_64    addr;             ///< Byte address
2592     UINT_32    bitPosition;      ///< Bit position within surfaceAddr, 0-7.
2593                                  ///  For surface bpp < 8, e.g. FMT_1.
2594     UINT_32    prtBlockIndex;    ///< Index of a PRT tile (64K block)
2595 } ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT;
2596 
2597 /**
2598 ****************************************************************************************************
2599 *   Addr2ComputeSurfaceAddrFromCoord
2600 *
2601 *   @brief
2602 *       Compute surface address from a given coordinate.
2603 ****************************************************************************************************
2604 */
2605 ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceAddrFromCoord(
2606     ADDR_HANDLE                                         hLib,
2607     const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT*    pIn,
2608     ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT*         pOut);
2609 
2610 
2611 
2612 /**
2613 ****************************************************************************************************
2614 *   ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT
2615 *
2616 *   @brief
2617 *       Input structure for Addr2ComputeSurfaceCoordFromAddr
2618 ****************************************************************************************************
2619 */
2620 typedef struct _ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT
2621 {
2622     UINT_32             size;            ///< Size of this structure in bytes
2623 
2624     UINT_64             addr;            ///< Address in bytes
2625     UINT_32             bitPosition;     ///< Bit position in addr. 0-7. for surface bpp < 8,
2626                                          ///  e.g. FMT_1;
2627 
2628     AddrSwizzleMode     swizzleMode;     ///< Swizzle mode for Gfx9
2629     ADDR2_SURFACE_FLAGS flags;           ///< Surface flags
2630     AddrResourceType    resourceType;    ///< Surface type
2631     UINT_32             bpp;             ///< Bits per pixel
2632     UINT_32             unalignedWidth;  ///< Surface original width (of mip0)
2633     UINT_32             unalignedHeight; ///< Surface original height (of mip0)
2634     UINT_32             numSlices;       ///< Surface original slices (of mip0)
2635     UINT_32             numMipLevels;    ///< Total mipmap levels.
2636     UINT_32             numSamples;      ///< Number of samples
2637     UINT_32             numFrags;        ///< Number of fragments, leave it zero or the same as
2638                                          ///  number of samples for normal AA; Set it to the
2639                                          ///  number of fragments for EQAA
2640 
2641     UINT_32             pipeBankXor;     ///< Combined swizzle used to do bank/pipe rotation
2642     UINT_32             pitchInElement;  ///< Pitch in elements (blocks for compressed formats)
2643 } ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT;
2644 
2645 /**
2646 ****************************************************************************************************
2647 *   ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
2648 *
2649 *   @brief
2650 *       Output structure for Addr2ComputeSurfaceCoordFromAddr
2651 ****************************************************************************************************
2652 */
2653 typedef struct _ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT
2654 {
2655     UINT_32    size;       ///< Size of this structure in bytes
2656 
2657     UINT_32    x;          ///< X coordinate
2658     UINT_32    y;          ///< Y coordinate
2659     UINT_32    slice;      ///< Index of slices
2660     UINT_32    sample;     ///< Index of samples, means fragment index for EQAA
2661     UINT_32    mipId;      ///< mipmap level id
2662 } ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT;
2663 
2664 /**
2665 ****************************************************************************************************
2666 *   Addr2ComputeSurfaceCoordFromAddr
2667 *
2668 *   @brief
2669 *       Compute coordinate from a given surface address
2670 ****************************************************************************************************
2671 */
2672 ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceCoordFromAddr(
2673     ADDR_HANDLE                                         hLib,
2674     const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT*    pIn,
2675     ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT*         pOut);
2676 
2677 
2678 
2679 ////////////////////////////////////////////////////////////////////////////////////////////////////
2680 //                                   HTile functions for Gfx9
2681 ////////////////////////////////////////////////////////////////////////////////////////////////////
2682 
2683 /**
2684 ****************************************************************************************************
2685 *   ADDR2_META_FLAGS
2686 *
2687 *   @brief
2688 *       Metadata flags
2689 ****************************************************************************************************
2690 */
2691 typedef union _ADDR2_META_FLAGS
2692 {
2693     struct
2694     {
2695         UINT_32 pipeAligned :  1;    ///< if Metadata being pipe aligned
2696         UINT_32 rbAligned   :  1;    ///< if Metadata being RB aligned
2697         UINT_32 linear      :  1;    ///< if Metadata linear, GFX9 does not suppord this!
2698         UINT_32 reserved    : 29;    ///< Reserved bits
2699     };
2700 
2701     UINT_32 value;
2702 } ADDR2_META_FLAGS;
2703 
2704 /**
2705 ****************************************************************************************************
2706 *   ADDR2_META_MIP_INFO
2707 *
2708 *   @brief
2709 *       Structure to store per mip metadata information
2710 ****************************************************************************************************
2711 */
2712 typedef struct _ADDR2_META_MIP_INFO
2713 {
2714     BOOL_32    inMiptail;
2715     union
2716     {
2717         struct
2718         {
2719             UINT_32    startX;
2720             UINT_32    startY;
2721             UINT_32    startZ;
2722             UINT_32    width;
2723             UINT_32    height;
2724             UINT_32    depth;
2725         };
2726 
2727         struct
2728         {
2729             UINT_32    offset;      ///< Metadata offset within one slice,
2730                                     ///  the thickness of a slice is meta block depth.
2731             UINT_32    sliceSize;   ///< Metadata size within one slice,
2732                                     ///  the thickness of a slice is meta block depth.
2733         };
2734     };
2735 } ADDR2_META_MIP_INFO;
2736 
2737 /**
2738 ****************************************************************************************************
2739 *   ADDR2_COMPUTE_HTILE_INFO_INPUT
2740 *
2741 *   @brief
2742 *       Input structure of Addr2ComputeHtileInfo
2743 ****************************************************************************************************
2744 */
2745 typedef struct _ADDR2_COMPUTE_HTILE_INFO_INPUT
2746 {
2747     UINT_32             size;               ///< Size of this structure in bytes
2748 
2749     ADDR2_META_FLAGS    hTileFlags;         ///< HTILE flags
2750     ADDR2_SURFACE_FLAGS depthFlags;         ///< Depth surface flags
2751     AddrSwizzleMode     swizzleMode;        ///< Depth surface swizzle mode
2752     UINT_32             unalignedWidth;     ///< Depth surface original width (of mip0)
2753     UINT_32             unalignedHeight;    ///< Depth surface original height (of mip0)
2754     UINT_32             numSlices;          ///< Number of slices of depth surface (of mip0)
2755     UINT_32             numMipLevels;       ///< Total mipmap levels of color surface
2756     UINT_32             firstMipIdInTail;   ///  Id of the first mip in tail,
2757                                             ///  if no mip is in tail, it should be set to
2758                                             ///  number of mip levels
2759 } ADDR2_COMPUTE_HTILE_INFO_INPUT;
2760 
2761 /**
2762 ****************************************************************************************************
2763 *   ADDR2_COMPUTE_HTILE_INFO_OUTPUT
2764 *
2765 *   @brief
2766 *       Output structure of Addr2ComputeHtileInfo
2767 ****************************************************************************************************
2768 */
2769 typedef struct _ADDR2_COMPUTE_HTILE_INFO_OUTPUT
2770 {
2771     UINT_32    size;                ///< Size of this structure in bytes
2772 
2773     UINT_32    pitch;               ///< Pitch in pixels of depth buffer represented in this
2774                                     ///  HTile buffer. This might be larger than original depth
2775                                     ///  buffer pitch when called with an unaligned pitch.
2776     UINT_32    height;              ///< Height in pixels, as above
2777     UINT_32    baseAlign;           ///< Base alignment
2778     UINT_32    sliceSize;           ///< Slice size, in bytes.
2779     UINT_32    htileBytes;          ///< Size of HTILE buffer, in bytes
2780     UINT_32    metaBlkWidth;        ///< Meta block width
2781     UINT_32    metaBlkHeight;       ///< Meta block height
2782     UINT_32    metaBlkNumPerSlice;  ///< Number of metablock within one slice
2783 
2784     ADDR2_META_MIP_INFO* pMipInfo;  ///< HTILE mip information
2785 } ADDR2_COMPUTE_HTILE_INFO_OUTPUT;
2786 
2787 /**
2788 ****************************************************************************************************
2789 *   Addr2ComputeHtileInfo
2790 *
2791 *   @brief
2792 *       Compute Htile pitch, height, base alignment and size in bytes
2793 ****************************************************************************************************
2794 */
2795 ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileInfo(
2796     ADDR_HANDLE                              hLib,
2797     const ADDR2_COMPUTE_HTILE_INFO_INPUT*    pIn,
2798     ADDR2_COMPUTE_HTILE_INFO_OUTPUT*         pOut);
2799 
2800 
2801 
2802 /**
2803 ****************************************************************************************************
2804 *   ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
2805 *
2806 *   @brief
2807 *       Input structure for Addr2ComputeHtileAddrFromCoord
2808 ****************************************************************************************************
2809 */
2810 typedef struct _ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
2811 {
2812     UINT_32             size;                ///< Size of this structure in bytes
2813 
2814     UINT_32             x;                   ///< X coordinate
2815     UINT_32             y;                   ///< Y coordinate
2816     UINT_32             slice;               ///< Index of slices
2817     UINT_32             mipId;               ///< mipmap level id
2818 
2819     ADDR2_META_FLAGS    hTileFlags;          ///< HTILE flags
2820     ADDR2_SURFACE_FLAGS depthflags;          ///< Depth surface flags
2821     AddrSwizzleMode     swizzleMode;         ///< Depth surface swizzle mode
2822     UINT_32             bpp;                 ///< Depth surface bits per pixel
2823     UINT_32             unalignedWidth;      ///< Depth surface original width (of mip0)
2824     UINT_32             unalignedHeight;     ///< Depth surface original height (of mip0)
2825     UINT_32             numSlices;           ///< Depth surface original depth (of mip0)
2826     UINT_32             numMipLevels;        ///< Depth surface total mipmap levels
2827     UINT_32             numSamples;          ///< Depth surface number of samples
2828     UINT_32             pipeXor;             ///< Pipe xor setting
2829 } ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT;
2830 
2831 /**
2832 ****************************************************************************************************
2833 *   ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
2834 *
2835 *   @brief
2836 *       Output structure for Addr2ComputeHtileAddrFromCoord
2837 ****************************************************************************************************
2838 */
2839 typedef struct _ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT
2840 {
2841     UINT_32    size;    ///< Size of this structure in bytes
2842 
2843     UINT_64    addr;    ///< Address in bytes
2844 } ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT;
2845 
2846 /**
2847 ****************************************************************************************************
2848 *   Addr2ComputeHtileAddrFromCoord
2849 *
2850 *   @brief
2851 *       Compute Htile address according to coordinates (of depth buffer)
2852 ****************************************************************************************************
2853 */
2854 ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileAddrFromCoord(
2855     ADDR_HANDLE                                       hLib,
2856     const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT*    pIn,
2857     ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT*         pOut);
2858 
2859 
2860 
2861 /**
2862 ****************************************************************************************************
2863 *   ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT
2864 *
2865 *   @brief
2866 *       Input structure for Addr2ComputeHtileCoordFromAddr
2867 ****************************************************************************************************
2868 */
2869 typedef struct _ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT
2870 {
2871     UINT_32             size;                ///< Size of this structure in bytes
2872 
2873     UINT_64             addr;                ///< Address
2874 
2875     ADDR2_META_FLAGS    hTileFlags;          ///< HTILE flags
2876     ADDR2_SURFACE_FLAGS depthFlags;          ///< Depth surface flags
2877     AddrSwizzleMode     swizzleMode;         ///< Depth surface swizzle mode
2878     UINT_32             bpp;                 ///< Depth surface bits per pixel
2879     UINT_32             unalignedWidth;      ///< Depth surface original width (of mip0)
2880     UINT_32             unalignedHeight;     ///< Depth surface original height (of mip0)
2881     UINT_32             numSlices;           ///< Depth surface original depth (of mip0)
2882     UINT_32             numMipLevels;        ///< Depth surface total mipmap levels
2883     UINT_32             numSamples;          ///< Depth surface number of samples
2884     UINT_32             pipeXor;             ///< Pipe xor setting
2885 } ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT;
2886 
2887 /**
2888 ****************************************************************************************************
2889 *   ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
2890 *
2891 *   @brief
2892 *       Output structure for Addr2ComputeHtileCoordFromAddr
2893 ****************************************************************************************************
2894 */
2895 typedef struct _ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT
2896 {
2897     UINT_32    size;        ///< Size of this structure in bytes
2898 
2899     UINT_32    x;           ///< X coordinate
2900     UINT_32    y;           ///< Y coordinate
2901     UINT_32    slice;       ///< Index of slices
2902     UINT_32    mipId;       ///< mipmap level id
2903 } ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT;
2904 
2905 /**
2906 ****************************************************************************************************
2907 *   Addr2ComputeHtileCoordFromAddr
2908 *
2909 *   @brief
2910 *       Compute coordinates within depth buffer (1st pixel of a micro tile) according to
2911 *       Htile address
2912 ****************************************************************************************************
2913 */
2914 ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileCoordFromAddr(
2915     ADDR_HANDLE                                       hLib,
2916     const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT*    pIn,
2917     ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT*         pOut);
2918 
2919 
2920 
2921 ////////////////////////////////////////////////////////////////////////////////////////////////////
2922 //                                     C-mask functions for Gfx9
2923 ////////////////////////////////////////////////////////////////////////////////////////////////////
2924 
2925 /**
2926 ****************************************************************************************************
2927 *   ADDR2_COMPUTE_CMASK_INFO_INPUT
2928 *
2929 *   @brief
2930 *       Input structure of Addr2ComputeCmaskInfo
2931 ****************************************************************************************************
2932 */
2933 typedef struct _ADDR2_COMPUTE_CMASKINFO_INPUT
2934 {
2935     UINT_32             size;               ///< Size of this structure in bytes
2936 
2937     ADDR2_META_FLAGS    cMaskFlags;         ///< CMASK flags
2938     AddrResourceType    resourceType;       ///< Color surface type
2939     AddrSwizzleMode     swizzleMode;        ///< FMask surface swizzle mode
2940     UINT_32             unalignedWidth;     ///< Color surface original width
2941     UINT_32             unalignedHeight;    ///< Color surface original height
2942     UINT_32             numSlices;          ///< Number of slices of color buffer
2943     UINT_32             numMipLevels;       ///< Number of mip levels
2944     UINT_32             firstMipIdInTail;   ///< The id of first mip in tail, if no mip is in tail,
2945                                             ///  it should be number of mip levels
2946 } ADDR2_COMPUTE_CMASK_INFO_INPUT;
2947 
2948 /**
2949 ****************************************************************************************************
2950 *   ADDR2_COMPUTE_CMASK_INFO_OUTPUT
2951 *
2952 *   @brief
2953 *       Output structure of Addr2ComputeCmaskInfo
2954 ****************************************************************************************************
2955 */
2956 typedef struct _ADDR2_COMPUTE_CMASK_INFO_OUTPUT
2957 {
2958     UINT_32    size;          ///< Size of this structure in bytes
2959 
2960     UINT_32    pitch;         ///< Pitch in pixels of color buffer which
2961                               ///  this Cmask matches. The size might be larger than
2962                               ///  original color buffer pitch when called with
2963                               ///  an unaligned pitch.
2964     UINT_32    height;        ///< Height in pixels, as above
2965     UINT_32    baseAlign;     ///< Base alignment
2966     UINT_32    sliceSize;     ///< Slice size, in bytes.
2967     UINT_32    cmaskBytes;    ///< Size in bytes of CMask buffer
2968     UINT_32    metaBlkWidth;  ///< Meta block width
2969     UINT_32    metaBlkHeight; ///< Meta block height
2970 
2971     UINT_32    metaBlkNumPerSlice;  ///< Number of metablock within one slice
2972 
2973     ADDR2_META_MIP_INFO* pMipInfo;  ///< CMASK mip information
2974 } ADDR2_COMPUTE_CMASK_INFO_OUTPUT;
2975 
2976 /**
2977 ****************************************************************************************************
2978 *   Addr2ComputeCmaskInfo
2979 *
2980 *   @brief
2981 *       Compute Cmask pitch, height, base alignment and size in bytes from color buffer
2982 *       info
2983 ****************************************************************************************************
2984 */
2985 ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskInfo(
2986     ADDR_HANDLE                              hLib,
2987     const ADDR2_COMPUTE_CMASK_INFO_INPUT*    pIn,
2988     ADDR2_COMPUTE_CMASK_INFO_OUTPUT*         pOut);
2989 
2990 
2991 
2992 /**
2993 ****************************************************************************************************
2994 *   ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
2995 *
2996 *   @brief
2997 *       Input structure for Addr2ComputeCmaskAddrFromCoord
2998 *
2999 ****************************************************************************************************
3000 */
3001 typedef struct _ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
3002 {
3003     UINT_32             size;                ///< Size of this structure in bytes
3004 
3005     UINT_32             x;                   ///< X coordinate
3006     UINT_32             y;                   ///< Y coordinate
3007     UINT_32             slice;               ///< Index of slices
3008 
3009     ADDR2_META_FLAGS    cMaskFlags;          ///< CMASK flags
3010     AddrResourceType    resourceType;        ///< Color surface type
3011     AddrSwizzleMode     swizzleMode;         ///< FMask surface swizzle mode
3012 
3013     UINT_32             unalignedWidth;      ///< Color surface original width (of mip0)
3014     UINT_32             unalignedHeight;     ///< Color surface original height (of mip0)
3015     UINT_32             numSlices;           ///< Color surface original slices (of mip0)
3016 
3017     UINT_32             numSamples;          ///< Color surfae sample number
3018     UINT_32             numFrags;            ///< Color surface fragment number
3019 
3020     UINT_32             pipeXor;             ///< pipe Xor setting
3021 } ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT;
3022 
3023 /**
3024 ****************************************************************************************************
3025 *   ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
3026 *
3027 *   @brief
3028 *       Output structure for Addr2ComputeCmaskAddrFromCoord
3029 ****************************************************************************************************
3030 */
3031 typedef struct _ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT
3032 {
3033     UINT_32    size;           ///< Size of this structure in bytes
3034 
3035     UINT_64    addr;           ///< CMASK address in bytes
3036     UINT_32    bitPosition;    ///< Bit position within addr, 0 or 4
3037 } ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT;
3038 
3039 /**
3040 ****************************************************************************************************
3041 *   Addr2ComputeCmaskAddrFromCoord
3042 *
3043 *   @brief
3044 *       Compute Cmask address according to coordinates (of MSAA color buffer)
3045 ****************************************************************************************************
3046 */
3047 ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskAddrFromCoord(
3048     ADDR_HANDLE                                      hLib,
3049     const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT*   pIn,
3050     ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT*        pOut);
3051 
3052 
3053 
3054 /**
3055 ****************************************************************************************************
3056 *   ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT
3057 *
3058 *   @brief
3059 *       Input structure for Addr2ComputeCmaskCoordFromAddr
3060 ****************************************************************************************************
3061 */
3062 typedef struct _ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT
3063 {
3064     UINT_32             size;                ///< Size of this structure in bytes
3065 
3066     UINT_64             addr;                ///< CMASK address in bytes
3067     UINT_32             bitPosition;         ///< Bit position within addr, 0 or 4
3068 
3069     ADDR2_META_FLAGS    cMaskFlags;          ///< CMASK flags
3070     AddrResourceType    resourceType;        ///< Color surface type
3071     AddrSwizzleMode     swizzleMode;         ///< FMask surface swizzle mode
3072 
3073     UINT_32             unalignedWidth;      ///< Color surface original width (of mip0)
3074     UINT_32             unalignedHeight;     ///< Color surface original height (of mip0)
3075     UINT_32             numSlices;           ///< Color surface original slices (of mip0)
3076     UINT_32             numMipLevels;        ///< Color surface total mipmap levels.
3077 } ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT;
3078 
3079 /**
3080 ****************************************************************************************************
3081 *   ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
3082 *
3083 *   @brief
3084 *       Output structure for Addr2ComputeCmaskCoordFromAddr
3085 ****************************************************************************************************
3086 */
3087 typedef struct _ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT
3088 {
3089     UINT_32    size;        ///< Size of this structure in bytes
3090 
3091     UINT_32    x;           ///< X coordinate
3092     UINT_32    y;           ///< Y coordinate
3093     UINT_32    slice;       ///< Index of slices
3094     UINT_32    mipId;       ///< mipmap level id
3095 } ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT;
3096 
3097 /**
3098 ****************************************************************************************************
3099 *   Addr2ComputeCmaskCoordFromAddr
3100 *
3101 *   @brief
3102 *       Compute coordinates within color buffer (1st pixel of a micro tile) according to
3103 *       Cmask address
3104 ****************************************************************************************************
3105 */
3106 ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskCoordFromAddr(
3107     ADDR_HANDLE                                       hLib,
3108     const ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT*    pIn,
3109     ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT*         pOut);
3110 
3111 
3112 
3113 ////////////////////////////////////////////////////////////////////////////////////////////////////
3114 //                                     F-mask functions for Gfx9
3115 ////////////////////////////////////////////////////////////////////////////////////////////////////
3116 
3117 /**
3118 ****************************************************************************************************
3119 *   ADDR2_FMASK_FLAGS
3120 *
3121 *   @brief
3122 *       FMASK flags
3123 ****************************************************************************************************
3124 */
3125 typedef union _ADDR2_FMASK_FLAGS
3126 {
3127     struct
3128     {
3129         UINT_32 resolved :  1;    ///< TRUE if this is a resolved fmask, used by H/W clients
3130                                   ///  by H/W clients. S/W should always set it to FALSE.
3131         UINT_32 reserved : 31;    ///< Reserved for future use.
3132     };
3133 
3134     UINT_32 value;
3135 } ADDR2_FMASK_FLAGS;
3136 
3137 /**
3138 ****************************************************************************************************
3139 *   ADDR2_COMPUTE_FMASK_INFO_INPUT
3140 *
3141 *   @brief
3142 *       Input structure for Addr2ComputeFmaskInfo
3143 ****************************************************************************************************
3144 */
3145 typedef struct _ADDR2_COMPUTE_FMASK_INFO_INPUT
3146 {
3147     UINT_32             size;               ///< Size of this structure in bytes
3148 
3149     AddrSwizzleMode     swizzleMode;        ///< FMask surface swizzle mode
3150     UINT_32             unalignedWidth;     ///< Color surface original width
3151     UINT_32             unalignedHeight;    ///< Color surface original height
3152     UINT_32             numSlices;          ///< Number of slices/depth
3153     UINT_32             numSamples;         ///< Number of samples
3154     UINT_32             numFrags;           ///< Number of fragments, leave it zero or the same as
3155                                             ///  number of samples for normal AA; Set it to the
3156                                             ///  number of fragments for EQAA
3157     ADDR2_FMASK_FLAGS   fMaskFlags;         ///< FMASK flags
3158 } ADDR2_COMPUTE_FMASK_INFO_INPUT;
3159 
3160 /**
3161 ****************************************************************************************************
3162 *   ADDR2_COMPUTE_FMASK_INFO_OUTPUT
3163 *
3164 *   @brief
3165 *       Output structure for Addr2ComputeFmaskInfo
3166 ****************************************************************************************************
3167 */
3168 typedef struct _ADDR2_COMPUTE_FMASK_INFO_OUTPUT
3169 {
3170     UINT_32    size;           ///< Size of this structure in bytes
3171 
3172     UINT_32    pitch;          ///< Pitch of fmask in pixels
3173     UINT_32    height;         ///< Height of fmask in pixels
3174     UINT_32    baseAlign;      ///< Base alignment
3175     UINT_32    numSlices;      ///< Slices of fmask
3176     UINT_32    fmaskBytes;     ///< Size of fmask in bytes
3177     UINT_32    bpp;            ///< Bits per pixel of FMASK is: number of bit planes
3178     UINT_32    numSamples;     ///< Number of samples
3179     UINT_32    sliceSize;      ///< Size of slice in bytes
3180 } ADDR2_COMPUTE_FMASK_INFO_OUTPUT;
3181 
3182 /**
3183 ****************************************************************************************************
3184 *   Addr2ComputeFmaskInfo
3185 *
3186 *   @brief
3187 *       Compute Fmask pitch/height/slices/alignments and size in bytes
3188 ****************************************************************************************************
3189 */
3190 ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskInfo(
3191     ADDR_HANDLE                              hLib,
3192     const ADDR2_COMPUTE_FMASK_INFO_INPUT*    pIn,
3193     ADDR2_COMPUTE_FMASK_INFO_OUTPUT*         pOut);
3194 
3195 
3196 
3197 /**
3198 ****************************************************************************************************
3199 *   ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
3200 *
3201 *   @brief
3202 *       Input structure for Addr2ComputeFmaskAddrFromCoord
3203 ****************************************************************************************************
3204 */
3205 typedef struct _ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
3206 {
3207     UINT_32            size;               ///< Size of this structure in bytes
3208 
3209     AddrSwizzleMode    swizzleMode;        ///< FMask surface swizzle mode
3210     UINT_32            x;                  ///< X coordinate
3211     UINT_32            y;                  ///< Y coordinate
3212     UINT_32            slice;              ///< Slice index
3213     UINT_32            sample;             ///< Sample index (fragment index for EQAA)
3214     UINT_32            plane;              ///< Plane number
3215 
3216     UINT_32            unalignedWidth;     ///< Color surface original width
3217     UINT_32            unalignedHeight;    ///< Color surface original height
3218     UINT_32            numSamples;         ///< Number of samples
3219     UINT_32            numFrags;           ///< Number of fragments, leave it zero or the same as
3220                                            ///  number of samples for normal AA; Set it to the
3221                                            ///  number of fragments for EQAA
3222     UINT_32            tileSwizzle;        ///< Combined swizzle used to do bank/pipe rotation
3223 
3224     ADDR2_FMASK_FLAGS  fMaskFlags; ///< FMASK flags
3225 } ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT;
3226 
3227 /**
3228 ****************************************************************************************************
3229 *   ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
3230 *
3231 *   @brief
3232 *       Output structure for Addr2ComputeFmaskAddrFromCoord
3233 ****************************************************************************************************
3234 */
3235 typedef struct _ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT
3236 {
3237     UINT_32    size;           ///< Size of this structure in bytes
3238 
3239     UINT_64    addr;           ///< Fmask address
3240     UINT_32    bitPosition;    ///< Bit position within fmaskAddr, 0-7.
3241 } ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT;
3242 
3243 /**
3244 ****************************************************************************************************
3245 *   Addr2ComputeFmaskAddrFromCoord
3246 *
3247 *   @brief
3248 *       Compute Fmask address according to coordinates (x,y,slice,sample,plane)
3249 ****************************************************************************************************
3250 */
3251 ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskAddrFromCoord(
3252     ADDR_HANDLE                                       hLib,
3253     const ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT*    pIn,
3254     ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT*         pOut);
3255 
3256 
3257 
3258 /**
3259 ****************************************************************************************************
3260 *   ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT
3261 *
3262 *   @brief
3263 *       Input structure for Addr2ComputeFmaskCoordFromAddr
3264 ****************************************************************************************************
3265 */
3266 typedef struct _ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT
3267 {
3268     UINT_32            size;               ///< Size of this structure in bytes
3269 
3270     UINT_64            addr;               ///< Address
3271     UINT_32            bitPosition;        ///< Bit position within addr, 0-7.
3272     AddrSwizzleMode    swizzleMode;        ///< FMask surface swizzle mode
3273 
3274     UINT_32            unalignedWidth;     ///< Color surface original width
3275     UINT_32            unalignedHeight;    ///< Color surface original height
3276     UINT_32            numSamples;         ///< Number of samples
3277     UINT_32            numFrags;           ///< Number of fragments
3278 
3279     UINT_32            tileSwizzle;        ///< Combined swizzle used to do bank/pipe rotation
3280 
3281     ADDR2_FMASK_FLAGS  fMaskFlags; ///< FMASK flags
3282 } ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT;
3283 
3284 /**
3285 ****************************************************************************************************
3286 *   ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
3287 *
3288 *   @brief
3289 *       Output structure for Addr2ComputeFmaskCoordFromAddr
3290 ****************************************************************************************************
3291 */
3292 typedef struct _ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT
3293 {
3294     UINT_32    size;      ///< Size of this structure in bytes
3295 
3296     UINT_32    x;         ///< X coordinate
3297     UINT_32    y;         ///< Y coordinate
3298     UINT_32    slice;     ///< Slice index
3299     UINT_32    sample;    ///< Sample index (fragment index for EQAA)
3300     UINT_32    plane;     ///< Plane number
3301 } ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT;
3302 
3303 /**
3304 ****************************************************************************************************
3305 *   Addr2ComputeFmaskCoordFromAddr
3306 *
3307 *   @brief
3308 *       Compute FMASK coordinate from an given address
3309 ****************************************************************************************************
3310 */
3311 ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskCoordFromAddr(
3312     ADDR_HANDLE                                       hLib,
3313     const ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT*    pIn,
3314     ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT*         pOut);
3315 
3316 
3317 
3318 ////////////////////////////////////////////////////////////////////////////////////////////////////
3319 //                                     DCC key functions for Gfx9
3320 ////////////////////////////////////////////////////////////////////////////////////////////////////
3321 
3322 /**
3323 ****************************************************************************************************
3324 *   _ADDR2_COMPUTE_DCCINFO_INPUT
3325 *
3326 *   @brief
3327 *       Input structure of Addr2ComputeDccInfo
3328 ****************************************************************************************************
3329 */
3330 typedef struct _ADDR2_COMPUTE_DCCINFO_INPUT
3331 {
3332     UINT_32             size;               ///< Size of this structure in bytes
3333 
3334     ADDR2_META_FLAGS    dccKeyFlags;        ///< DCC key flags
3335     AddrResourceType    resourceType;       ///< Color surface type
3336     AddrSwizzleMode     swizzleMode;        ///< Color surface swizzle mode
3337     UINT_32             bpp;                ///< bits per pixel
3338     UINT_32             unalignedWidth;     ///< Color surface original width (of mip0)
3339     UINT_32             unalignedHeight;    ///< Color surface original height (of mip0)
3340     UINT_32             numSlices;          ///< Number of slices, of color surface (of mip0)
3341     UINT_32             numFrags;           ///< Fragment number of color surface
3342     UINT_32             numMipLevels;       ///< Total mipmap levels of color surface
3343     UINT_32             dataSurfaceSize;    ///< The padded size of all slices and mip levels
3344                                             ///< useful in meta linear case
3345     UINT_32             firstMipIdInTail;   ///< The id of first mip in tail, if no mip is in tail,
3346                                             ///  it should be number of mip levels
3347 } ADDR2_COMPUTE_DCCINFO_INPUT;
3348 
3349 /**
3350 ****************************************************************************************************
3351 *   ADDR2_COMPUTE_DCCINFO_OUTPUT
3352 *
3353 *   @brief
3354 *       Output structure of Addr2ComputeDccInfo
3355 ****************************************************************************************************
3356 */
3357 typedef struct _ADDR2_COMPUTE_DCCINFO_OUTPUT
3358 {
3359     UINT_32    size;               ///< Size of this structure in bytes
3360 
3361     UINT_32    dccRamBaseAlign;    ///< Base alignment of dcc key
3362     UINT_32    dccRamSize;         ///< Size of dcc key
3363 
3364     UINT_32    pitch;              ///< DCC surface mip chain pitch
3365     UINT_32    height;             ///< DCC surface mip chain height
3366     UINT_32    depth;              ///< DCC surface mip chain depth
3367 
3368     UINT_32    compressBlkWidth;   ///< DCC compress block width
3369     UINT_32    compressBlkHeight;  ///< DCC compress block height
3370     UINT_32    compressBlkDepth;   ///< DCC compress block depth
3371 
3372     UINT_32    metaBlkWidth;       ///< DCC meta block width
3373     UINT_32    metaBlkHeight;      ///< DCC meta block height
3374     UINT_32    metaBlkDepth;       ///< DCC meta block depth
3375     UINT_32    metaBlkSize;        ///< DCC meta block size in bytes
3376     UINT_32    metaBlkNumPerSlice; ///< Number of metablock within one slice
3377 
3378     union
3379     {
3380         UINT_32 fastClearSizePerSlice;  ///< Size of DCC within a slice should be fast cleared
3381         UINT_32 dccRamSliceSize;        ///< DCC ram size per slice. For mipmap, it's
3382                                         ///  the slize size of a mip chain, the thickness of a
3383                                         ///  a slice is meta block depth
3384     };
3385 
3386     ADDR2_META_MIP_INFO* pMipInfo;      ///< DCC mip information
3387 } ADDR2_COMPUTE_DCCINFO_OUTPUT;
3388 
3389 /**
3390 ****************************************************************************************************
3391 *   Addr2ComputeDccInfo
3392 *
3393 *   @brief
3394 *       Compute DCC key size, base alignment
3395 *       info
3396 ****************************************************************************************************
3397 */
3398 ADDR_E_RETURNCODE ADDR_API Addr2ComputeDccInfo(
3399     ADDR_HANDLE                           hLib,
3400     const ADDR2_COMPUTE_DCCINFO_INPUT*    pIn,
3401     ADDR2_COMPUTE_DCCINFO_OUTPUT*         pOut);
3402 
3403 
3404 /**
3405 ****************************************************************************************************
3406 *   ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
3407 *
3408 *   @brief
3409 *       Input structure for Addr2ComputeDccAddrFromCoord
3410 *
3411 ****************************************************************************************************
3412 */
3413 typedef struct _ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
3414 {
3415     UINT_32             size;                ///< Size of this structure in bytes
3416 
3417     UINT_32             x;                   ///< X coordinate
3418     UINT_32             y;                   ///< Y coordinate
3419     UINT_32             slice;               ///< Index of slices
3420     UINT_32             sample;              ///< Index of samples, means fragment index for EQAA
3421     UINT_32             mipId;               ///< mipmap level id
3422 
3423     ADDR2_META_FLAGS    dccKeyFlags;         ///< DCC flags
3424     AddrResourceType    resourceType;        ///< Color surface type
3425     AddrSwizzleMode     swizzleMode;         ///< Color surface swizzle mode
3426     UINT_32             bpp;                 ///< Color surface bits per pixel
3427     UINT_32             numSlices;           ///< Color surface original slices (of mip0)
3428     UINT_32             numMipLevels;        ///< Color surface mipmap levels
3429     UINT_32             numFrags;            ///< Color surface fragment number
3430 
3431     UINT_32             pipeXor;             ///< pipe Xor setting
3432     UINT_32             pitch;               ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::pitch
3433     UINT_32             height;              ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::height
3434     UINT_32             compressBlkWidth;    ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::compressBlkWidth
3435     UINT_32             compressBlkHeight;   ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::compressBlkHeight
3436     UINT_32             compressBlkDepth;    ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::compressBlkDepth
3437     UINT_32             metaBlkWidth;        ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::metaBlkWidth
3438     UINT_32             metaBlkHeight;       ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::metaBlkHeight
3439     UINT_32             metaBlkDepth;        ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::metaBlkDepth
3440     UINT_32             dccRamSliceSize;     ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::dccRamSliceSize
3441 } ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT;
3442 
3443 /**
3444 ****************************************************************************************************
3445 *   ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT
3446 *
3447 *   @brief
3448 *       Output structure for Addr2ComputeDccAddrFromCoord
3449 ****************************************************************************************************
3450 */
3451 typedef struct _ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT
3452 {
3453     UINT_32    size;           ///< Size of this structure in bytes
3454 
3455     UINT_64    addr;           ///< DCC address in bytes
3456 } ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT;
3457 
3458 /**
3459 ****************************************************************************************************
3460 *   Addr2ComputeDccAddrFromCoord
3461 *
3462 *   @brief
3463 *       Compute DCC address according to coordinates (of MSAA color buffer)
3464 ****************************************************************************************************
3465 */
3466 ADDR_E_RETURNCODE ADDR_API Addr2ComputeDccAddrFromCoord(
3467     ADDR_HANDLE                                    hLib,
3468     const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT*   pIn,
3469     ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT*        pOut);
3470 
3471 ////////////////////////////////////////////////////////////////////////////////////////////////////
3472 //                                     Misc functions for Gfx9
3473 ////////////////////////////////////////////////////////////////////////////////////////////////////
3474 
3475 /**
3476 ****************************************************************************************************
3477 *   ADDR2_COMPUTE_PIPEBANKXOR_INPUT
3478 *
3479 *   @brief
3480 *       Input structure of Addr2ComputePipebankXor
3481 ****************************************************************************************************
3482 */
3483 typedef struct _ADDR2_COMPUTE_PIPEBANKXOR_INPUT
3484 {
3485     UINT_32             size;               ///< Size of this structure in bytes
3486     UINT_32             surfIndex;          ///< Input surface index
3487     ADDR2_SURFACE_FLAGS flags;              ///< Surface flag
3488     AddrSwizzleMode     swizzleMode;        ///< Surface swizzle mode
3489     AddrResourceType    resourceType;       ///< Surface resource type
3490     AddrFormat          format;             ///< Surface format
3491     UINT_32             numSamples;         ///< Number of samples
3492     UINT_32             numFrags;           ///< Number of fragments, leave it zero or the same as
3493                                             ///  number of samples for normal AA; Set it to the
3494                                             ///  number of fragments for EQAA
3495 } ADDR2_COMPUTE_PIPEBANKXOR_INPUT;
3496 
3497 /**
3498 ****************************************************************************************************
3499 *   ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT
3500 *
3501 *   @brief
3502 *       Output structure of Addr2ComputePipebankXor
3503 ****************************************************************************************************
3504 */
3505 typedef struct _ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT
3506 {
3507     UINT_32             size;               ///< Size of this structure in bytes
3508     UINT_32             pipeBankXor;        ///< Pipe bank xor
3509 } ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT;
3510 
3511 /**
3512 ****************************************************************************************************
3513 *   Addr2ComputePipeBankXor
3514 *
3515 *   @brief
3516 *       Calculate a valid bank pipe xor value for client to use.
3517 ****************************************************************************************************
3518 */
3519 ADDR_E_RETURNCODE ADDR_API Addr2ComputePipeBankXor(
3520     ADDR_HANDLE                            hLib,
3521     const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn,
3522     ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT*      pOut);
3523 
3524 /**
3525 ****************************************************************************************************
3526 *   ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT
3527 *
3528 *   @brief
3529 *       Input structure of Addr2ComputeSlicePipeBankXor
3530 ****************************************************************************************************
3531 */
3532 typedef struct _ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT
3533 {
3534     UINT_32             size;               ///< Size of this structure in bytes
3535     AddrSwizzleMode     swizzleMode;        ///< Surface swizzle mode
3536     AddrResourceType    resourceType;       ///< Surface resource type
3537     UINT_32             bpe;                ///< bits per element (e.g. block size for BCn format)
3538     UINT_32             basePipeBankXor;    ///< Base pipe bank xor
3539     UINT_32             slice;              ///< Slice id
3540     UINT_32             numSamples;         ///< Number of samples
3541 } ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT;
3542 
3543 /**
3544 ****************************************************************************************************
3545 *   ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT
3546 *
3547 *   @brief
3548 *       Output structure of Addr2ComputeSlicePipeBankXor
3549 ****************************************************************************************************
3550 */
3551 typedef struct _ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT
3552 {
3553     UINT_32             size;               ///< Size of this structure in bytes
3554     UINT_32             pipeBankXor;        ///< Pipe bank xor
3555 } ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT;
3556 
3557 /**
3558 ****************************************************************************************************
3559 *   Addr2ComputeSlicePipeBankXor
3560 *
3561 *   @brief
3562 *       Calculate slice pipe bank xor value based on base pipe bank xor and slice id.
3563 ****************************************************************************************************
3564 */
3565 ADDR_E_RETURNCODE ADDR_API Addr2ComputeSlicePipeBankXor(
3566     ADDR_HANDLE                                  hLib,
3567     const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn,
3568     ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT*      pOut);
3569 
3570 /**
3571 ****************************************************************************************************
3572 *   ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT
3573 *
3574 *   @brief
3575 *       Input structure of Addr2ComputeSubResourceOffsetForSwizzlePattern
3576 ****************************************************************************************************
3577 */
3578 typedef struct _ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT
3579 {
3580     UINT_32             size;               ///< Size of this structure in bytes
3581     AddrSwizzleMode     swizzleMode;        ///< Surface swizzle mode
3582     AddrResourceType    resourceType;       ///< Surface resource type
3583     UINT_32             pipeBankXor;        ///< Per resource xor
3584     UINT_32             slice;              ///< Slice id
3585     UINT_64             sliceSize;          ///< Slice size of a mip chain
3586     UINT_64             macroBlockOffset;   ///< Macro block offset, returned in ADDR2_MIP_INFO
3587     UINT_32             mipTailOffset;      ///< Mip tail offset, returned in ADDR2_MIP_INFO
3588 } ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT;
3589 
3590 /**
3591 ****************************************************************************************************
3592 *   ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT
3593 *
3594 *   @brief
3595 *       Output structure of Addr2ComputeSubResourceOffsetForSwizzlePattern
3596 ****************************************************************************************************
3597 */
3598 typedef struct _ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT
3599 {
3600     UINT_32             size;               ///< Size of this structure in bytes
3601     UINT_64             offset;             ///< offset
3602 } ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT;
3603 
3604 /**
3605 ****************************************************************************************************
3606 *   Addr2ComputeSubResourceOffsetForSwizzlePattern
3607 *
3608 *   @brief
3609 *       Calculate sub resource offset to support swizzle pattern.
3610 ****************************************************************************************************
3611 */
3612 ADDR_E_RETURNCODE ADDR_API Addr2ComputeSubResourceOffsetForSwizzlePattern(
3613     ADDR_HANDLE                                                     hLib,
3614     const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
3615     ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT*      pOut);
3616 
3617 /**
3618 ****************************************************************************************************
3619 *   ADDR2_BLOCK_SET
3620 *
3621 *   @brief
3622 *       Bit field that defines block type
3623 ****************************************************************************************************
3624 */
3625 typedef union _ADDR2_BLOCK_SET
3626 {
3627     struct
3628     {
3629         UINT_32 micro          : 1;   // 256B block for 2D resource
3630         UINT_32 macroThin4KB   : 1;   // Thin 4KB for 2D/3D resource
3631         UINT_32 macroThick4KB  : 1;   // Thick 4KB for 3D resource
3632         UINT_32 macroThin64KB  : 1;   // Thin 64KB for 2D/3D resource
3633         UINT_32 macroThick64KB : 1;   // Thick 64KB for 3D resource
3634         UINT_32 var            : 1;   // VAR block
3635         UINT_32                : 1;
3636         UINT_32 linear         : 1;   // Linear block
3637         UINT_32 reserved       : 24;
3638     };
3639 
3640     UINT_32 value;
3641 } ADDR2_BLOCK_SET;
3642 
3643 /**
3644 ****************************************************************************************************
3645 *   ADDR2_SWTYPE_SET
3646 *
3647 *   @brief
3648 *       Bit field that defines swizzle type
3649 ****************************************************************************************************
3650 */
3651 typedef union _ADDR2_SWTYPE_SET
3652 {
3653     struct
3654     {
3655         UINT_32 sw_Z     : 1;   // SW_*_Z_*
3656         UINT_32 sw_S     : 1;   // SW_*_S_*
3657         UINT_32 sw_D     : 1;   // SW_*_D_*
3658         UINT_32 sw_R     : 1;   // SW_*_R_*
3659         UINT_32 reserved : 28;
3660     };
3661 
3662     UINT_32 value;
3663 } ADDR2_SWTYPE_SET;
3664 
3665 /**
3666 ****************************************************************************************************
3667 *   ADDR2_SWMODE_SET
3668 *
3669 *   @brief
3670 *       Bit field that defines swizzle type
3671 ****************************************************************************************************
3672 */
3673 typedef union _ADDR2_SWMODE_SET
3674 {
3675     struct
3676     {
3677         UINT_32 swLinear    : 1;
3678         UINT_32 sw256B_S    : 1;
3679         UINT_32 sw256B_D    : 1;
3680         UINT_32 sw256B_R    : 1;
3681         UINT_32 sw4KB_Z     : 1;
3682         UINT_32 sw4KB_S     : 1;
3683         UINT_32 sw4KB_D     : 1;
3684         UINT_32 sw4KB_R     : 1;
3685         UINT_32 sw64KB_Z    : 1;
3686         UINT_32 sw64KB_S    : 1;
3687         UINT_32 sw64KB_D    : 1;
3688         UINT_32 sw64KB_R    : 1;
3689         UINT_32 swMiscDef12 : 1;
3690         UINT_32 swMiscDef13 : 1;
3691         UINT_32 swMiscDef14 : 1;
3692         UINT_32 swMiscDef15 : 1;
3693         UINT_32 sw64KB_Z_T  : 1;
3694         UINT_32 sw64KB_S_T  : 1;
3695         UINT_32 sw64KB_D_T  : 1;
3696         UINT_32 sw64KB_R_T  : 1;
3697         UINT_32 sw4KB_Z_X   : 1;
3698         UINT_32 sw4KB_S_X   : 1;
3699         UINT_32 sw4KB_D_X   : 1;
3700         UINT_32 sw4KB_R_X   : 1;
3701         UINT_32 sw64KB_Z_X  : 1;
3702         UINT_32 sw64KB_S_X  : 1;
3703         UINT_32 sw64KB_D_X  : 1;
3704         UINT_32 sw64KB_R_X  : 1;
3705         UINT_32 swMiscDef28 : 1;
3706         UINT_32 swMiscDef29 : 1;
3707         UINT_32 swMiscDef30 : 1;
3708         UINT_32 swMiscDef31 : 1;
3709     };
3710 
3711     struct
3712     {
3713         UINT_32             : 28;
3714         UINT_32 swVar_Z_X   : 1;
3715         UINT_32             : 2;
3716         UINT_32 swVar_R_X   : 1;
3717     } gfx10;
3718 
3719     UINT_32 value;
3720 } ADDR2_SWMODE_SET;
3721 
3722 /**
3723 ****************************************************************************************************
3724 *   ADDR2_GET_PREFERRED_SURF_SETTING_INPUT
3725 *
3726 *   @brief
3727 *       Input structure of Addr2GetPreferredSurfaceSetting
3728 ****************************************************************************************************
3729 */
3730 typedef struct _ADDR2_GET_PREFERRED_SURF_SETTING_INPUT
3731 {
3732     UINT_32               size;              ///< Size of this structure in bytes
3733 
3734     ADDR2_SURFACE_FLAGS   flags;             ///< Surface flags
3735     AddrResourceType      resourceType;      ///< Surface type
3736     AddrFormat            format;            ///< Surface format
3737     AddrResrouceLocation  resourceLoction;   ///< Surface heap choice
3738     ADDR2_BLOCK_SET       forbiddenBlock;    ///< Client can use it to disable some block setting
3739                                              ///< such as linear for DXTn, tiled for YUV
3740     ADDR2_SWTYPE_SET      preferredSwSet;    ///< Client can use it to specify sw type(s) wanted
3741     BOOL_32               noXor;             ///< Do not use xor mode for this resource
3742     UINT_32               bpp;               ///< bits per pixel
3743     UINT_32               width;             ///< Width (of mip0), in pixels
3744     UINT_32               height;            ///< Height (of mip0), in pixels
3745     UINT_32               numSlices;         ///< Number surface slice/depth (of mip0),
3746     UINT_32               numMipLevels;      ///< Total mipmap levels.
3747     UINT_32               numSamples;        ///< Number of samples
3748     UINT_32               numFrags;          ///< Number of fragments, leave it zero or the same as
3749                                              ///  number of samples for normal AA; Set it to the
3750                                              ///  number of fragments for EQAA
3751     UINT_32               maxAlign;          ///< maximum base/size alignment requested by client
3752     UINT_32               minSizeAlign;      ///< memory allocated for surface in client driver will
3753                                              ///  be padded to multiple of this value (in bytes)
3754 } ADDR2_GET_PREFERRED_SURF_SETTING_INPUT;
3755 
3756 /**
3757 ****************************************************************************************************
3758 *   ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT
3759 *
3760 *   @brief
3761 *       Output structure of Addr2GetPreferredSurfaceSetting
3762 ****************************************************************************************************
3763 */
3764 typedef struct _ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT
3765 {
3766     UINT_32               size;                 ///< Size of this structure in bytes
3767 
3768     AddrSwizzleMode       swizzleMode;          ///< Suggested swizzle mode to be used
3769     AddrResourceType      resourceType;         ///< Suggested resource type to program HW
3770     ADDR2_BLOCK_SET       validBlockSet;        ///< Valid block type bit conbination
3771     BOOL_32               canXor;               ///< If client can use xor on a valid macro block
3772                                                 ///  type
3773     ADDR2_SWTYPE_SET      validSwTypeSet;       ///< Valid swizzle type bit combination
3774     ADDR2_SWTYPE_SET      clientPreferredSwSet; ///< Client-preferred swizzle type bit combination
3775     ADDR2_SWMODE_SET      validSwModeSet;       ///< Valid swizzle mode bit combination
3776 } ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT;
3777 
3778 /**
3779 ****************************************************************************************************
3780 *   Addr2GetPreferredSurfaceSetting
3781 *
3782 *   @brief
3783 *       Suggest a preferred setting for client driver to program HW register
3784 ****************************************************************************************************
3785 */
3786 ADDR_E_RETURNCODE ADDR_API Addr2GetPreferredSurfaceSetting(
3787     ADDR_HANDLE                                   hLib,
3788     const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn,
3789     ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT*      pOut);
3790 
3791 /**
3792 ****************************************************************************************************
3793 *   Addr2IsValidDisplaySwizzleMode
3794 *
3795 *   @brief
3796 *       Return whether the swizzle mode is supported by DCE / DCN.
3797 ****************************************************************************************************
3798 */
3799 ADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode(
3800     ADDR_HANDLE     hLib,
3801     AddrSwizzleMode swizzleMode,
3802     UINT_32         bpp,
3803     bool            *result);
3804 
3805 #if defined(__cplusplus)
3806 }
3807 #endif
3808 
3809 #endif // __ADDR_INTERFACE_H__
3810