Home
last modified time | relevance | path

Searched refs:tmp21 (Results 1 – 25 of 386) sorted by relevance

12345678910>>...16

/external/llvm/test/Transforms/InstCombine/
Dapint-cast.ll8 %tmp21 = lshr i37 %tmp, 8 ; <i37> [#uses=1]
9 ; CHECK: %tmp21 = lshr i17 %a, 8
12 %tmp.upgrd.32 = or i37 %tmp21, %tmp5 ; <i37> [#uses=1]
13 ; CHECK: %tmp.upgrd.32 = or i17 %tmp21, %tmp5
21 %tmp21 = lshr i577 %tmp, 9 ; <i577> [#uses=1]
22 ; CHECK: %tmp21 = lshr i167 %a, 9
25 %tmp.upgrd.32 = or i577 %tmp21, %tmp5 ; <i577> [#uses=1]
26 ; CHECK: %tmp.upgrd.32 = or i167 %tmp21, %tmp5
D2008-01-21-MulTrunc.ll7 %tmp21 = lshr i32 %tmp, 8 ; <i32> [#uses=1]
8 ; CHECK: %tmp21 = lshr i16 %a, 8
11 %tmp.upgrd.32 = or i32 %tmp21, %tmp5 ; <i32> [#uses=1]
12 ; CHECK: %tmp.upgrd.32 = or i16 %tmp21, %tmp5
/external/llvm-project/polly/test/ScopInfo/
Dlong-sequence-of-error-blocks.ll14 ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { : }
16tmp21, tmp27, tmp31] -> { : (tmp27 = 3 and tmp31 <= 143) or (tmp17 < 0 and tmp21 < 0) or (tmp17 < …
21 ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb15[] };
23 ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb15[] -> [0] };
25 ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb15[] -> MemRef_A[0] };
28 ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb19[] : tmp17 < 0 or tmp17 > 0 };
30 ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb19[] -> [1] : tmp17 < 0 or tmp17…
32 ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb19[] -> MemRef_A[0] };
35 ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb24[] };
37 ; CHECK-NEXT: [tmp17, tmp21, tmp27, tmp31] -> { Stmt_bb24[] -> [2] };
[all …]
Dschedule-incorrectly-contructed-in-case-of-infinite-loop.ll39 %tmp21 = sext i32 %tmp20 to i64
40 %tmp22 = icmp slt i64 0, %tmp21
84 %tmp21 = sext i32 %tmp20 to i64
85 %tmp22 = icmp slt i64 0, %tmp21
/external/llvm-project/llvm/test/Analysis/ScalarEvolution/
Dpr40420.ll25 %tmp15 = phi i64 [ 2, %outer_loop ], [ %tmp21.7, %inner_latch ]
31 %tmp21 = add nuw nsw i64 %tmp15, 1
37 %tmp21.1 = add nuw nsw i64 %tmp21, 1
49 %tmp21.7 = add nuw nsw i64 %tmp21.1, 1
Dtruncate.ll45 %tmp21 = trunc i64 %tmp20 to i32
46 %tmp22 = icmp eq i32 %tmp21, 0
93 %tmp21 = phi i64 [ 0, %bb ], [ %tmp24, %bb36 ]
99 %tmp29 = icmp ult i64 %tmp21, 1048576
106 %tmp24 = add nuw i64 %tmp21, 1
/external/llvm/test/CodeGen/AMDGPU/
Dsi-sgpr-spill.ll28 %tmp21 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !0
29 %tmp22 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 96)
30 %tmp23 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 100)
31 %tmp24 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 104)
32 %tmp25 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 112)
33 %tmp26 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 116)
34 %tmp27 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 120)
35 %tmp28 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 128)
36 %tmp29 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 132)
37 %tmp30 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 140)
[all …]
/external/llvm-project/llvm/test/Transforms/IRCE/
Dclamp.ll17 %tmp21 = zext i32 %length.i167 to i64
30 ; CHECK-NEXT: %tmp43 = icmp ult i64 %indvars.iv.next467, %tmp21
31 ; CHECK-NEXT: [[C0:%[^ ]+]] = icmp ugt i64 %tmp21, 1
32 ; CHECK-NEXT: %exit.mainloop.at = select i1 [[C0]], i64 %tmp21, i64 1
38 %tmp43 = icmp ult i64 %indvars.iv.next467, %tmp21
43 ; CHECK: %tmp56 = icmp ult i64 %indvars.iv.next, %tmp21
51 %tmp56 = icmp ult i64 %indvars.iv.next, %tmp21
61 %tmp99 = icmp ult i64 %indvars.iv750, %tmp21
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dsi-sgpr-spill.ll38 %tmp21 = load <4 x i32>, <4 x i32> addrspace(4)* %tmp, !tbaa !0
39 %tmp22 = call float @llvm.amdgcn.s.buffer.load.f32(<4 x i32> %tmp21, i32 96, i32 0)
40 %tmp23 = call float @llvm.amdgcn.s.buffer.load.f32(<4 x i32> %tmp21, i32 100, i32 0)
41 %tmp24 = call float @llvm.amdgcn.s.buffer.load.f32(<4 x i32> %tmp21, i32 104, i32 0)
42 %tmp25 = call float @llvm.amdgcn.s.buffer.load.f32(<4 x i32> %tmp21, i32 112, i32 0)
43 %tmp26 = call float @llvm.amdgcn.s.buffer.load.f32(<4 x i32> %tmp21, i32 116, i32 0)
44 %tmp27 = call float @llvm.amdgcn.s.buffer.load.f32(<4 x i32> %tmp21, i32 120, i32 0)
45 %tmp28 = call float @llvm.amdgcn.s.buffer.load.f32(<4 x i32> %tmp21, i32 128, i32 0)
46 %tmp29 = call float @llvm.amdgcn.s.buffer.load.f32(<4 x i32> %tmp21, i32 132, i32 0)
47 %tmp30 = call float @llvm.amdgcn.s.buffer.load.f32(<4 x i32> %tmp21, i32 140, i32 0)
[all …]
Dwait.ll34 %tmp21 = extractelement <4 x float> %tmp18, i32 2
36 …call void @llvm.amdgcn.exp.f32(i32 32, i32 15, float %tmp19, float %tmp20, float %tmp21, float %tm…
67 …%tmp21 = call <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32(<4 x i32> %tmp19.cast, i32 …
68 %tmp22 = extractelement <4 x float> %tmp21, i32 0
69 %tmp23 = extractelement <4 x float> %tmp21, i32 1
70 %tmp24 = extractelement <4 x float> %tmp21, i32 2
71 %tmp25 = extractelement <4 x float> %tmp21, i32 3
/external/llvm-project/llvm/test/CodeGen/PowerPC/
Drlwimi3.ll18 %tmp21 = lshr i32 %tmp19, 5 ; <i32> [#uses=1]
19 %tmp21.upgrd.1 = trunc i32 %tmp21 to i16 ; <i16> [#uses=1]
20 %tmp = and i16 %tmp21.upgrd.1, 31775 ; <i16> [#uses=1]
/external/llvm/test/CodeGen/PowerPC/
Drlwimi3.ll18 %tmp21 = lshr i32 %tmp19, 5 ; <i32> [#uses=1]
19 %tmp21.upgrd.1 = trunc i32 %tmp21 to i16 ; <i16> [#uses=1]
20 %tmp = and i16 %tmp21.upgrd.1, 31775 ; <i16> [#uses=1]
/external/llvm/test/Transforms/NaryReassociate/
Dpr24301.ll9 %tmp21 = add i32 119, %tmp4
11 %tmp23 = add i32 %tmp21, -128
12 ; CHECK: %tmp23 = add i32 %tmp21, -128
/external/llvm/test/CodeGen/Generic/
Di128-addsub.ll16 %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
17 %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
35 %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
36 %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
D2008-02-04-ExtractSubvector.ll8 %tmp21 = fadd <8 x double> zeroinitializer, zeroinitializer ; <<8 x double>> [#uses=1]
12 store <8 x double> %tmp21, <8 x double>* null, align 64
/external/llvm-project/llvm/test/CodeGen/Generic/
Di128-addsub.ll16 %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
17 %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
35 %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
36 %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
D2008-02-04-ExtractSubvector.ll8 %tmp21 = fadd <8 x double> zeroinitializer, zeroinitializer ; <<8 x double>> [#uses=1]
12 store <8 x double> %tmp21, <8 x double>* null, align 64
/external/llvm-project/llvm/test/Transforms/SimpleLoopUnswitch/
DformDedicatedAfterTrivial3.ll20 %tmp2.03 = phi i32 [ 0, %bb5 ], [ %tmp21, %bb19 ]
27 %tmp21 = add nuw nsw i32 %tmp2.03, 1
28 %tmp8 = icmp eq i32 %tmp21, 25
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dselect_fmf.ll14 %tmp21 = fcmp fast olt float %x, %y
15 %tmp22 = select fast i1 %tmp21, float %x, float %y
19 %select1 = select fast i1 %tmp21, float %select0, float %w
52 %tmp21 = fcmp fast olt float %x, %y
53 %tmp22 = select fast i1 %tmp21, float %x, float %y
57 %select1 = select fast i1 %tmp21, float %w, float %select0
/external/llvm/test/Transforms/SimplifyCFG/
D2009-01-19-UnconditionalTrappingConstantExpr.ll12 define i32 @test(i32 %tmp21, i32 %tmp24) {
13 %tmp25 = icmp sle i32 %tmp21, %tmp24
31 define i32 @test2(i32 %tmp21, i32 %tmp24, i1 %tmp34) {
/external/libjpeg-turbo/
Djidctint.c1078 JLONG tmp20, tmp21, tmp22, tmp23, tmp24; in jpeg_idct_10x10() local
1119 tmp21 = tmp11 + tmp13; in jpeg_idct_10x10()
1153 wsptr[8 * 1] = (int)RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS - PASS1_BITS); in jpeg_idct_10x10()
1154 wsptr[8 * 8] = (int)RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS - PASS1_BITS); in jpeg_idct_10x10()
1191 tmp21 = tmp11 + tmp13; in jpeg_idct_10x10()
1229 outptr[1] = range_limit[(int)RIGHT_SHIFT(tmp21 + tmp11, in jpeg_idct_10x10()
1232 outptr[8] = range_limit[(int)RIGHT_SHIFT(tmp21 - tmp11, in jpeg_idct_10x10()
1273 JLONG tmp20, tmp21, tmp22, tmp23, tmp24, tmp25; in jpeg_idct_11x11() local
1307 tmp21 = tmp20 + tmp23 + tmp25 - in jpeg_idct_11x11()
1345 wsptr[8 * 1] = (int)RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS - PASS1_BITS); in jpeg_idct_11x11()
[all …]
/external/webrtc/common_audio/signal_processing/
Dresample_by_2_mips.c61 int32_t tmp11, tmp12, tmp21, tmp22; in WebRtcSpl_DownsampleBy2() local
110 : [tmp22] "=r" (tmp22), [tmp21] "=&r" (tmp21), in WebRtcSpl_DownsampleBy2()
144 : [tmp22] "r" (tmp22), [tmp21] "r" (tmp21), in WebRtcSpl_DownsampleBy2()
/external/llvm-project/llvm/test/Transforms/LCSSA/
Dindirectbr.ll553 %tmp21 = add i32 undef, 677038203
560 ; CHECK: %tmp21.lcssa1 = phi i32 [ %tmp21.lcssa1, %lab4 ], [ %tmp21, %lab2 ]
561 %tmp12 = phi i32 [ %tmp21, %lab2 ], [ %tmp12, %lab4 ]
568 ; CHECK: %tmp21.lcssa1.lcssa = phi i32 [ %tmp21.lcssa1, %lab3 ]
/external/llvm/test/Transforms/LCSSA/
Dindirectbr.ll553 %tmp21 = add i32 undef, 677038203
560 ; CHECK: %tmp21.lcssa1 = phi i32 [ %tmp21.lcssa1, %lab4 ], [ %tmp21, %lab2 ]
561 %tmp12 = phi i32 [ %tmp21, %lab2 ], [ %tmp12, %lab4 ]
568 ; CHECK: %tmp21.lcssa1.lcssa = phi i32 [ %tmp21.lcssa1, %lab3 ]
/external/llvm-project/llvm/test/Transforms/CanonicalizeFreezeInLoops/
Dfunc_from_mcf_r.ll46 %tmp21 = load i64, i64* inttoptr (i64 32 to i64*), align 32
50 %tmp23 = mul nsw i64 %tmp21, %tmp19
52 %tmp25 = add nsw i64 %tmp21, -1
58 %tmp29 = phi i64 [ %tmp27, %bb22 ], [ %tmp21, %bb5 ]

12345678910>>...16