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Searched refs:umov (Results 1 – 25 of 47) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/AArch64/
Ddiv-rem-pair-recomposition-unsigned.ll73 ; ALL-NEXT: umov w10, v1.b[0]
74 ; ALL-NEXT: umov w11, v0.b[0]
75 ; ALL-NEXT: umov w8, v1.b[1]
76 ; ALL-NEXT: umov w9, v0.b[1]
78 ; ALL-NEXT: umov w12, v1.b[2]
79 ; ALL-NEXT: umov w13, v0.b[2]
82 ; ALL-NEXT: umov w14, v1.b[3]
83 ; ALL-NEXT: umov w15, v0.b[3]
86 ; ALL-NEXT: umov w16, v1.b[4]
87 ; ALL-NEXT: umov w17, v0.b[4]
[all …]
Durem-vector-lkk.ll9 ; CHECK-NEXT: umov w10, v0.h[2]
12 ; CHECK-NEXT: umov w8, v0.h[1]
24 ; CHECK-NEXT: umov w12, v0.h[0]
33 ; CHECK-NEXT: umov w11, v0.h[3]
55 ; CHECK-NEXT: umov w8, v0.h[1]
57 ; CHECK-NEXT: umov w10, v0.h[0]
59 ; CHECK-NEXT: umov w11, v0.h[2]
62 ; CHECK-NEXT: umov w12, v0.h[3]
103 ; CHECK-NEXT: umov w9, v0.h[1]
104 ; CHECK-NEXT: umov w10, v0.h[0]
[all …]
Dvecreduce-and-legalization.ll33 ; CHECK-NEXT: umov w0, v0.b[0]
43 ; CHECK-NEXT: umov w0, v0.h[0]
107 ; CHECK-NEXT: umov w8, v1.b[1]
108 ; CHECK-NEXT: umov w9, v1.b[0]
110 ; CHECK-NEXT: umov w9, v1.b[2]
112 ; CHECK-NEXT: umov w9, v1.b[3]
114 ; CHECK-NEXT: umov w9, v0.b[4]
116 ; CHECK-NEXT: umov w9, v1.b[5]
118 ; CHECK-NEXT: umov w9, v0.b[6]
120 ; CHECK-NEXT: umov w9, v0.b[7]
[all …]
Dbuild-vector-extract.ll210 ; CHECK-NEXT: umov w8, v0.h[0]
223 ; CHECK-NEXT: umov w8, v0.h[0]
237 ; CHECK-NEXT: umov w8, v0.h[1]
250 ; CHECK-NEXT: umov w8, v0.h[1]
264 ; CHECK-NEXT: umov w8, v0.h[2]
277 ; CHECK-NEXT: umov w8, v0.h[2]
291 ; CHECK-NEXT: umov w8, v0.h[3]
304 ; CHECK-NEXT: umov w8, v0.h[3]
318 ; CHECK-NEXT: umov w8, v0.h[0]
331 ; CHECK-NEXT: umov w8, v0.h[0]
[all …]
Dextract-insert.ll45 ; BE-NEXT: umov w0, v0.h[0]
67 ; LE-NEXT: umov w0, v0.h[3]
80 ; BE-NEXT: umov w0, v0.b[0]
100 ; LE-NEXT: umov w0, v0.b[3]
119 ; LE-NEXT: umov w0, v0.b[7]
Dbitcast-promote-widen.ll10 ; CHECK-NEXT: umov w8, v0.h[0]
12 ; CHECK-NEXT: umov w8, v0.h[1]
Dvecreduce-umax-legalization.ll34 ; CHECK-NEXT: umov w0, v0.b[0]
44 ; CHECK-NEXT: umov w0, v0.h[0]
146 ; CHECK-NEXT: umov w10, v0.h[1]
147 ; CHECK-NEXT: umov w11, v0.h[0]
148 ; CHECK-NEXT: umov w9, v0.h[2]
150 ; CHECK-NEXT: umov w8, v0.h[3]
Ddag-numsignbits.ll21 ; CHECK-NEXT: umov w0, v0.h[0]
22 ; CHECK-NEXT: umov w3, v0.h[3]
Darm64-i16-subreg-extract.ll5 ; CHECK: umov.h w{{[0-9]+}}, v{{[0-9]+}}[0]
Dvecreduce-add-legalization.ll33 ; CHECK-NEXT: umov w0, v0.b[0]
43 ; CHECK-NEXT: umov w0, v0.h[0]
Dvec_uaddo.ll252 ; CHECK-NEXT: umov w9, v1.h[1]
253 ; CHECK-NEXT: umov w8, v1.h[0]
256 ; CHECK-NEXT: umov w9, v1.h[2]
261 ; CHECK-NEXT: umov w9, v1.h[3]
Dvec_umulo.ll311 ; CHECK-NEXT: umov w9, v0.h[1]
312 ; CHECK-NEXT: umov w8, v0.h[0]
315 ; CHECK-NEXT: umov w9, v0.h[2]
319 ; CHECK-NEXT: umov w9, v0.h[3]
/external/llvm/test/MC/AArch64/
Dneon-simd-copy.s49 umov w1, v0.b[15]
50 umov w14, v6.h[4]
51 umov w20, v9.s[2]
52 umov x7, v18.d[1]
/external/llvm-project/llvm/test/MC/AArch64/
Dneon-simd-copy.s49 umov w1, v0.b[15]
50 umov w14, v6.h[4]
51 umov w20, v9.s[2]
52 umov x7, v18.d[1]
/external/llvm/test/CodeGen/AArch64/
Daarch64-be-bv.ll10 ; CHECK-NEXT: umov w{{[0-9]+}}, v[[REG1]].h[0]
22 ; CHECK-NEXT: umov w{{[0-9]+}}, v[[REG1]].h[0]
34 ; CHECK-NEXT: umov w{{[0-9]+}}, v[[REG1]].h[0]
46 ; CHECK-NEXT: umov w{{[0-9]+}}, v[[REG1]].h[0]
58 ; CHECK-NEXT: umov w{{[0-9]+}}, v[[REG1]].h[0]
70 ; CHECK-NEXT: umov w{{[0-9]+}}, v[[REG1]].h[0]
82 ; CHECK-NEXT: umov w{{[0-9]+}}, v[[REG1]].h[0]
94 ; CHECK-NEXT: umov w{{[0-9]+}}, v[[REG1]].h[0]
106 ; CHECK-NEXT: umov w{{[0-9]+}}, v[[REG1]].h[0]
118 ; CHECK-NEXT: umov w{{[0-9]+}}, v[[REG1]].h[0]
[all …]
Darm64-i16-subreg-extract.ll5 ; CHECK: umov.h w{{[0-9]+}}, v{{[0-9]+}}[0]
Dneon-scalar-copy.ll82 ; CHECK-NEXT: umov [[W:w[0-9]+]], v0.b[14]
99 ; CHECK-NEXT: umov [[W:w[0-9]+]], v0.h[7]
Dfp16-vector-shuffle.ll282 ; CHECK: umov
294 ; CHECK: umov
/external/capstone/suite/MC/AArch64/
Dneon-simd-copy.s.cs15 0x01,0x3c,0x1f,0x0e = umov w1, v0.b[15]
16 0xce,0x3c,0x12,0x0e = umov w14, v6.h[4]
/external/libhevc/common/arm64/
Dihevc_intra_pred_luma_mode_27_to_33.s153 umov w14, v5.s[0] //(i row)extract idx to the r register
202 umov w14, v5.s[1] //extract idx to the r register
282 umov w14, v3.s[0] //(i)extract idx to the r register
322 umov w14, v3.s[1] //extract idx to the r register
393 umov w14, v3.s[0] //(i)extract idx to the r register
Dihevc_itrans_recon_32x32.s512 umov x15,v24.d[0]
513 umov x16,v25.d[0]
514 umov x19,v26.d[0]
515 umov x20,v27.d[0]
868 umov x15,v24.d[0]
869 umov x16,v25.d[0]
870 umov x19,v26.d[0]
871 umov x20,v27.d[0]
1198 umov x15,v24.d[0]
1199 umov x16,v25.d[0]
[all …]
Dihevc_intra_pred_filters_luma_mode_19_to_25.s265 umov w14, v5.s[0] //(i row)extract idx to the r register
311 umov w14, v5.s[1] //extract idx to the r register
388 umov w14, v3.s[0] //(i)extract idx to the r register
430 umov w14, v3.s[1] //extract idx to the r register
501 umov w14, v3.s[0] //(i)extract idx to the r register
Dihevc_itrans_recon_8x8.s416 umov x15,v25.d[0]
497 umov x19,v25.d[0]
498 umov x20,v25.d[1]
620 umov x19,v25.d[0]
621 umov x20,v25.d[1]
769 umov x19,v25.d[0]
770 umov x20,v25.d[1]
905 umov x19,v25.d[0]
906 umov x20,v25.d[1]
Dihevc_itrans_recon_16x16.s612 umov x15,v26.d[0]
613 umov x16,v27.d[0]
614 umov x19,v28.d[0]
615 umov x20,v29.d[0]
1078 umov x15,v26.d[0]
1079 umov x16,v27.d[0]
1080 umov x19,v28.d[0]
1081 umov x20,v29.d[0]
/external/libmpeg2/common/armv8/
Dimpeg2_idct.s623 umov x15, v25.d[0]
704 umov x19, v25.d[0]
705 umov x20, v25.d[1]
830 umov x19, v25.d[0]
831 umov x20, v25.d[1]
979 umov x19, v25.d[0]
980 umov x20, v25.d[1]
1115 umov x19, v25.d[0]
1116 umov x20, v25.d[1]

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