/external/capstone/suite/MC/AArch64/ |
D | neon-compare-instructions.s.cs | 2 0xe0,0x8d,0x31,0x2e = cmeq v0.8b, v15.8b, v17.8b 4 0x0f,0x8e,0x71,0x2e = cmeq v15.4h, v16.4h, v17.4h 9 0xe0,0x3d,0x31,0x2e = cmhs v0.8b, v15.8b, v17.8b 11 0x0f,0x3e,0x71,0x2e = cmhs v15.4h, v16.4h, v17.4h 16 0xe0,0x3d,0x31,0x2e = cmhs v0.8b, v15.8b, v17.8b 18 0x0f,0x3e,0x71,0x2e = cmhs v15.4h, v16.4h, v17.4h 23 0xe0,0x3d,0x31,0x0e = cmge v0.8b, v15.8b, v17.8b 25 0x0f,0x3e,0x71,0x0e = cmge v15.4h, v16.4h, v17.4h 30 0xe0,0x3d,0x31,0x0e = cmge v0.8b, v15.8b, v17.8b 32 0x0f,0x3e,0x71,0x0e = cmge v15.4h, v16.4h, v17.4h [all …]
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D | neon-simd-ldst-multi-elem.s.cs | 3 0xef,0x75,0x00,0x4c = st1 {v15.8h}, [x15] 7 0xef,0x75,0x00,0x0c = st1 {v15.4h}, [x15] 11 0xef,0xa5,0x00,0x4c = st1 {v15.8h, v16.8h}, [x15] 15 0xef,0xa5,0x00,0x0c = st1 {v15.4h, v16.4h}, [x15] 19 0xef,0xa5,0x00,0x4c = st1 {v15.8h, v16.8h}, [x15] 23 0xef,0xa5,0x00,0x0c = st1 {v15.4h, v16.4h}, [x15] 27 0xef,0x65,0x00,0x4c = st1 {v15.8h, v16.8h, v17.8h}, [x15] 31 0xef,0x65,0x00,0x0c = st1 {v15.4h, v16.4h, v17.4h}, [x15] 35 0xef,0x65,0x00,0x4c = st1 {v15.8h, v16.8h, v17.8h}, [x15] 39 0xef,0x65,0x00,0x0c = st1 {v15.4h, v16.4h, v17.4h}, [x15] [all …]
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D | neon-simd-ldst-one-elem.s.cs | 3 0xef,0xc5,0x40,0x4d = ld1r {v15.8h}, [x15] 7 0xef,0xc5,0x40,0x0d = ld1r {v15.4h}, [x15] 11 0xef,0xc5,0x60,0x4d = ld2r {v15.8h, v16.8h}, [x15] 15 0xef,0xc5,0x60,0x0d = ld2r {v15.4h, v16.4h}, [x15] 19 0xef,0xe5,0x40,0x4d = ld3r {v15.8h, v16.8h, v17.8h}, [x15] 23 0xef,0xe5,0x40,0x0d = ld3r {v15.4h, v16.4h, v17.4h}, [x15] 27 0xef,0xe5,0x60,0x4d = ld4r {v15.8h, v16.8h, v17.8h, v18.8h}, [x15] 31 0xef,0xe5,0x60,0x0d = ld4r {v15.4h, v16.4h, v17.4h, v18.4h}, [x15] 35 0xef,0x59,0x40,0x4d = ld1 {v15.h}[7], [x15] 39 0xef,0x59,0x60,0x4d = ld2 {v15.h, v16.h}[7], [x15] [all …]
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D | neon-simd-post-ldst-multi-elem.s.cs | 3 0xef,0x75,0xc2,0x4c = ld1 {v15.8h}, [x15], x2 7 0xef,0x75,0xc3,0x0c = ld1 {v15.4h}, [x15], x3 11 0xef,0xa5,0xc2,0x4c = ld1 {v15.8h, v16.8h}, [x15], x2 15 0xef,0xa5,0xc3,0x0c = ld1 {v15.4h, v16.4h}, [x15], x3 19 0xef,0x65,0xc2,0x4c = ld1 {v15.8h, v16.8h, v17.8h}, [x15], x2 23 0xef,0x65,0xc3,0x0c = ld1 {v15.4h, v16.4h, v17.4h}, [x15], x3 27 0xef,0x25,0xc2,0x4c = ld1 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15], x2 31 0xef,0x25,0xc4,0x0c = ld1 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15], x4 35 0xef,0x85,0xc2,0x4c = ld2 {v15.8h, v16.8h}, [x15], x2 39 0xef,0x85,0xc3,0x0c = ld2 {v15.4h, v16.4h}, [x15], x3 [all …]
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/external/llvm/test/MC/AArch64/ |
D | neon-simd-ldst-multi-elem.s | 9 st1 { v15.8h }, [x15] 13 st1 { v15.4h }, [x15] 29 st1 { v15.8h, v16.8h }, [x15] 33 st1 { v15.4h, v16.4h }, [x15] 46 st1 { v15.8h-v16.8h }, [x15] 50 st1 { v15.4h-v16.4h }, [x15] 66 st1 { v15.8h, v16.8h, v17.8h }, [x15] 70 st1 { v15.4h, v16.4h, v17.4h }, [x15] 83 st1 { v15.8h-v17.8h }, [x15] 87 st1 { v15.4h-v17.4h }, [x15] [all …]
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D | neon-compare-instructions.s | 9 cmeq v0.8b, v15.8b, v17.8b 11 cmeq v15.4h, v16.4h, v17.4h 31 cmhs v0.8b, v15.8b, v17.8b 33 cmhs v15.4h, v16.4h, v17.4h 39 cmls v0.8b, v17.8b, v15.8b 41 cmls v15.4h, v17.4h, v16.4h 68 cmge v0.8b, v15.8b, v17.8b 70 cmge v15.4h, v16.4h, v17.4h 76 cmle v0.8b, v17.8b, v15.8b 78 cmle v15.4h, v17.4h, v16.4h [all …]
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D | neon-simd-ldst-one-elem.s | 9 ld1r { v15.8h }, [x15] 13 ld1r { v15.4h }, [x15] 30 ld2r { v15.8h, v16.8h }, [x15] 34 ld2r { v15.4h, v16.4h }, [x15] 47 ld3r { v15.8h, v16.8h, v17.8h }, [x15] 51 ld3r { v15.4h, v16.4h, v17.4h }, [x15] 64 ld4r { v15.8h, v16.8h, v17.8h, v18.8h }, [x15] 68 ld4r { v15.4h, v16.4h, v17.4h, v18.4h }, [x15] 84 ld1 { v15.h }[7], [x15] 97 ld2 { v15.h, v16.h }[7], [x15] [all …]
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D | neon-simd-post-ldst-multi-elem.s | 9 ld1 { v15.8h }, [x15], x2 13 ld1 { v15.4h }, [x15], x3 38 ld1 { v15.8h, v16.8h }, [x15], x2 42 ld1 { v15.4h, v16.4h }, [x15], x3 67 ld1 { v15.8h, v16.8h, v17.8h }, [x15], x2 71 ld1 { v15.4h, v16.4h, v17.4h }, [x15], x3 96 ld1 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15], x2 100 ld1 { v15.4h, v16.4h, v17.4h, v18.4h }, [x15], x4 125 ld2 { v15.8h, v16.8h }, [x15], x2 129 ld2 { v15.4h, v16.4h }, [x15], x3 [all …]
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D | neon-facge-facgt.s | 10 facge v4.8h, v7.8h, v15.8h 12 facge v4.4s, v7.4s, v15.4s 15 facle v4.8h, v15.8h, v7.8h 17 facle v4.4s, v15.4s, v7.4s 39 facgt v17.2d, v15.2d, v13.2d 44 faclt v17.2d, v13.2d, v15.2d
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D | neon-mov.s | 11 movi v15.2s, #1, lsl #8 46 mvni v15.4s, #1, lsl #8 80 bic v15.4h, #1 112 orr v15.4h, #1, lsl #8 161 movi v15.16b, #0xf 187 fmov v15.4s, #1.0 200 mov v15.16b, v16.16b 202 orr v15.16b, v16.16b, v16.16b
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D | neon-max-min-pairwise.s | 71 fmaxp v31.8h, v15.8h, v16.8h 73 fmaxp v31.4s, v15.4s, v16.4s 85 fminp v10.4h, v15.4h, v22.4h 87 fminp v10.2s, v15.2s, v22.2s 101 fmaxnmp v31.8h, v15.8h, v16.8h 103 fmaxnmp v31.4s, v15.4s, v16.4s 115 fminnmp v10.4h, v15.4h, v22.4h 117 fminnmp v10.2s, v15.2s, v22.2s
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D | neon-max-min.s | 73 fmax v31.4s, v15.4s, v16.4s 85 fmin v10.4h, v15.4h, v22.4h 86 fmin v10.8h, v15.8h, v22.8h 87 fmin v10.2s, v15.2s, v22.2s 103 fmaxnm v31.4s, v15.4s, v16.4s 115 fminnm v10.4h, v15.4h, v22.4h 116 fminnm v10.8h, v15.8h, v22.8h 117 fminnm v10.2s, v15.2s, v22.2s
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/external/llvm-project/llvm/test/MC/AArch64/ |
D | neon-simd-ldst-multi-elem.s | 9 st1 { v15.8h }, [x15] 13 st1 { v15.4h }, [x15] 29 st1 { v15.8h, v16.8h }, [x15] 33 st1 { v15.4h, v16.4h }, [x15] 46 st1 { v15.8h-v16.8h }, [x15] 50 st1 { v15.4h-v16.4h }, [x15] 66 st1 { v15.8h, v16.8h, v17.8h }, [x15] 70 st1 { v15.4h, v16.4h, v17.4h }, [x15] 83 st1 { v15.8h-v17.8h }, [x15] 87 st1 { v15.4h-v17.4h }, [x15] [all …]
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D | neon-compare-instructions.s | 9 cmeq v0.8b, v15.8b, v17.8b 11 cmeq v15.4h, v16.4h, v17.4h 31 cmhs v0.8b, v15.8b, v17.8b 33 cmhs v15.4h, v16.4h, v17.4h 39 cmls v0.8b, v17.8b, v15.8b 41 cmls v15.4h, v17.4h, v16.4h 68 cmge v0.8b, v15.8b, v17.8b 70 cmge v15.4h, v16.4h, v17.4h 76 cmle v0.8b, v17.8b, v15.8b 78 cmle v15.4h, v17.4h, v16.4h [all …]
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D | neon-simd-ldst-one-elem.s | 9 ld1r { v15.8h }, [x15] 13 ld1r { v15.4h }, [x15] 30 ld2r { v15.8h, v16.8h }, [x15] 34 ld2r { v15.4h, v16.4h }, [x15] 47 ld3r { v15.8h, v16.8h, v17.8h }, [x15] 51 ld3r { v15.4h, v16.4h, v17.4h }, [x15] 64 ld4r { v15.8h, v16.8h, v17.8h, v18.8h }, [x15] 68 ld4r { v15.4h, v16.4h, v17.4h, v18.4h }, [x15] 84 ld1 { v15.h }[7], [x15] 97 ld2 { v15.h, v16.h }[7], [x15] [all …]
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D | neon-simd-post-ldst-multi-elem.s | 9 ld1 { v15.8h }, [x15], x2 13 ld1 { v15.4h }, [x15], x3 38 ld1 { v15.8h, v16.8h }, [x15], x2 42 ld1 { v15.4h, v16.4h }, [x15], x3 67 ld1 { v15.8h, v16.8h, v17.8h }, [x15], x2 71 ld1 { v15.4h, v16.4h, v17.4h }, [x15], x3 96 ld1 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15], x2 100 ld1 { v15.4h, v16.4h, v17.4h, v18.4h }, [x15], x4 125 ld2 { v15.8h, v16.8h }, [x15], x2 129 ld2 { v15.4h, v16.4h }, [x15], x3 [all …]
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D | neon-facge-facgt.s | 10 facge v4.8h, v7.8h, v15.8h 12 facge v4.4s, v7.4s, v15.4s 15 facle v4.8h, v15.8h, v7.8h 17 facle v4.4s, v15.4s, v7.4s 39 facgt v17.2d, v15.2d, v13.2d 44 faclt v17.2d, v13.2d, v15.2d
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D | neon-mov.s | 11 movi v15.2s, #1, lsl #8 46 mvni v15.4s, #1, lsl #8 80 bic v15.4h, #1 112 orr v15.4h, #1, lsl #8 161 movi v15.16b, #0xf 187 fmov v15.4s, #1.0 200 mov v15.16b, v16.16b 202 orr v15.16b, v16.16b, v16.16b
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D | neon-max-min-pairwise.s | 71 fmaxp v31.8h, v15.8h, v16.8h 73 fmaxp v31.4s, v15.4s, v16.4s 85 fminp v10.4h, v15.4h, v22.4h 87 fminp v10.2s, v15.2s, v22.2s 101 fmaxnmp v31.8h, v15.8h, v16.8h 103 fmaxnmp v31.4s, v15.4s, v16.4s 115 fminnmp v10.4h, v15.4h, v22.4h 117 fminnmp v10.2s, v15.2s, v22.2s
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D | neon-max-min.s | 73 fmax v31.4s, v15.4s, v16.4s 85 fmin v10.4h, v15.4h, v22.4h 86 fmin v10.8h, v15.8h, v22.8h 87 fmin v10.2s, v15.2s, v22.2s 103 fmaxnm v31.4s, v15.4s, v16.4s 115 fminnm v10.4h, v15.4h, v22.4h 116 fminnm v10.8h, v15.8h, v22.8h 117 fminnm v10.2s, v15.2s, v22.2s
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/external/llvm/test/MC/SystemZ/ |
D | insn-good-z13.s | 510 #CHECK: vclzb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x53] 512 #CHECK: vclzb %v15, %v0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x53] 517 vclzb %v0, %v15 519 vclzb %v15, %v0 524 #CHECK: vclzf %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x20,0x53] 526 #CHECK: vclzf %v15, %v0 # encoding: [0xe7,0xf0,0x00,0x00,0x20,0x53] 531 vclzf %v0, %v15 533 vclzf %v15, %v0 538 #CHECK: vclzg %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x30,0x53] 540 #CHECK: vclzg %v15, %v0 # encoding: [0xe7,0xf0,0x00,0x00,0x30,0x53] [all …]
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/external/llvm-project/llvm/test/MC/SystemZ/ |
D | insn-good-z13.s | 1147 #CHECK: vclz %v0, %v15, 0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x53] 1149 #CHECK: vclz %v15, %v0, 0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x53] 1155 vclz %v0, %v15, 0 1157 vclz %v15, %v0, 0 1162 #CHECK: vclzb %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x53] 1164 #CHECK: vclzb %v15, %v0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x53] 1169 vclzb %v0, %v15 1171 vclzb %v15, %v0 1176 #CHECK: vclzf %v0, %v15 # encoding: [0xe7,0x0f,0x00,0x00,0x20,0x53] 1178 #CHECK: vclzf %v15, %v0 # encoding: [0xe7,0xf0,0x00,0x00,0x20,0x53] [all …]
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D | insn-good-z15.s | 31 #CHECK: vllebrzg %v15, 0 # encoding: [0xe6,0xf0,0x00,0x00,0x30,0x04] 38 #CHECK: vllebrzg %v15, 0 # encoding: [0xe6,0xf0,0x00,0x00,0x30,0x04] 62 #CHECK: vllebrze %v15, 0 # encoding: [0xe6,0xf0,0x00,0x00,0x60,0x04] 412 #CHECK: vstebrg %v15, 0, 0 # encoding: [0xe6,0xf0,0x00,0x00,0x00,0x0a] 428 #CHECK: vstebrf %v15, 0, 0 # encoding: [0xe6,0xf0,0x00,0x00,0x00,0x0b] 593 #CHECK: vlbr %v15, 0, 0 # encoding: [0xe6,0xf0,0x00,0x00,0x00,0x06] 602 vlbr %v15, 0, 0 610 #CHECK: vlbrf %v15, 0 # encoding: [0xe6,0xf0,0x00,0x00,0x20,0x06] 618 vlbrf %v15, 0 626 #CHECK: vlbrg %v15, 0 # encoding: [0xe6,0xf0,0x00,0x00,0x30,0x06] [all …]
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D | insn-good-z14.s | 454 #CHECK: vbperm %v0, %v0, %v15 # encoding: [0xe7,0x00,0xf0,0x00,0x00,0x85] 456 #CHECK: vbperm %v0, %v15, %v0 # encoding: [0xe7,0x0f,0x00,0x00,0x00,0x85] 458 #CHECK: vbperm %v15, %v0, %v0 # encoding: [0xe7,0xf0,0x00,0x00,0x00,0x85] 463 vbperm %v0, %v0, %v15 465 vbperm %v0, %v15, %v0 467 vbperm %v15, %v0, %v0 473 #CHECK: vcp %v15, %v0, 0 # encoding: [0xe6,0x0f,0x00,0x00,0x00,0x77] 475 #CHECK: vcp %v0, %v15, 0 # encoding: [0xe6,0x00,0xf0,0x00,0x00,0x77] 481 vcp %v15, %v0, 0 483 vcp %v0, %v15, 0 [all …]
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/external/libhevc/common/arm64/ |
D | ihevc_itrans_recon_32x32.s | 245 ld1 {v15.4h},[x0],x6 259 smlal v24.4s, v15.4h, v1.h[3] 260 smlal v26.4s, v15.4h, v5.h[1] 261 smlsl v28.4s, v15.4h, v7.h[1] 262 smlsl v30.4s, v15.4h, v3.h[3] 317 ld1 {v15.4h},[x0],x6 333 smlal v24.4s, v15.4h, v3.h[3] 334 smlsl v26.4s, v15.4h, v4.h[3] 335 smlsl v28.4s, v15.4h, v2.h[3] 336 smlal v30.4s, v15.4h, v5.h[3] [all …]
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