Searched refs:v2f64_a (Results 1 – 6 of 6) sorted by relevance
/external/llvm-project/clang/test/CodeGen/ |
D | builtins-mips-msa.c | 43 v2f64 v2f64_a = (v2f64) {0.5, 1}; in test() 320 v2f64_r = __msa_fadd_d(v2f64_a, v2f64_b); // CHECK: call <2 x double> @llvm.mips.fadd.d( in test() 323 v2i64_r = __msa_fcaf_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fcaf.d( in test() 326 v2i64_r = __msa_fceq_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fceq.d( in test() 329 v2i64_r = __msa_fclass_d(v2f64_a); // CHECK: call <2 x i64> @llvm.mips.fclass.d( in test() 332 v2i64_r = __msa_fcle_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fcle.d( in test() 335 v2i64_r = __msa_fclt_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fclt.d( in test() 338 v2i64_r = __msa_fcne_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fcne.d( in test() 341 v2i64_r = __msa_fcor_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fcor.d( in test() 344 v2i64_r = __msa_fcueq_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fcueq.d( in test() [all …]
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/external/clang/test/CodeGen/ |
D | builtins-mips-msa.c | 50 v2f64 v2f64_a = (v2f64) {0.5, 1}; in test() 327 v2f64_r = __builtin_msa_fadd_d(v2f64_a, v2f64_b); // CHECK: call <2 x double> @llvm.mips.fadd.d( in test() 330 v2i64_r = __builtin_msa_fcaf_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fcaf.d( in test() 333 v2i64_r = __builtin_msa_fceq_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fceq.d( in test() 336 v2i64_r = __builtin_msa_fclass_d(v2f64_a); // CHECK: call <2 x i64> @llvm.mips.fclass.d( in test() 339 v2i64_r = __builtin_msa_fcle_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fcle.d( in test() 342 v2i64_r = __builtin_msa_fclt_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fclt.d( in test() 345 v2i64_r = __builtin_msa_fcne_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fcne.d( in test() 348 v2i64_r = __builtin_msa_fcor_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fcor.d( in test() 351 v2i64_r = __builtin_msa_fcueq_d(v2f64_a, v2f64_b); // CHECK: call <2 x i64> @llvm.mips.fcueq.d( in test() [all …]
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/external/llvm-project/clang/test/Sema/ |
D | vector-gcc-compat.cpp | 143 v2f64 v2f64_a = {0.4, 0.4}; in doubleTestConstantComparison() local 145 v2i64_r = v2f64_a > 0.4; in doubleTestConstantComparison() 146 v2i64_r = v2f64_a >= 0.4; in doubleTestConstantComparison() 147 v2i64_r = v2f64_a < 0.4; in doubleTestConstantComparison() 148 v2i64_r = v2f64_a <= 0.4; in doubleTestConstantComparison() 149 v2i64_r = v2f64_a == 0.4; // expected-warning {{comparing floating point with == or != is unsafe}} in doubleTestConstantComparison() 150 v2i64_r = v2f64_a != 0.4; // expected-warning {{comparing floating point with == or != is unsafe}} in doubleTestConstantComparison()
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D | vector-gcc-compat.c | 145 v2f64 v2f64_a = {0.4, 0.4}; in doubleTestConstantComparison() local 147 v2i64_r = v2f64_a > 0.4; in doubleTestConstantComparison() 148 v2i64_r = v2f64_a >= 0.4; in doubleTestConstantComparison() 149 v2i64_r = v2f64_a < 0.4; in doubleTestConstantComparison() 150 v2i64_r = v2f64_a <= 0.4; in doubleTestConstantComparison() 151 v2i64_r = v2f64_a == 0.4; // expected-warning {{comparing floating point with == or != is unsafe}} in doubleTestConstantComparison() 152 v2i64_r = v2f64_a != 0.4; // expected-warning {{comparing floating point with == or != is unsafe}} in doubleTestConstantComparison()
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/external/llvm-project/llvm/test/Analysis/CostModel/X86/ |
D | vector-extract.ll | 18 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_a = extractelement <2… 32 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_a = extractelement <2… 46 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_a = extractelement… 59 %v2f64_a = extractelement <2 x double> undef, i32 %arg
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D | vector-insert.ll | 18 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_a = insertelement <2 … 32 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_a = insertelement <2 … 46 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_a = insertelement … 59 %v2f64_a = insertelement <2 x double> undef, double undef, i32 %arg
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