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Searched refs:v4f32_a (Results 1 – 6 of 6) sorted by relevance

/external/llvm-project/clang/test/Sema/
Dvector-gcc-compat.cpp120 v4f32 v4f32_a = {0.4f, 0.4f, 0.4f, 0.4f}; in floatTestConstant() local
121 v4f32_a = v4f32_a + 1; in floatTestConstant()
122 v4f32_a = v4f32_a + 0xFFFFFF; in floatTestConstant()
123 v4f32_a = v4f32_a + (-1567563LL); // expected-warning {{'long long' is incompatible with C++98}} in floatTestConstant()
124 v4f32_a = v4f32_a + (16777208); in floatTestConstant()
125 …v4f32_a = v4f32_a + (16777219); // expected-error {{cannot convert between scalar type 'int' and v… in floatTestConstant()
132 v4f32 v4f32_a = {0.4f, 0.4f, 0.4f, 0.4f}; in floatTestConstantComparison() local
134 v4i32_r = v4f32_a > 0.4f; in floatTestConstantComparison()
135 v4i32_r = v4f32_a >= 0.4f; in floatTestConstantComparison()
136 v4i32_r = v4f32_a < 0.4f; in floatTestConstantComparison()
[all …]
Dvector-gcc-compat.c122 v4f32 v4f32_a = {0.4f, 0.4f, 0.4f, 0.4f}; in floatTestConstant() local
123 v4f32_a = v4f32_a + 1; in floatTestConstant()
124 v4f32_a = v4f32_a + 0xFFFFFF; in floatTestConstant()
125 v4f32_a = v4f32_a + (-1567563LL); in floatTestConstant()
126 v4f32_a = v4f32_a + (16777208); in floatTestConstant()
127 …v4f32_a = v4f32_a + (16777219); // expected-error {{cannot convert between scalar type 'int' and v… in floatTestConstant()
134 v4f32 v4f32_a = {0.4f, 0.4f, 0.4f, 0.4f}; in floatTestConstantComparison() local
136 v4i32_r = v4f32_a > 0.4f; in floatTestConstantComparison()
137 v4i32_r = v4f32_a >= 0.4f; in floatTestConstantComparison()
138 v4i32_r = v4f32_a < 0.4f; in floatTestConstantComparison()
[all …]
/external/clang/test/CodeGen/
Dbuiltins-mips-msa.c47 v4f32 v4f32_a = (v4f32) {0.5, 1, 2, 3}; in test()
326 v4f32_r = __builtin_msa_fadd_w(v4f32_a, v4f32_b); // CHECK: call <4 x float> @llvm.mips.fadd.w( in test()
329 v4i32_r = __builtin_msa_fcaf_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fcaf.w( in test()
332 v4i32_r = __builtin_msa_fceq_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fceq.w( in test()
335 v4i32_r = __builtin_msa_fclass_w(v4f32_a); // CHECK: call <4 x i32> @llvm.mips.fclass.w( in test()
338 v4i32_r = __builtin_msa_fcle_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fcle.w( in test()
341 v4i32_r = __builtin_msa_fclt_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fclt.w( in test()
344 v4i32_r = __builtin_msa_fcne_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fcne.w( in test()
347 v4i32_r = __builtin_msa_fcor_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fcor.w( in test()
350 v4i32_r = __builtin_msa_fcueq_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fcueq.w( in test()
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/external/llvm-project/clang/test/CodeGen/
Dbuiltins-mips-msa.c40 v4f32 v4f32_a = (v4f32) {0.5, 1, 2, 3}; in test()
319 v4f32_r = __msa_fadd_w(v4f32_a, v4f32_b); // CHECK: call <4 x float> @llvm.mips.fadd.w( in test()
322 v4i32_r = __msa_fcaf_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fcaf.w( in test()
325 v4i32_r = __msa_fceq_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fceq.w( in test()
328 v4i32_r = __msa_fclass_w(v4f32_a); // CHECK: call <4 x i32> @llvm.mips.fclass.w( in test()
331 v4i32_r = __msa_fcle_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fcle.w( in test()
334 v4i32_r = __msa_fclt_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fclt.w( in test()
337 v4i32_r = __msa_fcne_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fcne.w( in test()
340 v4i32_r = __msa_fcor_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fcor.w( in test()
343 v4i32_r = __msa_fcueq_w(v4f32_a, v4f32_b); // CHECK: call <4 x i32> @llvm.mips.fcueq.w( in test()
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/external/llvm-project/llvm/test/Analysis/CostModel/X86/
Dvector-insert.ll81 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_a = insertelement <4…
100 ; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_a = insertelement <4…
119 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_a = insertelement <…
138 ; SSE4-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_a = insertelement <4…
157 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_a = insertelement <4 …
176 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_a = insertelement …
195 ; SLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_a = insertelement <4 …
214 ; GLM-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_a = insertelement <4 …
233 %v4f32_a = insertelement <4 x float> undef, float undef, i32 %arg
Dvector-extract.ll81 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_a = extractelement <4…
100 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_a = extractelement <4…
119 ; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f32_a = extractelement…
138 %v4f32_a = extractelement <4 x float> undef, i32 %arg