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/external/llvm-project/llvm/test/Verifier/
Dscatter_gather.ll14 …%res = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> %ptrs, i32 4, <16 x i1> %ma…
17 declare <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*>, i32, <16 x i1>, <8 x float>)
30 …%res = call <8 x float> @llvm.masked.gather.v8f32.p0v8p0f32(<8 x float*>* %ptrs, i32 4, <8 x i1> %…
33 declare <8 x float> @llvm.masked.gather.v8f32.p0v8p0f32(<8 x float*>*, i32, <8 x i1>, <8 x float>)
38 …%res = call <8 x float> @llvm.masked.gather.v8f32.v8f32(<8 x float> %ptrs, i32 4, <8 x i1> %mask, …
41 declare <8 x float> @llvm.masked.gather.v8f32.v8f32(<8 x float>, i32, <8 x i1>, <8 x float>)
46 …%res = call <8 x float> @llvm.masked.gather.v8f32.v8p0f64(<8 x double*> %ptrs, i32 4, <8 x i1> %ma…
49 declare <8 x float> @llvm.masked.gather.v8f32.v8p0f64(<8 x double*>, i32, <8 x i1>, <8 x float>)
54 …%res = call <8 x float> @llvm.masked.gather.v8f32.v16p0f32(<16 x float*> %ptrs, i32 4, <8 x i1> %m…
57 declare <8 x float> @llvm.masked.gather.v8f32.v16p0f32(<16 x float*>, i32, <8 x i1>, <8 x float>)
[all …]
/external/llvm-project/llvm/test/CodeGen/X86/
Dvec-strict-256.ll8 declare <8 x float> @llvm.experimental.constrained.fadd.v8f32(<8 x float>, <8 x float>, metadata, m…
10 declare <8 x float> @llvm.experimental.constrained.fsub.v8f32(<8 x float>, <8 x float>, metadata, m…
12 declare <8 x float> @llvm.experimental.constrained.fmul.v8f32(<8 x float>, <8 x float>, metadata, m…
14 declare <8 x float> @llvm.experimental.constrained.fdiv.v8f32(<8 x float>, <8 x float>, metadata, m…
16 declare <8 x float> @llvm.experimental.constrained.sqrt.v8f32(<8 x float>, metadata, metadata)
20 declare <8 x float> @llvm.experimental.constrained.fma.v8f32(<8 x float>, <8 x float>, <8 x float>,…
21 declare <8 x float> @llvm.experimental.constrained.ceil.v8f32(<8 x float>, metadata)
23 declare <8 x float> @llvm.experimental.constrained.floor.v8f32(<8 x float>, metadata)
25 declare <8 x float> @llvm.experimental.constrained.trunc.v8f32(<8 x float>, metadata)
27 declare <8 x float> @llvm.experimental.constrained.rint.v8f32(<8 x float>, metadata, metadata)
[all …]
Dvec-copysign-avx512.ll14 define <8 x float> @v8f32(<8 x float> %a, <8 x float> %b) nounwind {
15 ; CHECK-LABEL: v8f32:
19 %tmp = tail call <8 x float> @llvm.copysign.v8f32( <8 x float> %a, <8 x float> %b )
60 declare <8 x float> @llvm.copysign.v8f32(<8 x float> %Mag, <8 x float> %Sgn)
Dvec-copysign.ll64 define <8 x float> @v8f32(<8 x float> %a, <8 x float> %b) nounwind {
65 ; SSE2-LABEL: v8f32:
77 ; AVX-LABEL: v8f32:
84 %tmp = tail call <8 x float> @llvm.copysign.v8f32( <8 x float> %a, <8 x float> %b )
156 declare <8 x float> @llvm.copysign.v8f32(<8 x float> %Mag, <8 x float> %Sgn)
Dfnabs.ll54 %fabs = tail call <8 x float> @llvm.fabs.v8f32(< 8 x float> %a) #1
65 %fabs = tail call <8 x float> @llvm.fabs.v8f32(<8 x float> %a) #1
72 declare <8 x float> @llvm.fabs.v8f32(<8 x float> %p)
/external/llvm-project/mlir/test/Target/
Dllvmir-intrinsics.mlir10 // CHECK: call <8 x float> @llvm.fmuladd.v8f32
14 // CHECK: call <8 x float> @llvm.fma.v8f32
25 // CHECK: call <8 x float> @llvm.exp.v8f32
34 // CHECK: call <8 x float> @llvm.exp2.v8f32
43 // CHECK: call <8 x float> @llvm.log.v8f32
52 // CHECK: call <8 x float> @llvm.log10.v8f32
61 // CHECK: call <8 x float> @llvm.log2.v8f32
70 // CHECK: call <8 x float> @llvm.fabs.v8f32
79 // CHECK: call <8 x float> @llvm.sqrt.v8f32
88 // CHECK: call <8 x float> @llvm.ceil.v8f32
[all …]
/external/llvm/test/CodeGen/PowerPC/
Dvec_rounding.ll107 declare <8 x float> @llvm.floor.v8f32(<8 x float> %p)
110 %t = call <8 x float> @llvm.floor.v8f32(<8 x float> %p)
126 declare <8 x float> @llvm.ceil.v8f32(<8 x float> %p)
129 %t = call <8 x float> @llvm.ceil.v8f32(<8 x float> %p)
145 declare <8 x float> @llvm.trunc.v8f32(<8 x float> %p)
148 %t = call <8 x float> @llvm.trunc.v8f32(<8 x float> %p)
164 declare <8 x float> @llvm.nearbyint.v8f32(<8 x float> %p)
167 %t = call <8 x float> @llvm.nearbyint.v8f32(<8 x float> %p)
/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dvec_rounding.ll107 declare <8 x float> @llvm.floor.v8f32(<8 x float> %p)
110 %t = call <8 x float> @llvm.floor.v8f32(<8 x float> %p)
126 declare <8 x float> @llvm.ceil.v8f32(<8 x float> %p)
129 %t = call <8 x float> @llvm.ceil.v8f32(<8 x float> %p)
145 declare <8 x float> @llvm.trunc.v8f32(<8 x float> %p)
148 %t = call <8 x float> @llvm.trunc.v8f32(<8 x float> %p)
164 declare <8 x float> @llvm.nearbyint.v8f32(<8 x float> %p)
167 %t = call <8 x float> @llvm.nearbyint.v8f32(<8 x float> %p)
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenDAGISel.inc127 /* 149*/ OPC_CheckChild1Type, MVT::v8f32,
139 …// Src: (st VR256:{ *:[v8f32] }:$src, addr:{ *:[iPTR] }:$dst)<<P:Predicate_unindexedstore>><<P:Pre…
140 // Dst: (VMOVNTPSYmr addr:{ *:[iPTR] }:$dst, VR256:{ *:[v8f32] }:$src)
147 …// Src: (st VR256X:{ *:[v8f32] }:$src, addr:{ *:[iPTR] }:$dst)<<P:Predicate_unindexedstore>><<P:Pr…
148 // Dst: (VMOVNTPSZ256mr addr:{ *:[iPTR] }:$dst, VR256X:{ *:[v8f32] }:$src)
5304 /* 11400*/ OPC_CheckChild0Type, MVT::v8f32,
5321 …// Src: (st (extract_subvector:{ *:[v4f32] } VR256:{ *:[v8f32] }:$src1, (imm:{ *:[iPTR] }))<<P:Pre…
5322 …// Dst: (VEXTRACTF128mr addr:{ *:[iPTR] }:$dst, VR256:{ *:[v8f32] }:$src1, (EXTRACT_get_vextract12…
5507 /* 11826*/ OPC_CheckChild0Type, MVT::v8f32,
5524 …// Src: (st (extract_subvector:{ *:[v4f32] } VR256X:{ *:[v8f32] }:$src1, (imm:{ *:[iPTR] }))<<P:Pr…
[all …]
/external/llvm-project/llvm/test/Analysis/CostModel/X86/
Dfround.ll20 …estimated cost of 86 for instruction: %V8F32 = call <8 x float> @llvm.ceil.v8f32(<8 x float> undef)
31 … estimated cost of 4 for instruction: %V8F32 = call <8 x float> @llvm.ceil.v8f32(<8 x float> undef)
42 … estimated cost of 1 for instruction: %V8F32 = call <8 x float> @llvm.ceil.v8f32(<8 x float> undef)
53 … estimated cost of 1 for instruction: %V8F32 = call <8 x float> @llvm.ceil.v8f32(<8 x float> undef)
63 %V8F32 = call <8 x float> @llvm.ceil.v8f32(<8 x float> undef)
78 …stimated cost of 86 for instruction: %V8F32 = call <8 x float> @llvm.floor.v8f32(<8 x float> undef)
89 …estimated cost of 4 for instruction: %V8F32 = call <8 x float> @llvm.floor.v8f32(<8 x float> undef)
100 …estimated cost of 1 for instruction: %V8F32 = call <8 x float> @llvm.floor.v8f32(<8 x float> undef)
111 …estimated cost of 1 for instruction: %V8F32 = call <8 x float> @llvm.floor.v8f32(<8 x float> undef)
121 %V8F32 = call <8 x float> @llvm.floor.v8f32(<8 x float> undef)
[all …]
Darith-fma.ll12 … estimated cost of 1 for instruction: %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef,…
23 … estimated cost of 1 for instruction: %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef,…
34 … estimated cost of 1 for instruction: %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef,…
44 %V8F32 = call <8 x float> @llvm.fma.v8f32(<8 x float> undef, <8 x float> undef, <8 x float> undef)
57 declare <8 x float> @llvm.fma.v8f32(<8 x float>, <8 x float>, <8 x float>)
Dfmaxnum.ll18 …timated cost of 8 for instruction: %V8F32 = call <8 x float> @llvm.maxnum.v8f32(<8 x float> undef,…
26 …timated cost of 5 for instruction: %V8F32 = call <8 x float> @llvm.maxnum.v8f32(<8 x float> undef,…
34 …timated cost of 3 for instruction: %V8F32 = call <8 x float> @llvm.maxnum.v8f32(<8 x float> undef,…
42 …timated cost of 2 for instruction: %V8F32 = call <8 x float> @llvm.maxnum.v8f32(<8 x float> undef,…
49 %V8F32 = call <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef)
100 …ed cost of 2 for instruction: %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef,…
108 …ed cost of 1 for instruction: %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef,…
116 …ed cost of 1 for instruction: %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef,…
123 %V8F32 = call nnan <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef)
164 declare <8 x float> @llvm.maxnum.v8f32(<8 x float>, <8 x float>)
Dfminnum.ll18 …timated cost of 8 for instruction: %V8F32 = call <8 x float> @llvm.minnum.v8f32(<8 x float> undef,…
26 …timated cost of 5 for instruction: %V8F32 = call <8 x float> @llvm.minnum.v8f32(<8 x float> undef,…
34 …timated cost of 3 for instruction: %V8F32 = call <8 x float> @llvm.minnum.v8f32(<8 x float> undef,…
42 …timated cost of 2 for instruction: %V8F32 = call <8 x float> @llvm.minnum.v8f32(<8 x float> undef,…
49 %V8F32 = call <8 x float> @llvm.minnum.v8f32(<8 x float> undef, <8 x float> undef)
100 …ed cost of 2 for instruction: %V8F32 = call nnan <8 x float> @llvm.minnum.v8f32(<8 x float> undef,…
108 …ed cost of 1 for instruction: %V8F32 = call nnan <8 x float> @llvm.minnum.v8f32(<8 x float> undef,…
116 …ed cost of 1 for instruction: %V8F32 = call nnan <8 x float> @llvm.minnum.v8f32(<8 x float> undef,…
123 %V8F32 = call nnan <8 x float> @llvm.minnum.v8f32(<8 x float> undef, <8 x float> undef)
164 declare <8 x float> @llvm.minnum.v8f32(<8 x float>, <8 x float>)
Dfmaxnum-size-latency.ll10 …timated cost of 8 for instruction: %V8F32 = call <8 x float> @llvm.maxnum.v8f32(<8 x float> undef,…
18 …timated cost of 3 for instruction: %V8F32 = call <8 x float> @llvm.maxnum.v8f32(<8 x float> undef,…
25 %V8F32 = call <8 x float> @llvm.maxnum.v8f32(<8 x float> undef, <8 x float> undef)
58 declare <8 x float> @llvm.maxnum.v8f32(<8 x float>, <8 x float>)
Dfminnum-size-latency.ll10 …timated cost of 8 for instruction: %V8F32 = call <8 x float> @llvm.minnum.v8f32(<8 x float> undef,…
18 …timated cost of 3 for instruction: %V8F32 = call <8 x float> @llvm.minnum.v8f32(<8 x float> undef,…
25 %V8F32 = call <8 x float> @llvm.minnum.v8f32(<8 x float> undef, <8 x float> undef)
58 declare <8 x float> @llvm.minnum.v8f32(<8 x float>, <8 x float>)
/external/llvm-project/llvm/test/Transforms/PhaseOrdering/X86/
Dmasked-memory-ops.ll9 declare void @llvm.masked.store.v8f32.p0v8f32(<8 x float>, <8 x float>*, i32, <8 x i1>)
19 ; CHECK-NEXT: tail call void @llvm.masked.store.v8f32.p0v8f32(<8 x float> [[Y:%.*]], <8 x float>…
46 ; CHECK-NEXT: tail call void @llvm.masked.store.v8f32.p0v8f32(<8 x float> [[Y:%.*]], <8 x float>…
52 …tail call void @llvm.masked.store.v8f32.p0v8f32(<8 x float> %x, <8 x float>* %ptrf, i32 1, <8 x i1…
/external/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp446 {ISD::VECTOR_SHUFFLE, MVT::v8f32, 1}, // vblendps in getShuffleCost()
539 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i64, 1 }, in getCastInstrCost()
544 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f32, 1 }, in getCastInstrCost()
554 { ISD::FP_EXTEND, MVT::v8f64, MVT::v8f32, 1 }, in getCastInstrCost()
556 { ISD::FP_ROUND, MVT::v8f32, MVT::v8f64, 1 }, in getCastInstrCost()
583 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i64, 26 }, in getCastInstrCost()
590 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8, 2 }, in getCastInstrCost()
595 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 2 }, in getCastInstrCost()
602 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i32, 1 }, in getCastInstrCost()
612 { ISD::FP_TO_UINT, MVT::v8i32, MVT::v8f32, 1 }, in getCastInstrCost()
[all …]
DX86InstrFMA.td94 loadv8f32, X86Fmadd, v4f32, v8f32>;
96 loadv8f32, X86Fmsub, v4f32, v8f32>;
99 v4f32, v8f32>;
102 v4f32, v8f32>;
121 loadv8f32, X86Fnmadd, v4f32, v8f32>;
123 loadv8f32, X86Fnmsub, v4f32, v8f32>;
397 defm VFMADDPS4 : fma4p<0x68, "vfmaddps", X86Fmadd, v4f32, v8f32,
399 defm VFMSUBPS4 : fma4p<0x6C, "vfmsubps", X86Fmsub, v4f32, v8f32,
401 defm VFNMADDPS4 : fma4p<0x78, "vfnmaddps", X86Fnmadd, v4f32, v8f32,
403 defm VFNMSUBPS4 : fma4p<0x7C, "vfnmsubps", X86Fnmsub, v4f32, v8f32,
[all …]
/external/llvm/test/CodeGen/X86/
Dvec_floor.ll62 %t = call <8 x float> @llvm.floor.v8f32(<8 x float> %p)
65 declare <8 x float> @llvm.floor.v8f32(<8 x float> %p)
124 %t = call <8 x float> @llvm.ceil.v8f32(<8 x float> %p)
127 declare <8 x float> @llvm.ceil.v8f32(<8 x float> %p)
186 %t = call <8 x float> @llvm.trunc.v8f32(<8 x float> %p)
189 declare <8 x float> @llvm.trunc.v8f32(<8 x float> %p)
248 %t = call <8 x float> @llvm.rint.v8f32(<8 x float> %p)
251 declare <8 x float> @llvm.rint.v8f32(<8 x float> %p)
310 %t = call <8 x float> @llvm.nearbyint.v8f32(<8 x float> %p)
313 declare <8 x float> @llvm.nearbyint.v8f32(<8 x float> %p)
Dfnabs.ll54 %fabs = tail call <8 x float> @llvm.fabs.v8f32(< 8 x float> %a) #1
65 %fabs = tail call <8 x float> @llvm.fabs.v8f32(<8 x float> %a) #1
72 declare <8 x float> @llvm.fabs.v8f32(<8 x float> %p)
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp696 { ISD::FADD, MVT::v8f32, 1 }, // Haswell from http://www.agner.org/ in getArithmeticInstrCost()
698 { ISD::FSUB, MVT::v8f32, 1 }, // Haswell from http://www.agner.org/ in getArithmeticInstrCost()
700 { ISD::FMUL, MVT::v8f32, 1 }, // Haswell from http://www.agner.org/ in getArithmeticInstrCost()
704 { ISD::FDIV, MVT::v8f32, 14 }, // Haswell from http://www.agner.org/ in getArithmeticInstrCost()
741 { ISD::FDIV, MVT::v8f32, 28 }, // SNB from http://www.agner.org/ in getArithmeticInstrCost()
1047 {TTI::SK_PermuteSingleSrc, MVT::v8f32, 1}, // vpermps in getShuffleCost()
1062 {TTI::SK_PermuteTwoSrc, MVT::v8f32, 1}, // vpermt2ps in getShuffleCost()
1077 {TTI::SK_Broadcast, MVT::v8f32, 1}, // vbroadcastps in getShuffleCost()
1084 {TTI::SK_Reverse, MVT::v8f32, 1}, // vpermps in getShuffleCost()
1094 {TTI::SK_PermuteSingleSrc, MVT::v8f32, 1}, // vpermps in getShuffleCost()
[all …]
/external/llvm/include/llvm/CodeGen/
DMachineValueType.h113 v8f32 = 58, // 8 x f32 enumerator
257 return (SimpleTy == MVT::v8f32 || SimpleTy == MVT::v4f64 || in is256BitVector()
362 case v8f32: in getVectorElementType()
401 case v8f32: in getVectorNumElements()
494 case v8f32: in getSizeInBits()
652 if (NumElements == 8) return MVT::v8f32; in getVectorVT()
/external/llvm-project/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp769 { ISD::FADD, MVT::v8f32, 1 }, // Haswell from http://www.agner.org/ in getArithmeticInstrCost()
771 { ISD::FSUB, MVT::v8f32, 1 }, // Haswell from http://www.agner.org/ in getArithmeticInstrCost()
773 { ISD::FMUL, MVT::v8f32, 1 }, // Haswell from http://www.agner.org/ in getArithmeticInstrCost()
777 { ISD::FDIV, MVT::v8f32, 14 }, // Haswell from http://www.agner.org/ in getArithmeticInstrCost()
814 { ISD::FDIV, MVT::v8f32, 28 }, // SNB from http://www.agner.org/ in getArithmeticInstrCost()
1158 {TTI::SK_PermuteSingleSrc, MVT::v8f32, 1}, // vpermps in getShuffleCost()
1173 {TTI::SK_PermuteTwoSrc, MVT::v8f32, 1}, // vpermt2ps in getShuffleCost()
1202 {TTI::SK_Broadcast, MVT::v8f32, 1}, // vbroadcastps in getShuffleCost()
1209 {TTI::SK_Reverse, MVT::v8f32, 1}, // vpermps in getShuffleCost()
1219 {TTI::SK_PermuteSingleSrc, MVT::v8f32, 1}, // vpermps in getShuffleCost()
[all …]
/external/clang/test/CodeGen/
Dx86_64-arguments.c194 typedef float v8f32 __attribute__((__vector_size__(32))); typedef
196 v8f32 v;
205 v8f32 v[1];
/external/llvm-project/clang/test/CodeGen/X86/
Dx86_64-arguments.c194 typedef float v8f32 __attribute__((__vector_size__(32))); typedef
196 v8f32 v;
205 v8f32 v[1];

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