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/external/llvm-project/llvm/test/CodeGen/Thumb2/
Dmve-vpt-from-intrinsics.ll14 %1 = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> %0)
17 %4 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %3)
18 …%5 = call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %v3, <8 x i16> %v2, <8 x i1>…
32 %1 = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> %0)
36 %5 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %4)
37 …%6 = call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %w, <8 x i16> %x, <8 x i1> %…
41 declare i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1>)
42 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32)
43 declare <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, <8 x i1>, <8 x i16>)
/external/llvm-project/llvm/test/CodeGen/Thumb2/mve-intrinsics/
Dvrint-predicated.ll13 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
14 …%2 = tail call <8 x half> @llvm.arm.mve.vrinta.predicated.v8f16.v8i1(<8 x half> %a, <8 x i1> %1, <…
41 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
42 …%2 = tail call <8 x half> @llvm.arm.mve.vrintm.predicated.v8f16.v8i1(<8 x half> %a, <8 x i1> %1, <…
69 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
70 …%2 = tail call <8 x half> @llvm.arm.mve.vrintn.predicated.v8f16.v8i1(<8 x half> %a, <8 x i1> %1, <…
97 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
98 …%2 = tail call <8 x half> @llvm.arm.mve.vrintp.predicated.v8f16.v8i1(<8 x half> %a, <8 x i1> %1, <…
125 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
126 …%2 = tail call <8 x half> @llvm.arm.mve.vrintz.predicated.v8f16.v8i1(<8 x half> %a, <8 x i1> %1, <…
[all …]
Dvcvt-fp-int.ll13 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
14 …%2 = tail call <8 x half> @llvm.arm.mve.vcvt.fp.int.predicated.v8f16.v8i16.v8i1(<8 x i16> %a, i32 …
27 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
28 …%2 = tail call <8 x half> @llvm.arm.mve.vcvt.fp.int.predicated.v8f16.v8i16.v8i1(<8 x i16> %a, i32 …
69 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
70 …%2 = tail call <8 x i16> @llvm.arm.mve.vcvt.fp.int.predicated.v8i16.v8f16.v8i1(<8 x half> %a, i32 …
97 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
98 …%2 = tail call <8 x i16> @llvm.arm.mve.vcvt.fp.int.predicated.v8i16.v8f16.v8i1(<8 x half> %a, i32 …
116 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32)
119 declare <8 x half> @llvm.arm.mve.vcvt.fp.int.predicated.v8f16.v8i16.v8i1(<8 x i16>, i32, <8 x i1>, …
[all …]
Dabsneg-predicated.ll28 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
29 …%2 = tail call <8 x i16> @llvm.arm.mve.mvn.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i1> %1, <8 x i…
70 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
71 …%2 = tail call <8 x i16> @llvm.arm.mve.mvn.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i1> %1, <8 x i…
98 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
99 …%2 = tail call <8 x half> @llvm.arm.mve.neg.predicated.v8f16.v8i1(<8 x half> %a, <8 x i1> %1, <8 x…
140 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
141 …%2 = tail call <8 x i16> @llvm.arm.mve.neg.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i1> %1, <8 x i…
168 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
169 …%2 = tail call <8 x half> @llvm.arm.mve.abs.predicated.v8f16.v8i1(<8 x half> %a, <8 x i1> %1, <8 x…
[all …]
Dvrev.ll41 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
42 …%2 = tail call <8 x i16> @llvm.arm.mve.vrev.predicated.v8i16.v8i1(<8 x i16> %a, i32 32, <8 x i1> %…
55 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
56 …%2 = tail call <8 x half> @llvm.arm.mve.vrev.predicated.v8f16.v8i1(<8 x half> %a, i32 32, <8 x i1>…
83 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
84 …%2 = tail call <8 x i16> @llvm.arm.mve.vrev.predicated.v8i16.v8i1(<8 x i16> %a, i32 64, <8 x i1> %…
97 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
98 …%2 = tail call <8 x half> @llvm.arm.mve.vrev.predicated.v8f16.v8i1(<8 x half> %a, i32 64, <8 x i1>…
131 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32)
135 declare <8 x i16> @llvm.arm.mve.vrev.predicated.v8i16.v8i1(<8 x i16>, i32, <8 x i1>, <8 x i16>)
[all …]
Dvcvt_anpm.ll173 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
174 …%2 = tail call <8 x i16> @llvm.arm.mve.vcvta.predicated.v8i16.v8f16.v8i1(i32 0, <8 x i16> %inactiv…
201 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
202 …%2 = tail call <8 x i16> @llvm.arm.mve.vcvta.predicated.v8i16.v8f16.v8i1(i32 1, <8 x i16> %inactiv…
229 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
230 …%2 = tail call <8 x i16> @llvm.arm.mve.vcvtm.predicated.v8i16.v8f16.v8i1(i32 0, <8 x i16> %inactiv…
257 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
258 …%2 = tail call <8 x i16> @llvm.arm.mve.vcvtm.predicated.v8i16.v8f16.v8i1(i32 1, <8 x i16> %inactiv…
285 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
286 …%2 = tail call <8 x i16> @llvm.arm.mve.vcvtn.predicated.v8i16.v8f16.v8i1(i32 0, <8 x i16> %inactiv…
[all …]
Dvbrsrq.ll7 declare <8 x i16> @llvm.arm.mve.vbrsr.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, i32, <8 x i1>)
9 declare <8 x half> @llvm.arm.mve.vbrsr.predicated.v8f16.v8i1(<8 x half>, <8 x half>, i32, <8 x i1>)
12 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32)
72 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
73 …%2 = call <8 x i16> @llvm.arm.mve.vbrsr.predicated.v8i16.v8i1(<8 x i16> undef, <8 x i16> %a, i32 %…
86 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
87 …%2 = call <8 x half> @llvm.arm.mve.vbrsr.predicated.v8f16.v8i1(<8 x half> undef, <8 x half> %a, i3…
Dvcmulq.ll4 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32)
10 declare <8 x half> @llvm.arm.mve.vcmulq.predicated.v8f16.v8i1(i32, <8 x half>, <8 x half>, <8 x hal…
106 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
107 …%2 = call <8 x half> @llvm.arm.mve.vcmulq.predicated.v8f16.v8i1(i32 0, <8 x half> %inactive, <8 x …
134 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
135 …%2 = call <8 x half> @llvm.arm.mve.vcmulq.predicated.v8f16.v8i1(i32 1, <8 x half> %inactive, <8 x …
162 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
163 …%2 = call <8 x half> @llvm.arm.mve.vcmulq.predicated.v8f16.v8i1(i32 2, <8 x half> %inactive, <8 x …
190 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
191 …%2 = call <8 x half> @llvm.arm.mve.vcmulq.predicated.v8f16.v8i1(i32 3, <8 x half> %inactive, <8 x …
[all …]
Dvclzcls-predicated.ll27 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
28 …%2 = tail call <8 x i16> @llvm.arm.mve.cls.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i1> %1, <8 x i…
69 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
70 …%2 = tail call <8 x i16> @llvm.arm.mve.clz.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i1> %1, <8 x i…
111 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
112 …%2 = tail call <8 x i16> @llvm.arm.mve.clz.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i1> %1, <8 x i…
131 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32)
134 declare <8 x i16> @llvm.arm.mve.cls.predicated.v8i16.v8i1(<8 x i16>, <8 x i1>, <8 x i16>)
137 declare <8 x i16> @llvm.arm.mve.clz.predicated.v8i16.v8i1(<8 x i16>, <8 x i1>, <8 x i16>)
Dvabdq.ll49 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
50 …%2 = tail call <8 x i16> @llvm.arm.mve.abd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 1…
54 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32) #1
56 declare <8 x i16> @llvm.arm.mve.abd.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, i32, <8 x i1>, <8 x…
103 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
104 …%2 = tail call <8 x i16> @llvm.arm.mve.abd.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i32 1…
133 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
134 …%2 = tail call <8 x half> @llvm.arm.mve.abd.predicated.v8f16.v8i1(<8 x half> %a, <8 x half> %b, i3…
138 declare <8 x half> @llvm.arm.mve.abd.predicated.v8f16.v8i1(<8 x half>, <8 x half>, i32, <8 x i1>, <…
Dvaddq.ll69 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
70 …%2 = tail call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, <8 x …
74 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32) #2
76 declare <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, <8 x i1>, <8 x i16>…
87 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
88 …%2 = tail call <8 x half> @llvm.arm.mve.add.predicated.v8f16.v8i1(<8 x half> %a, <8 x half> %b, <8…
92 declare <8 x half> @llvm.arm.mve.add.predicated.v8f16.v8i1(<8 x half>, <8 x half>, <8 x i1>, <8 x h…
166 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
167 …%2 = call <8 x i16> @llvm.arm.mve.add.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %.splat, <8 x …
186 %3 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %2)
[all …]
Dvmulltq.ll62 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
63 …%2 = tail call <8 x i16> @llvm.arm.mve.mull.int.predicated.v8i16.v16i8.v8i1(<16 x i8> %a, <16 x i8…
67 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32) #1
69 declare <8 x i16> @llvm.arm.mve.mull.int.predicated.v8i16.v16i8.v8i1(<16 x i8>, <16 x i8>, i32, i32…
114 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
115 …%2 = tail call <8 x i16> @llvm.arm.mve.mull.poly.predicated.v8i16.v16i8.v8i1(<16 x i8> %a, <16 x i…
119 declare <8 x i16> @llvm.arm.mve.mull.poly.predicated.v8i16.v16i8.v8i1(<16 x i8>, <16 x i8>, i32, <8…
130 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
131 …%2 = tail call <8 x i16> @llvm.arm.mve.mull.int.predicated.v8i16.v16i8.v8i1(<16 x i8> %a, <16 x i8…
173 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
[all …]
Dvsubq.ll69 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
70 …%2 = tail call <8 x i16> @llvm.arm.mve.sub.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, <8 x …
74 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32) #2
76 declare <8 x i16> @llvm.arm.mve.sub.predicated.v8i16.v8i1(<8 x i16>, <8 x i16>, <8 x i1>, <8 x i16>…
87 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
88 …%2 = tail call <8 x half> @llvm.arm.mve.sub.predicated.v8f16.v8i1(<8 x half> %a, <8 x half> %b, <8…
92 declare <8 x half> @llvm.arm.mve.sub.predicated.v8f16.v8i1(<8 x half>, <8 x half>, <8 x i1>, <8 x h…
166 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
167 …%2 = call <8 x i16> @llvm.arm.mve.sub.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %.splat, <8 x …
186 %3 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %2)
[all …]
Dvector-shift-imm.ll117 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
118 …%2 = tail call <8 x i16> @llvm.arm.mve.shl.imm.predicated.v8i16.v8i1(<8 x i16> %a, i32 13, <8 x i1…
159 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
160 …%2 = tail call <8 x i16> @llvm.arm.mve.shr.imm.predicated.v8i16.v8i1(<8 x i16> %a, i32 3, i32 0, <…
201 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
202 …%2 = tail call <8 x i16> @llvm.arm.mve.shr.imm.predicated.v8i16.v8i1(<8 x i16> %a, i32 14, i32 1, …
243 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
244 …%2 = tail call <8 x i16> @llvm.arm.mve.shl.imm.predicated.v8i16.v8i1(<8 x i16> %a, i32 15, <8 x i1…
285 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
286 …%2 = tail call <8 x i16> @llvm.arm.mve.shl.imm.predicated.v8i16.v8i1(<8 x i16> %a, i32 10, <8 x i1…
[all …]
Dvmaxnmq.ll37 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
38 …%2 = tail call <8 x half> @llvm.arm.mve.max.predicated.v8f16.v8i1(<8 x half> %a, <8 x half> %b, i3…
42 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32) #2
44 declare <8 x half> @llvm.arm.mve.max.predicated.v8f16.v8i1(<8 x half>, <8 x half>, i32, <8 x i1>, <…
73 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
74 …%2 = tail call <8 x half> @llvm.arm.mve.max.predicated.v8f16.v8i1(<8 x half> %a, <8 x half> %b, i3…
Dvminnmq.ll37 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
38 …%2 = tail call <8 x half> @llvm.arm.mve.min.predicated.v8f16.v8i1(<8 x half> %a, <8 x half> %b, i3…
42 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32) #2
44 declare <8 x half> @llvm.arm.mve.min.predicated.v8f16.v8i1(<8 x half>, <8 x half>, i32, <8 x i1>, <…
73 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
74 …%2 = tail call <8 x half> @llvm.arm.mve.min.predicated.v8f16.v8i1(<8 x half> %a, <8 x half> %b, i3…
Dvector-shift-imm-dyadic.ll93 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
94 …%2 = call <16 x i8> @llvm.arm.mve.vshrn.predicated.v16i8.v8i16.v8i1(<16 x i8> %a, <8 x i16> %b, i3…
121 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
122 …%2 = call <16 x i8> @llvm.arm.mve.vshrn.predicated.v16i8.v8i16.v8i1(<16 x i8> %a, <8 x i16> %b, i3…
149 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
150 …%2 = call <16 x i8> @llvm.arm.mve.vshrn.predicated.v16i8.v8i16.v8i1(<16 x i8> %a, <8 x i16> %b, i3…
177 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
178 …%2 = call <16 x i8> @llvm.arm.mve.vshrn.predicated.v16i8.v8i16.v8i1(<16 x i8> %a, <8 x i16> %b, i3…
285 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
286 …%2 = call <16 x i8> @llvm.arm.mve.vshrn.predicated.v16i8.v8i16.v8i1(<16 x i8> %a, <8 x i16> %b, i3…
[all …]
Dvcvt.ll5 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32)
16 declare <8 x half> @llvm.arm.mve.vcvt.fix.predicated.v8f16.v8i16.v8i1(i32, <8 x half>, <8 x i16>, i…
18 declare <8 x i16> @llvm.arm.mve.vcvt.fix.predicated.v8i16.v8f16.v8i1(i32, <8 x i16>, <8 x half>, i3…
158 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
159 …%2 = call <8 x half> @llvm.arm.mve.vcvt.fix.predicated.v8f16.v8i16.v8i1(i32 0, <8 x half> %inactiv…
172 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
173 …%2 = call <8 x half> @llvm.arm.mve.vcvt.fix.predicated.v8f16.v8i16.v8i1(i32 1, <8 x half> %inactiv…
214 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
215 …%2 = call <8 x i16> @llvm.arm.mve.vcvt.fix.predicated.v8i16.v8f16.v8i1(i32 0, <8 x i16> %inactive,…
228 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
[all …]
Dvqmovn.ll133 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
134 …%2 = tail call <16 x i8> @llvm.arm.mve.vqmovn.predicated.v16i8.v8i16.v8i1(<16 x i8> %a, <8 x i16> …
161 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
162 …%2 = tail call <16 x i8> @llvm.arm.mve.vqmovn.predicated.v16i8.v8i16.v8i1(<16 x i8> %a, <8 x i16> …
189 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
190 …%2 = tail call <16 x i8> @llvm.arm.mve.vqmovn.predicated.v16i8.v8i16.v8i1(<16 x i8> %a, <8 x i16> …
217 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
218 …%2 = tail call <16 x i8> @llvm.arm.mve.vqmovn.predicated.v16i8.v8i16.v8i1(<16 x i8> %a, <8 x i16> …
245 %1 = tail call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
246 …%2 = tail call <16 x i8> @llvm.arm.mve.vqmovn.predicated.v16i8.v8i16.v8i1(<16 x i8> %a, <8 x i16> …
[all …]
Dvcaddq.ll5 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32)
15 declare <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32, i32, <8 x i16>, <8 x i16>, <8 x i…
17 declare <8 x half> @llvm.arm.mve.vcaddq.predicated.v8f16.v8i1(i32, i32, <8 x half>, <8 x half>, <8 …
209 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
210 …%2 = call <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32 1, i32 0, <8 x i16> %inactive, …
251 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
252 …%2 = call <8 x i16> @llvm.arm.mve.vcaddq.predicated.v8i16.v8i1(i32 1, i32 0, <8 x i16> %inactive, …
279 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
280 …%2 = call <8 x half> @llvm.arm.mve.vcaddq.predicated.v8f16.v8i1(i32 1, i32 0, <8 x half> %inactive…
321 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
[all …]
Dvcmlaq.ll4 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32)
10 declare <8 x half> @llvm.arm.mve.vcmlaq.predicated.v8f16.v8i1(i32, <8 x half>, <8 x half>, <8 x hal…
104 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
105 …%2 = call <8 x half> @llvm.arm.mve.vcmlaq.predicated.v8f16.v8i1(i32 0, <8 x half> %a, <8 x half> %…
132 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
133 …%2 = call <8 x half> @llvm.arm.mve.vcmlaq.predicated.v8f16.v8i1(i32 1, <8 x half> %a, <8 x half> %…
160 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
161 …%2 = call <8 x half> @llvm.arm.mve.vcmlaq.predicated.v8f16.v8i1(i32 2, <8 x half> %a, <8 x half> %…
188 %1 = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %0)
189 …%2 = call <8 x half> @llvm.arm.mve.vcmlaq.predicated.v8f16.v8i1(i32 3, <8 x half> %a, <8 x half> %…
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrVecCompiler.td170 def maskzeroupperv8i1 : maskzeroupper<v8i1, VK8>;
212 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
218 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
221 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
271 (v8i1 VK8:$mask), (iPTR 0))),
278 (v8i1 VK8:$mask), (iPTR 0))),
281 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
285 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
289 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
310 (v8i1 VK8:$mask), (iPTR 0))),
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrVecCompiler.td170 def maskzeroupperv8i1 : maskzeroupper<v8i1, VK8>;
212 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
218 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
221 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
271 (v8i1 VK8:$mask), (iPTR 0))),
278 (v8i1 VK8:$mask), (iPTR 0))),
281 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
285 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
289 def : Pat<(v8i1 (insert_subvector (v8i1 immAllZerosV),
310 (v8i1 VK8:$mask), (iPTR 0))),
[all …]
/external/swiftshader/third_party/subzero/src/
DIceTypes.def48 X(v8i1, 4, 1, 8, i1, "<8 x i1>", "v8i1") \
76 X(v8i1, 1, 1, 0, 0, 1, 1, v8i1) \
79 X(v8i16, 1, 1, 0, 1, 0, 1, v8i1) \
/external/llvm-project/llvm/test/Transforms/InstCombine/ARM/
Dmve-v2i2v.ll7 declare i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1>)
11 declare <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32)
34 %int = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> %vin)
35 %vout = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %int)
69 ; CHECK-NEXT: [[INT:%.*]] = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> [[VIN:%.*]]), !range !0
74 %int = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> %vin)
83 ; CHECK-NEXT: [[VOUT:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[INT]])
88 %vout = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %int)
112 %vec = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 %iin)
113 %iout = call i32 @llvm.arm.mve.pred.v2i.v8i1(<8 x i1> %vec)
[all …]

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