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Searched refs:v8x16 (Results 1 – 15 of 15) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/WebAssembly/
Dsimd.ll205 ; NO-SIMD128-NOT: v8x16
207 ; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
218 ; NO-SIMD128-NOT: v8x16
220 ; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
475 ; NO-SIMD128-NOT: v8x16
477 ; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
487 ; NO-SIMD128-NOT: v8x16
489 ; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
637 ; NO-SIMD128-NOT: v8x16
639 ; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
[all …]
Dsimd-nested-shuffles.ll9 ; CHECK: v8x16.shuffle
Dsimd-load-splat.ll12 ; CHECK-NEXT: v8x16.load_splat $push[[V:[0-9]+]]=, 0($0){{$}}
Dsimd-shuffle-bitcast.ll24 ; CHECK-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $pop[[L1]], $2, 0, 1, 2, 3
Dsimd-build-vector.ll181 ; CHECK-NEXT: v8x16.swizzle $push[[L0:[0-9]+]]=, $0, $1
192 ; CHECK-NEXT: v8x16.swizzle $push[[L0:[0-9]+]]=, $0, $1
259 ; CHECK-NEXT: v8x16.swizzle $push[[L0:[0-9]+]]=, $0, $1
Dsimd-shift-complex-splats.ll70 ; CHECK-NEXT: v8x16.shuffle $push3=, $pop2, $0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
Dsimd-intrinsics.ll16 ; SIMD128-NEXT: v8x16.swizzle $push[[R:[0-9]+]]=, $0, $1{{$}}
167 ; NO-SIMD128-NOT: v8x16
169 ; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
183 ; NO-SIMD128-NOT: v8x16
185 ; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
Dsimd-load-store-alignment.ll92 ; 1 is the default alignment for v8x16.load_splat so no attribute is needed.
96 ; CHECK-NEXT: v8x16.load_splat $push[[R:[0-9]+]]=, 0($0){{$}}
109 ; CHECK-NEXT: v8x16.load_splat $push[[R:[0-9]+]]=, 0($0){{$}}
Dsimd-offset.ll28 ; CHECK-NEXT: v8x16.load_splat 0
55 ; CHECK-NEXT: v8x16.load_splat 16
83 ; CHECK-NEXT: v8x16.load_splat 1
113 ; CHECK-NEXT: v8x16.load_splat 0
145 ; CHECK-NEXT: v8x16.load_splat 0
177 ; CHECK-NEXT: v8x16.load_splat 0
203 ; CHECK-NEXT: v8x16.load_splat 32
230 ; CHECK-NEXT: v8x16.load_splat gv_i8
/external/skia/modules/canvaskit/wasm_tools/SIMD/
Dwasm_simd_types.txt2 v8x16
/external/llvm-project/llvm/test/MC/WebAssembly/
Dsimd-encodings.s27 # CHECK: v8x16.load_splat 48 # encoding: [0xfd,0x07,0x00,0x30]
28 v8x16.load_splat 48
69 # CHECK: v8x16.shuffle 0, 17, 2, 19, 4, 21, 6, 23,
74 v8x16.shuffle 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31
76 # CHECK: v8x16.swizzle # encoding: [0xfd,0x0e]
77 v8x16.swizzle
/external/llvm-project/llvm/test/MC/Disassembler/WebAssembly/
Dwasm.txt39 # CHECK: v8x16.shuffle 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrSIMD.td70 defm "" : SIMDLoadSplat<"v8x16", 194>;
81 foreach args = [["v16i8", "v8x16"], ["v8i16", "v16x8"], ["v4i32", "v32x4"],
241 "v8x16.shuffle\t$dst, $x, $y, "#
244 "v8x16.shuffle\t"#
273 // Swizzle lanes: v8x16.swizzle
281 "v8x16.swizzle\t$dst, $src, $mask", "v8x16.swizzle", 192>;
/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrSIMD.td87 defm "" : SIMDLoadSplat<"v8x16", 7>;
97 foreach args = [["v16i8", "v8x16"], ["v8i16", "v16x8"], ["v4i32", "v32x4"],
404 "v8x16.shuffle\t$dst, $x, $y, "#
407 "v8x16.shuffle\t"#
436 // Swizzle lanes: v8x16.swizzle
443 "v8x16.swizzle\t$dst, $src, $mask", "v8x16.swizzle", 14>;
/external/neon_2_sse/
DNEON_2_SSE.h15938 int8x16x2_t v8x16; in vuzpq_s8() local
15943 …v8x16.val[0] = _mm_unpacklo_epi64(a_sh, b_sh); ///a0, a2, a4, a6, a8, a10, a12, a14, b0, b2, b4, … in vuzpq_s8()
15944 …v8x16.val[1] = _mm_unpackhi_epi64(a_sh, b_sh); //a1, a3, a5, a7, a9, a11, a13, a15, b1, b3, b5, b… in vuzpq_s8()
15945 return v8x16; in vuzpq_s8()