/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | mad_64_32.ll | 35 ; CI: v_mad_u64_u32 v[0:1], s{{\[[0-9]+:[0-9]+\]}}, v0, v1, v[2:3] 50 ; CI: v_mad_u64_u32 v[0:1], s{{\[[0-9]+:[0-9]+\]}}, v0, v1, v[2:3] 70 ; CI: v_mad_u64_u32 71 ; CI: v_mad_u64_u32 73 ; CI: v_mad_u64_u32 90 ; SI-NOT: v_mad_u64_u32 114 ; CI: v_mad_u64_u32 v[0:1], s{{\[[0-9]+:[0-9]+\]}}, v0, v2, v[4:5] 158 ; CI: v_mad_u64_u32 v[0:1], s{{\[[0-9]+:[0-9]+\]}}, v1, v0, v[0:1] 159 ; SI-NOT: v_mad_u64_u32
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D | mul.ll | 234 ; VI: v_mad_u64_u32 236 ; VI: v_mad_u64_u32 239 ; VI: v_mad_u64_u32 275 ; VI: v_mad_u64_u32 276 ; VI: v_mad_u64_u32 277 ; VI: v_mad_u64_u32
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D | hazard-inlineasm.mir | 20 …INLINEASM &"v_mad_u64_u32 $0, $1, $2, $3, $4", 0, 2621450, def $vgpr26_vgpr27, 2818058, def dead $…
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D | inline-asm.ll | 302 ; CHECK: v_mad_u64_u32 308 …%s0 = tail call { i64, i64 } asm sideeffect "v_mad_u64_u32 $0, $1, $2, $3, $4", "=v,=s,v,v,v"(i32 …
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D | wave32.ll | 408 ; GFX1032: v_mad_u64_u32 v[{{[0-9:]+}}], s{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, v[{{[0-9:]+}}] 409 ; GFX1064: v_mad_u64_u32 v[{{[0-9:]+}}], s[{{[0-9:]+}}], v{{[0-9]+}}, v{{[0-9]+}}, v[{{[0-9:]+}}]
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D | atomic_optimizations_local_pointer.ll | 1132 ; GFX8-NEXT: v_mad_u64_u32 v[0:1], s[2:3], v0, 5, v[1:2] 1165 ; GFX9-NEXT: v_mad_u64_u32 v[0:1], s[2:3], v0, 5, v[1:2] 1199 ; GFX1064-NEXT: v_mad_u64_u32 v[0:1], s[2:3], v0, 5, s[2:3] 1232 ; GFX1032-NEXT: v_mad_u64_u32 v[0:1], s2, v0, 5, s[2:3]
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/external/llvm-project/llvm/test/MC/AMDGPU/ |
D | gfx10-constant-bus.s | 53 v_mad_u64_u32 v[5:6], s12, v1, 0x12345678, 0x12345678 label 56 v_mad_u64_u32 v[5:6], s12, s1, 0x12345678, 0x12345678 label
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D | wave_any.s | 219 v_mad_u64_u32 v[0:1], s6, v0, v1, v[2:3] label 222 v_mad_u64_u32 v[0:1], s[6:7], v0, v1, v[2:3] label
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D | wave32.s | 410 v_mad_u64_u32 v[0:1], s6, v0, v1, v[2:3] label 414 v_mad_u64_u32 v[0:1], s[6:7], v0, v1, v[2:3] label
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D | vop3.s | 467 v_mad_u64_u32 v[5:6], s[12:13], s1, 0, 0 label
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/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
D | wave32.txt | 154 # GFX1032: v_mad_u64_u32 v[0:1], s6, v0, v1, v[2:3] 155 # GFX1064: v_mad_u64_u32 v[0:1], s[6:7], v0, v1, v[2:3]
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D | gfx10_dasm_all.txt | 79726 # W32: v_mad_u64_u32 v[254:255], s12, v1, v2, v[3:4] ; encoding: [0xfe,0x0c,0x76,0xd5,0x01,0x05,0x0… 79727 # W64: v_mad_u64_u32 v[254:255], s[12:13], v1, v2, v[3:4] ; encoding: [0xfe,0x0c,0x76,0xd5,0x01,0x0… 79730 # W32: v_mad_u64_u32 v[5:6], s100, v1, v2, v[3:4] ; encoding: [0x05,0x64,0x76,0xd5,0x01,0x05,0x0e,0… 79731 # W64: v_mad_u64_u32 v[5:6], s[100:101], v1, v2, v[3:4] ; encoding: [0x05,0x64,0x76,0xd5,0x01,0x05,… 79734 # W32: v_mad_u64_u32 v[5:6], s12, -1, v2, v[3:4] ; encoding: [0x05,0x0c,0x76,0xd5,0xc1,0x04,0x0e,0x… 79735 # W64: v_mad_u64_u32 v[5:6], s[12:13], -1, v2, v[3:4] ; encoding: [0x05,0x0c,0x76,0xd5,0xc1,0x04,0x… 79738 # W32: v_mad_u64_u32 v[5:6], s12, -4.0, v2, v[3:4] ; encoding: [0x05,0x0c,0x76,0xd5,0xf7,0x04,0x0e,… 79739 # W64: v_mad_u64_u32 v[5:6], s[12:13], -4.0, v2, v[3:4] ; encoding: [0x05,0x0c,0x76,0xd5,0xf7,0x04,… 79742 # W32: v_mad_u64_u32 v[5:6], s12, 0, v2, v[3:4] ; encoding: [0x05,0x0c,0x76,0xd5,0x80,0x04,0x0e,0x0… 79743 # W64: v_mad_u64_u32 v[5:6], s[12:13], 0, v2, v[3:4] ; encoding: [0x05,0x0c,0x76,0xd5,0x80,0x04,0x0… [all …]
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D | gfx8_dasm_all.txt | 50247 # CHECK: v_mad_u64_u32 v[5:6], s[12:13], v1, v2, v[3:4] ; encoding: [0x05,0x0c,0xe8,0xd1,0x01,0x05,… 50250 # CHECK: v_mad_u64_u32 v[254:255], s[12:13], v1, v2, v[3:4] ; encoding: [0xfe,0x0c,0xe8,0xd1,0x01,0… 50253 # CHECK: v_mad_u64_u32 v[5:6], s[14:15], v1, v2, v[3:4] ; encoding: [0x05,0x0e,0xe8,0xd1,0x01,0x05,… 50256 # CHECK: v_mad_u64_u32 v[5:6], s[100:101], v1, v2, v[3:4] ; encoding: [0x05,0x64,0xe8,0xd1,0x01,0x0… 50259 # CHECK: v_mad_u64_u32 v[5:6], flat_scratch, v1, v2, v[3:4] ; encoding: [0x05,0x66,0xe8,0xd1,0x01,0… 50262 # CHECK: v_mad_u64_u32 v[5:6], vcc, v1, v2, v[3:4] ; encoding: [0x05,0x6a,0xe8,0xd1,0x01,0x05,0x0e,… 50265 # CHECK: v_mad_u64_u32 v[5:6], tba, v1, v2, v[3:4] ; encoding: [0x05,0x6c,0xe8,0xd1,0x01,0x05,0x0e,… 50268 # CHECK: v_mad_u64_u32 v[5:6], tma, v1, v2, v[3:4] ; encoding: [0x05,0x6e,0xe8,0xd1,0x01,0x05,0x0e,… 50271 # CHECK: v_mad_u64_u32 v[5:6], ttmp[10:11], v1, v2, v[3:4] ; encoding: [0x05,0x7a,0xe8,0xd1,0x01,0x… 50274 # CHECK: v_mad_u64_u32 v[5:6], s[12:13], v255, v2, v[3:4] ; encoding: [0x05,0x0c,0xe8,0xd1,0xff,0x0… [all …]
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D | gfx9_dasm_all.txt | 41793 # CHECK: v_mad_u64_u32 v[5:6], s[12:13], v1, v2, v[3:4] ; encoding: [0x05,0x0c,0xe8,0xd1,0x01,0x05,… 41796 # CHECK: v_mad_u64_u32 v[254:255], s[12:13], v1, v2, v[3:4] ; encoding: [0xfe,0x0c,0xe8,0xd1,0x01,0… 41799 # CHECK: v_mad_u64_u32 v[5:6], s[14:15], v1, v2, v[3:4] ; encoding: [0x05,0x0e,0xe8,0xd1,0x01,0x05,… 41802 # CHECK: v_mad_u64_u32 v[5:6], s[100:101], v1, v2, v[3:4] ; encoding: [0x05,0x64,0xe8,0xd1,0x01,0x0… 41805 # CHECK: v_mad_u64_u32 v[5:6], flat_scratch, v1, v2, v[3:4] ; encoding: [0x05,0x66,0xe8,0xd1,0x01,0… 41808 # CHECK: v_mad_u64_u32 v[5:6], vcc, v1, v2, v[3:4] ; encoding: [0x05,0x6a,0xe8,0xd1,0x01,0x05,0x0e,… 41811 # CHECK: v_mad_u64_u32 v[5:6], s[12:13], v255, v2, v[3:4] ; encoding: [0x05,0x0c,0xe8,0xd1,0xff,0x0… 41814 # CHECK: v_mad_u64_u32 v[5:6], s[12:13], s1, v2, v[3:4] ; encoding: [0x05,0x0c,0xe8,0xd1,0x01,0x04,… 41817 # CHECK: v_mad_u64_u32 v[5:6], s[12:13], s101, v2, v[3:4] ; encoding: [0x05,0x0c,0xe8,0xd1,0x65,0x0… 41820 # CHECK: v_mad_u64_u32 v[5:6], s[12:13], flat_scratch_lo, v2, v[3:4] ; encoding: [0x05,0x0c,0xe8,0x… [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | VOP3Instructions.td | 418 def V_MAD_U64_U32 : VOP3Inst <"v_mad_u64_u32", VOP3b_I64_I1_I32_I32_I64>;
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | VOP3Instructions.td | 453 def V_MAD_U64_U32 : VOP3Inst <"v_mad_u64_u32", VOP3b_I64_I1_I32_I32_I64>;
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/external/mesa3d/src/amd/compiler/ |
D | aco_optimizer.cpp | 790 … else if (instr->opcode == aco_opcode::v_mad_u64_u32 || instr->opcode == aco_opcode::v_mad_i64_i32) in get_operand_size()
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/external/llvm-project/llvm/docs/AMDGPU/ |
D | AMDGPUAsmGFX7.rst | 1072 …v_mad_u64_u32 :ref:`vdst<amdgpu_synid7_vdst64_0>`, :ref:`sdst<amdgpu_synid7_…
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D | AMDGPUAsmGFX8.rst | 1346 …v_mad_u64_u32 :ref:`vdst<amdgpu_synid8_vdst64_0>`, :ref:`sdst<amdgpu_synid8_sdst64_…
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D | AMDGPUAsmGFX9.rst | 1557 …v_mad_u64_u32 :ref:`vdst<amdgpu_synid9_vdst64_0>`, :ref:`sdst<amdgpu_synid9_…
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D | AMDGPUAsmGFX10.rst | 1806 …v_mad_u64_u32 :ref:`vdst<amdgpu_synid10_vdst64_0>`, :ref:`sdst<amdgpu_synid10_wsdst…
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