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Searched refs:v_min_legacy_f32_e32 (Results 1 – 6 of 6) sorted by relevance

/external/llvm/test/CodeGen/AMDGPU/
Dfmin_legacy.ll15 ; SI-SAFE: v_min_legacy_f32_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
34 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[VA]]
47 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
66 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
85 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
104 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
123 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
142 ; SI-SAFE: v_min_legacy_f32_e32
143 ; SI-SAFE: v_min_legacy_f32_e32
162 ; SI-SAFE: v_min_legacy_f32_e32
[all …]
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dfmin_legacy.ll17 ; SI-SAFE: v_min_legacy_f32_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
42 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, s[[B]], [[VA]]
64 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[ADD_B]], [[ADD_A]]
83 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
107 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
131 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
155 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
179 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
202 ; SI-SAFE: v_min_legacy_f32_e32
203 ; SI-SAFE: v_min_legacy_f32_e32
[all …]
Dfmin_legacy.f16.ll46 ; SI-SAFE-NEXT: v_min_legacy_f32_e32 v0, v1, v0
115 ; SI-SAFE-NEXT: v_min_legacy_f32_e32 v0, v2, v0
116 ; SI-SAFE-NEXT: v_min_legacy_f32_e32 v1, v3, v1
200 ; SI-SAFE-NEXT: v_min_legacy_f32_e32 v0, v3, v0
201 ; SI-SAFE-NEXT: v_min_legacy_f32_e32 v1, v4, v1
202 ; SI-SAFE-NEXT: v_min_legacy_f32_e32 v2, v5, v2
310 ; SI-SAFE-NEXT: v_min_legacy_f32_e32 v0, v4, v0
311 ; SI-SAFE-NEXT: v_min_legacy_f32_e32 v1, v5, v1
312 ; SI-SAFE-NEXT: v_min_legacy_f32_e32 v2, v6, v2
313 ; SI-SAFE-NEXT: v_min_legacy_f32_e32 v3, v7, v3
[all …]
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dfmin_legacy.ll12 ; GFX6-NEXT: v_min_legacy_f32_e32 v0, v0, v1
30 ; GFX6-NEXT: v_min_legacy_f32_e32 v0, v0, v1
48 ; GFX6-NEXT: v_min_legacy_f32_e32 v0, v1, v0
66 ; GFX6-NEXT: v_min_legacy_f32_e32 v0, v1, v0
84 ; GFX6-NEXT: v_min_legacy_f32_e32 v0, v1, v0
102 ; GFX6-NEXT: v_min_legacy_f32_e32 v0, v1, v0
120 ; GFX6-NEXT: v_min_legacy_f32_e32 v0, v0, v1
138 ; GFX6-NEXT: v_min_legacy_f32_e32 v0, v0, v1
390 ; GFX6-NEXT: v_min_legacy_f32_e32 v0, v0, v2
391 ; GFX6-NEXT: v_min_legacy_f32_e32 v1, v1, v3
/external/llvm/test/MC/AMDGPU/
Dvop2.s167 v_min_legacy_f32_e32 v1, v2, v3 label
/external/llvm-project/llvm/test/MC/AMDGPU/
Dvop2.s191 v_min_legacy_f32_e32 v1, v2, v3 label