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Searched refs:v_mul_i32_i24_e64 (Results 1 – 18 of 18) sorted by relevance

/external/llvm-project/llvm/test/MC/AMDGPU/
Dvop2.s54 v_mul_i32_i24_e64 v1, v2, v3 label
69 v_mul_i32_i24_e64 v1, v2, 3 label
74 v_mul_i32_i24_e64 v1, v2, -3 label
98 v_mul_i32_i24_e64 v1, v2, s3 label
103 v_mul_i32_i24_e64 v1, s2, s2 label
108 v_mul_i32_i24_e64 v1, s2, 3 label
113 v_mul_i32_i24_e64 v1, 3, s3 label
Dvop2-err.s31 v_mul_i32_i24_e64 v1, 100, v3 label
35 v_mul_i32_i24_e64 v1, v2, 100 label
/external/llvm/test/MC/AMDGPU/
Dvop2-err.s34 v_mul_i32_i24_e64 v1, 100, v3 label
38 v_mul_i32_i24_e64 v1, v2, 100 label
Dvop2.s47 v_mul_i32_i24_e64 v1, v2, v3 label
/external/llvm/docs/
DAMDGPUUsage.rst117 v_mul_i32_i24_e64 v1, v2, v3
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dmul_int24.ll88 ; GCN-DAG: v_mul_i32_i24_e64 v{{[0-9]+}}, [[A]], [[A]]
Didot8s.ll549 ; GFX10-DL-NEXT: v_mul_i32_i24_e64 v4, s9, s10
918 ; GFX10-DL-NEXT: v_mul_i32_i24_e64 v4, s9, s10
/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
Dvop2_vi.txt30 # VI: v_mul_i32_i24_e64 v1, v2, v3 clamp ; encoding: [0x01,0x80,0x06,0xd1,0x02,0x07,0x02,0x00]
Dvop3_vi.txt159 # VI: v_mul_i32_i24_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x06,0xd1,0x03,0x0b,0x00,0x00]
Dgfx8_dasm_all.txt34971 # CHECK: v_mul_i32_i24_e64 v5, v1, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x01,0x05,0x02,0x…
34974 # CHECK: v_mul_i32_i24_e64 v255, v1, v2 ; encoding: [0xff,0x00,0x06,0xd1,0x01,0x05,0x02,0x…
34977 # CHECK: v_mul_i32_i24_e64 v5, v255, v2 ; encoding: [0x05,0x00,0x06,0xd1,0xff,0x05,0x02,0x…
34980 # CHECK: v_mul_i32_i24_e64 v5, s1, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x01,0x04,0x02,0x…
34983 # CHECK: v_mul_i32_i24_e64 v5, s101, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x65,0x04,0x02,0x…
34986 # CHECK: v_mul_i32_i24_e64 v5, flat_scratch_lo, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x66,0x04,0x02,…
34989 # CHECK: v_mul_i32_i24_e64 v5, flat_scratch_hi, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x67,0x04,0x02,…
34992 # CHECK: v_mul_i32_i24_e64 v5, vcc_lo, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x6a,0x04,0x02,0x…
34995 # CHECK: v_mul_i32_i24_e64 v5, vcc_hi, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x6b,0x04,0x02,0x…
34998 # CHECK: v_mul_i32_i24_e64 v5, tba_lo, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x6c,0x04,0x02,0x…
[all …]
Dgfx9_dasm_all.txt29580 # CHECK: v_mul_i32_i24_e64 v5, v1, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x01,0x05,0x02,0x…
29583 # CHECK: v_mul_i32_i24_e64 v255, v1, v2 ; encoding: [0xff,0x00,0x06,0xd1,0x01,0x05,0x02,0x…
29586 # CHECK: v_mul_i32_i24_e64 v5, v255, v2 ; encoding: [0x05,0x00,0x06,0xd1,0xff,0x05,0x02,0x…
29589 # CHECK: v_mul_i32_i24_e64 v5, s1, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x01,0x04,0x02,0x…
29592 # CHECK: v_mul_i32_i24_e64 v5, s101, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x65,0x04,0x02,0x…
29595 # CHECK: v_mul_i32_i24_e64 v5, flat_scratch_lo, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x66,0x04,0x02,…
29598 # CHECK: v_mul_i32_i24_e64 v5, flat_scratch_hi, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x67,0x04,0x02,…
29601 # CHECK: v_mul_i32_i24_e64 v5, vcc_lo, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x6a,0x04,0x02,0x…
29604 # CHECK: v_mul_i32_i24_e64 v5, vcc_hi, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x6b,0x04,0x02,0x…
29607 # CHECK: v_mul_i32_i24_e64 v5, m0, v2 ; encoding: [0x05,0x00,0x06,0xd1,0x7c,0x04,0x02,0x…
[all …]
Dgfx10_dasm_all.txt88065 # GFX10: v_mul_i32_i24_e64 v255, v1, v2 ; encoding: [0xff,0x00,0x09,0xd5,0x01,0x05,0x02,0x…
88068 # GFX10: v_mul_i32_i24_e64 v5, -1, v2 ; encoding: [0x05,0x00,0x09,0xd5,0xc1,0x04,0x02,0x…
88071 # GFX10: v_mul_i32_i24_e64 v5, -4.0, v2 ; encoding: [0x05,0x00,0x09,0xd5,0xf7,0x04,0x02,0x…
88074 # GFX10: v_mul_i32_i24_e64 v5, 0, v2 ; encoding: [0x05,0x00,0x09,0xd5,0x80,0x04,0x02,0x…
88077 # GFX10: v_mul_i32_i24_e64 v5, 0.5, v2 ; encoding: [0x05,0x00,0x09,0xd5,0xf0,0x04,0x02,0x…
88080 # GFX10: v_mul_i32_i24_e64 v5, exec_hi, v2 ; encoding: [0x05,0x00,0x09,0xd5,0x7f,0x04,0x02,0x…
88083 # GFX10: v_mul_i32_i24_e64 v5, exec_lo, v2 ; encoding: [0x05,0x00,0x09,0xd5,0x7e,0x04,0x02,0x…
88086 # GFX10: v_mul_i32_i24_e64 v5, m0, v2 ; encoding: [0x05,0x00,0x09,0xd5,0x7c,0x04,0x02,0x…
88089 # GFX10: v_mul_i32_i24_e64 v5, s1, v2 ; encoding: [0x05,0x00,0x09,0xd5,0x01,0x04,0x02,0x…
88092 # GFX10: v_mul_i32_i24_e64 v5, s101, v2 ; encoding: [0x05,0x00,0x09,0xd5,0x65,0x04,0x02,0x…
[all …]
/external/llvm/test/MC/Disassembler/AMDGPU/
Dvop3_vi.txt132 # VI: v_mul_i32_i24_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x06,0xd1,0x03,0x0b,0x00,0x00]
/external/llvm-project/llvm/docs/AMDGPU/
DAMDGPUAsmGFX7.rst1107 …v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdg…
DAMDGPUAsmGFX8.rst1386 …v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid…
DAMDGPUAsmGFX9.rst1603 …v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgp…
DAMDGPUAsmGFX10.rst1856 …v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<amdgpu_syni…
/external/llvm-project/llvm/docs/
DAMDGPUUsage.rst8884 v_mul_i32_i24_e64 v1, v2, 3