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Searched refs:v_subrev_f32 (Results 1 – 20 of 20) sorted by relevance

/external/llvm-project/llvm/test/MC/AMDGPU/
Dlds_direct-gfx10.s55 v_subrev_f32 v0, src_lds_direct, v0 label
Dvop2.s159 v_subrev_f32 v1, v2, v3 label
Dvop3.s241 v_subrev_f32 v1, v3, s5 label
Dvop_dpp.s400 v_subrev_f32 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 label
Dvop_sdwa.s396 v_subrev_f32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 label
/external/mesa3d/src/gallium/drivers/radeonsi/glsl_tests/
Dfract.glsl12 ; SI-NEXT: v_subrev_f32
/external/llvm/test/MC/AMDGPU/
Dvop3.s223 v_subrev_f32 v1, v3, s5 label
Dvop2.s133 v_subrev_f32 v1, v2, v3 label
Dvop_dpp.s362 v_subrev_f32 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 label
Dvop_sdwa.s369 v_subrev_f32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 label
/external/mesa3d/src/amd/compiler/
Daco_optimizer.cpp571 instr->opcode = aco_opcode::v_subrev_f32; in can_swap_operands()
923 instr->opcode = i ? aco_opcode::v_sub_f32 : aco_opcode::v_subrev_f32; in label_instruction()
2712 instr->opcode == aco_opcode::v_subrev_f32; in combine_instruction()
2806 … else if (instr->opcode == aco_opcode::v_subrev_f32 || instr->opcode == aco_opcode::v_subrev_f16) in combine_instruction()
Daco_instruction_selection.cpp1812 emit_vop2_instruction(ctx, instr, aco_opcode::v_subrev_f32, dst, true); in visit_alu_instr()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DVOP2Instructions.td479 defm V_SUBREV_F32 : VOP2Inst <"v_subrev_f32", VOP_F32_F32_F32, null_frag, "v_sub_f32">;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DVOP2Instructions.td467 defm V_SUBREV_F32 : VOP2Inst <"v_subrev_f32", VOP_F32_F32_F32, null_frag, "v_sub_f32">;
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td1491 defm V_SUBREV_F32 : VOP2Inst <vop2<0x5, 0x3>, "v_subrev_f32",
/external/llvm-project/llvm/docs/AMDGPU/
DAMDGPUAsmGFX7.rst773v_subrev_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgp…
DAMDGPUAsmGFX8.rst1012v_subrev_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_3>`…
DAMDGPUAsmGFX9.rst1203v_subrev_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`…
DAMDGPUAsmGFX10.rst1476v_subrev_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<am…
/external/mesa3d/docs/relnotes/
D20.1.0.rst1248 - aco: use v_subrev_f32 for fsub with an sgpr operand in src1