/external/llvm-project/llvm/test/MC/AMDGPU/ |
D | lds_direct-gfx10.s | 55 v_subrev_f32 v0, src_lds_direct, v0 label
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D | vop2.s | 159 v_subrev_f32 v1, v2, v3 label
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D | vop3.s | 241 v_subrev_f32 v1, v3, s5 label
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D | vop_dpp.s | 400 v_subrev_f32 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 label
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D | vop_sdwa.s | 396 v_subrev_f32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 label
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/external/mesa3d/src/gallium/drivers/radeonsi/glsl_tests/ |
D | fract.glsl | 12 ; SI-NEXT: v_subrev_f32
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/external/llvm/test/MC/AMDGPU/ |
D | vop3.s | 223 v_subrev_f32 v1, v3, s5 label
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D | vop2.s | 133 v_subrev_f32 v1, v2, v3 label
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D | vop_dpp.s | 362 v_subrev_f32 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 label
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D | vop_sdwa.s | 369 v_subrev_f32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 label
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/external/mesa3d/src/amd/compiler/ |
D | aco_optimizer.cpp | 571 instr->opcode = aco_opcode::v_subrev_f32; in can_swap_operands() 923 instr->opcode = i ? aco_opcode::v_sub_f32 : aco_opcode::v_subrev_f32; in label_instruction() 2712 instr->opcode == aco_opcode::v_subrev_f32; in combine_instruction() 2806 … else if (instr->opcode == aco_opcode::v_subrev_f32 || instr->opcode == aco_opcode::v_subrev_f16) in combine_instruction()
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D | aco_instruction_selection.cpp | 1812 emit_vop2_instruction(ctx, instr, aco_opcode::v_subrev_f32, dst, true); in visit_alu_instr()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | VOP2Instructions.td | 479 defm V_SUBREV_F32 : VOP2Inst <"v_subrev_f32", VOP_F32_F32_F32, null_frag, "v_sub_f32">;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | VOP2Instructions.td | 467 defm V_SUBREV_F32 : VOP2Inst <"v_subrev_f32", VOP_F32_F32_F32, null_frag, "v_sub_f32">;
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 1491 defm V_SUBREV_F32 : VOP2Inst <vop2<0x5, 0x3>, "v_subrev_f32",
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/external/llvm-project/llvm/docs/AMDGPU/ |
D | AMDGPUAsmGFX7.rst | 773 …v_subrev_f32 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`src0<amdgp…
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D | AMDGPUAsmGFX8.rst | 1012 …v_subrev_f32 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_3>`…
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D | AMDGPUAsmGFX9.rst | 1203 …v_subrev_f32 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_3>`…
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D | AMDGPUAsmGFX10.rst | 1476 …v_subrev_f32 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<am…
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/external/mesa3d/docs/relnotes/ |
D | 20.1.0.rst | 1248 - aco: use v_subrev_f32 for fsub with an sgpr operand in src1
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