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/external/llvm/test/Transforms/LoopVectorize/X86/
Dvectorization-remarks.ll9 ; VECTORIZED: remark: vectorization-remarks.c:17:8: vectorized loop (vectorization width: 4, interl…
10 ; UNROLLED: remark: vectorization-remarks.c:17:8: interleaved loop (interleaved count: 4)
11 ; NONE: remark: vectorization-remarks.c:17:8: loop not vectorized: vectorization and interleaving a…
50 !1 = !DIFile(filename: "vectorization-remarks.c", directory: ".")
54 !5 = !DIFile(filename: "vectorization-remarks.c", directory: ".")
Dvectorization-remarks-loopid-dbg.ll9 ; VECTORIZED: remark: vectorization-remarks.c:17:8: vectorized loop (vectorization width: 4, interl…
10 ; UNROLLED: remark: vectorization-remarks.c:17:8: interleaved loop (interleaved count: 4)
11 ; NONE: remark: vectorization-remarks.c:17:8: loop not vectorized: vectorization and interleaving a…
50 !1 = !DIFile(filename: "vectorization-remarks.c", directory: ".")
54 !5 = !DIFile(filename: "vectorization-remarks.c", directory: ".")
Dvectorization-remarks-profitable.ll4 ; CHECK: remark: vectorization-remarks-profitable.c:5:17: the cost-model indicates that vectorizati…
5 ; CHECK: remark: vectorization-remarks-profitable.c:5:17: the cost-model indicates that interleavin…
6 ; CHECK: remark: vectorization-remarks-profitable.c:12:17: the cost-model indicates that vectorizat…
7 ; CHECK: remark: vectorization-remarks-profitable.c:12:17: the cost-model indicates that interleavi…
21 ; ModuleID = 'vectorization-remarks-profitable.ll'
86 !1 = !DIFile(filename: "vectorization-remarks-profitable.c", directory: "")
/external/llvm-project/llvm/test/Transforms/LoopVectorize/X86/
Dvectorization-remarks-loopid-dbg.ll9 ; VECTORIZED: remark: vectorization-remarks.c:17:8: vectorized loop (vectorization width: 4, interl…
10 ; UNROLLED: remark: vectorization-remarks.c:17:8: interleaved loop (interleaved count: 4)
11 ; NONE: remark: vectorization-remarks.c:17:8: loop not vectorized: vectorization and interleaving a…
50 !1 = !DIFile(filename: "vectorization-remarks.c", directory: ".")
54 !5 = !DIFile(filename: "vectorization-remarks.c", directory: ".")
Dvectorization-remarks-profitable.ll4 ; CHECK: remark: vectorization-remarks-profitable.c:5:17: the cost-model indicates that vectorizati…
5 ; CHECK: remark: vectorization-remarks-profitable.c:5:17: the cost-model indicates that interleavin…
6 ; CHECK: remark: vectorization-remarks-profitable.c:11:3: the cost-model indicates that vectorizati…
7 ; CHECK: remark: vectorization-remarks-profitable.c:11:3: the cost-model indicates that interleavin…
21 ; ModuleID = 'vectorization-remarks-profitable.ll'
86 !1 = !DIFile(filename: "vectorization-remarks-profitable.c", directory: "")
/external/llvm-project/llvm/docs/Proposals/
DVectorizationPlan.rst10 The vectorization transformation can be rather complicated, involving several
17 The Vectorization Plan is an explicit model for describing vectorization
20 facilitates dealing with multiple vectorization candidates.
27 VPlan-based vectorization involves three major steps, taking a "scenario-based
28 approach" to vectorization planning:
52 vectorization process terminates before reaching Step 3, and compilation
61 a. Outer-loop vectorization. In particular, VPlan must be able to model the
64 b. SLP vectorization.
65 c. Combinations of the above, including nested vectorization: vectorizing
67 VF and UF), mixed vectorization: vectorizing a loop with SLP patterns
[all …]
/external/llvm-project/llvm/docs/
DVectorizers.rst36 The loop vectorizer uses a cost model to decide on the optimal vectorization factor
40 Users can control the vectorization SIMD width using the command line flag "-force-vector-width".
57 The ``#pragma clang loop`` directive allows loop vectorization hints to be
59 loop. The directive allows vectorization and interleaving to be enabled or
61 specified. The following example explicitly enables vectorization and
71 The following example implicitly enables vectorization and interleaving by
98 ``-Rpass-missed=loop-vectorize`` identifies loops that failed vectorization and
99 indicates if vectorization was specified.
102 vectorization to fail. If in addition ``-fsave-optimization-record`` is
103 provided, multiple causes of vectorization failure may be listed (this behavior
[all …]
/external/llvm/docs/
DVectorizers.rst36 The loop vectorizer uses a cost model to decide on the optimal vectorization factor
40 Users can control the vectorization SIMD width using the command line flag "-force-vector-width".
57 The ``#pragma clang loop`` directive allows loop vectorization hints to be
59 loop. The directive allows vectorization and interleaving to be enabled or
61 specified. The following example explicitly enables vectorization and
71 The following example implicitly enables vectorization and interleaving by
98 ``-Rpass-missed=loop-vectorize`` identifies loops that failed vectorization and
99 indicates if vectorization was specified.
102 vectorization to fail.
121 …no_switch.cpp:4:5: remark: loop not vectorized: vectorization is explicitly enabled [-Rpass-missed…
[all …]
/external/llvm-project/llvm/test/Transforms/LoopVectorize/PowerPC/
Doptimal-epilog-vectorization-profitability.ll1 ; RUN: opt < %s -passes='loop-vectorize' -enable-epilogue-vectorization -S | FileCheck %s
3 ; TODO: For now test for the `-epilogue-vectorization-minimum-VF` option. In
5 ; epilogue vectorization cost-model.
6 ; RUN: opt < %s -passes='loop-vectorize' -enable-epilogue-vectorization -epilogue-vectorization-min…
7 ; RUN: opt < %s -passes='loop-vectorize' -enable-epilogue-vectorization -S | FileCheck %s --check-p…
88 ; Do not vectorize the epilogue for loops with VF less than the default -epilogue-vectorization-min…
97 ; Specify a smaller minimum VF (via `-epilogue-vectorization-minimum-VF=4`) and
/external/llvm-project/llvm/test/Transforms/LoopVectorize/
Dunsafe-vf-hint-remark.ll4 ; Make sure the unsafe user specified vectorization factor is clamped.
16 …: remark: <unknown>:0:0: User-specified vectorization factor 4 is unsafe, clamping to maximum safe…
Doptimal-epilog-vectorization-liveout.ll3 ; To test epilogue-vectorization we need to make sure that the vectorizer actually vectorizes the l…
4 ; Without a target triple this becomes difficult, unless we force vectorization through user hints.
5 ; Currently user provided vectorization hints prevent epilogue vectorization unless the forced
6 ; VF is the same as the epilogue vectorization VF. To make these tests target independent we'll use…
8 …< %s -passes='loop-vectorize' -enable-epilogue-vectorization -force-vector-width=2 -epilogue-vecto…
Druntime-limit.ll7 ;CHECK: remark: {{.*}}:0:0: vectorized loop (vectorization width: 4, interleaved count: 1)
12 ;OVERRIDE: remark: {{.*}}:0:0: vectorized loop (vectorization width: 4, interleaved count: 1)
14 ;OVERRIDE: remark: {{.*}}:0:0: vectorized loop (vectorization width: 4, interleaved count: 1)
57 ; We vectorize with 12 checks if a vectorization hint is provided.
Dconsecutive-ptr-uniforms.ll14 ; uniform after vectorization.
46 ; uniform after vectorization.
81 ; recognized as uniform and remains uniform after vectorization. When
83 ; recognized as uniform, and it should not be uniform after vectorization.
137 ; recognized as uniform and remains uniform after vectorization. When
139 ; recognized as uniform, and it should not be uniform after vectorization.
141 ; recognized as uniform, and it should not be uniform after vectorization.
197 ; vectorization. The store is scalarized because it's in a predicated block.
243 ; as uniform and is not uniform after vectorization. The store is scalarized
278 ; uniform after vectorization.
[all …]
Dalias-set-with-uncomputable-bounds.ll7 ; runtime checks for that group and it should not block vectorization.
43 ; runtime checks for that group and it should not block vectorization.
79 ; vectorization, as we cannot generate runtime-checks for the set.
116 ; vectorization, as we cannot generate runtime-checks for the set.
/external/llvm-project/llvm/test/Transforms/LoopVectorize/AArch64/
Dunsafe-vf-hint-remark.ll4 ; Specify a large unsafe vectorization factor of 32 that gets clamped to 16,
8 …: remark: <unknown>:0:0: User-specified vectorization factor 32 is unsafe, clamping to maximum saf…
Dsve-scalable-load-in-loop.ll5 ; TypeSize error in the loop vectorization legality analysis. It is possible for
6 ; a scalable/vector load to appear inside a loop at vectorization legality
/external/llvm-project/mlir/lib/Dialect/Linalg/Transforms/
DVectorization.cpp635 OwningRewritePatternList tiling, promotion, vectorization; in populateConvVectorizationPatterns() local
636 populateVectorizationPatterns<ConvWOp, 1>(tiling, promotion, vectorization, in populateConvVectorizationPatterns()
639 populateVectorizationPatterns<ConvNWCOp, 3>(tiling, promotion, vectorization, in populateConvVectorizationPatterns()
642 populateVectorizationPatterns<ConvNCWOp, 3>(tiling, promotion, vectorization, in populateConvVectorizationPatterns()
645 populateVectorizationPatterns<ConvHWOp, 2>(tiling, promotion, vectorization, in populateConvVectorizationPatterns()
648 populateVectorizationPatterns<ConvNHWCOp, 4>(tiling, promotion, vectorization, in populateConvVectorizationPatterns()
651 populateVectorizationPatterns<ConvNCHWOp, 4>(tiling, promotion, vectorization, in populateConvVectorizationPatterns()
654 populateVectorizationPatterns<ConvDHWOp, 3>(tiling, promotion, vectorization, in populateConvVectorizationPatterns()
658 tiling, promotion, vectorization, tileSizes, context); in populateConvVectorizationPatterns()
661 tiling, promotion, vectorization, tileSizes, context); in populateConvVectorizationPatterns()
[all …]
/external/llvm-project/mlir/test/lib/Transforms/
DTestSparsification.cpp27 Option<int32_t> vectorization{ member
65 switch (vectorization) { in vectorOption()
/external/llvm/test/Transforms/LoopVectorize/
Dopt.ll2 ; RUN: opt -S -O3 -disable-loop-vectorization -force-vector-width=2 -force-vector-interleave=1 < %s…
7 ; Make sure we can disable vectorization in opt.
Druntime-limit.ll7 ;CHECK: remark: {{.*}}:0:0: vectorized loop (vectorization width: 4, interleaved count: 1)
12 ;OVERRIDE: remark: {{.*}}:0:0: vectorized loop (vectorization width: 4, interleaved count: 1)
14 ;OVERRIDE: remark: {{.*}}:0:0: vectorized loop (vectorization width: 4, interleaved count: 1)
57 ; We vectorize with 12 checks if a vectorization hint is provided.
/external/llvm/test/Transforms/SLPVectorizer/X86/
Dopt.ll2 ; RUN: opt < %s -O3 -disable-slp-vectorization -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-a…
7 ; Make sure we can disable slp vectorization in opt.
Dcrash_binaryop.ll25 ; At the same time vectorization wraps around the loop, vectorizes
29 ; after vectorization to re-arrange instructions.
/external/llvm-project/mlir/include/mlir/Dialect/SCF/
DPasses.td21 let summary = "Specialize `for` loops for vectorization";
32 let summary = "Specialize parallel loops for vectorization";
/external/llvm-project/mlir/test/Dialect/Affine/SuperVectorize/
Dvectorize_outer_loop_2d.mlir3 // Permutation maps used in vectorization.
28 // vectorization happens because of loop nesting order
/external/eigen/doc/
DUnalignedArrayAssert.dox101 \section getrid I don't care about optimal vectorization, how do I get rid of that stuff?
107 …ance EIGEN_UNALIGNED_VECTORIZE \endlink), while keeping unchanged the vectorization of dynamic-siz…
110 …te alignment code and thus preserves ABI compatibility, but completely disables vectorization.</li>
115 …ecause otherwise code that runs fine without vectorization would suddenly crash when enabling vect…

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