| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | fd2_program.h | 52 bool writes_psize; member
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| D | fd2_program.c | 257 if (vp->writes_psize && !binning) in fd2_program_emit()
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| D | ir2_assemble.c | 488 alloc.size = ctx->so->writes_psize; in assemble()
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| D | ir2_nir.c | 566 ctx->so->writes_psize = true; in store_output()
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| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_state_gs.c | 121 key->gs.writes_psize = gs->base.info.writes_psize; in make_gs_key()
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| D | svga_state_tgsi_transform.c | 251 key.gs.writes_psize = 1; in emulate_point_sprite()
455 (gs->base.info.writes_psize || gs->wide_point)) { in update_tgsi_transform()
466 vs->base.info.writes_psize)) { in update_tgsi_transform()
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| D | svga_shader.h | 71 unsigned writes_psize:1; member
153 unsigned writes_psize:1; member
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| D | svga_state_fs.c | 238 shader->info.writes_psize)); in make_fs_key()
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| /external/virglrenderer/src/gallium/auxiliary/tgsi/ |
| D | tgsi_scan.h | 106 boolean writes_psize; member
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| D | tgsi_scan.c | 387 info->writes_psize = TRUE; in tgsi_scan_shader()
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_scan.h | 131 boolean writes_psize; member
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| D | tgsi_scan.c | 767 info->writes_psize = true; in scan_declaration()
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| /external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
| D | fd3_draw.c | 81 fd3_emit_get_vp(emit)->writes_psize && in draw_impl()
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| D | fd3_program.c | 345 COND(vp->writes_psize, A3XX_VPC_ATTR_PSIZE)); in fd3_program_emit()
411 COND(vp->writes_psize, A3XX_VPC_ATTR_PSIZE)); in fd3_program_emit()
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| D | fd3_emit.c | 663 val |= COND(vp->writes_psize, A3XX_PC_PRIM_VTX_CNTL_PSIZE); in fd3_emit_state()
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_shader_llvm_vs.c | 606 bool writes_psize = shader->selector->info.writes_psize && !shader->key.opt.kill_pointsize; in si_llvm_build_vs_exports() local
610 if (writes_psize || pos_writes_edgeflag || in si_llvm_build_vs_exports()
612 pos_args[1].enabled_channels = writes_psize | in si_llvm_build_vs_exports()
625 if (writes_psize) in si_llvm_build_vs_exports()
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| D | si_shader.h | 378 bool writes_psize; member
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| D | si_state_shaders.c | 1055 bool writes_psize = sel->info.writes_psize; in si_get_vs_out_cntl() local
1058 writes_psize &= !shader->key.opt.kill_pointsize; in si_get_vs_out_cntl()
1060 bool misc_vec_ena = writes_psize || (sel->info.writes_edgeflag && !ngg) || in si_get_vs_out_cntl()
1062 return S_02881C_USE_VTX_POINT_SIZE(writes_psize) | in si_get_vs_out_cntl()
1826 vs->info.writes_psize && in si_shader_selector_key_hw_vs()
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| D | si_shader_nir.c | 383 info->writes_psize = nir->info.outputs_written & VARYING_BIT_PSIZ; in si_nir_scan_shader()
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| /external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
| D | fd4_draw.c | 65 fd4_emit_get_vp(emit)->writes_psize && in draw_impl()
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| D | fd4_program.c | 435 COND(s[VS].v->writes_psize, A4XX_VPC_ATTR_PSIZE)); in fd4_program_emit()
516 COND(s[VS].v->writes_psize, A4XX_VPC_ATTR_PSIZE)); in fd4_program_emit()
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| D | fd4_emit.c | 628 val |= COND(vp->writes_psize, A4XX_PC_PRIM_VTX_CNTL_PSIZE); in fd4_emit_state()
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| /external/mesa3d/src/freedreno/ir3/ |
| D | ir3_shader.h | 572 bool writes_pos, writes_smask, writes_psize, writes_stencilref; member
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| /external/mesa3d/src/gallium/auxiliary/nir/ |
| D | nir_to_tgsi_info.c | 717 info->writes_psize = true; in nir_tgsi_scan_shader()
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| /external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| D | fd5_program.c | 484 OUT_RING(ring, COND(s[VS].v->writes_psize, A5XX_PC_PRIM_VTX_CNTL_PSIZE)); in fd5_program_emit()
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