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Searched refs:xnn_f32_elu_params (Results 1 – 25 of 194) sorted by relevance

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/external/XNNPACK/src/f32-velu/gen/
Dvelu-scalar-rr2-lut16-p3-x1.c25 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x1()
Dvelu-scalar-rr2-p6-x1.c23 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__scalar_rr2_p6_x1()
Dvelu-wasm-rr2-lut16-p3-x1.c25 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x1()
Dvelu-wasm-rr2-p6-x1.c23 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__wasm_rr2_p6_x1()
Dvelu-wasm-rr2-lut16-p3-x2.c25 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x2()
Dvelu-scalar-rr2-lut16-p3-x2.c25 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x2()
Dvelu-wasm-rr2-p6-x2.c23 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__wasm_rr2_p6_x2()
Dvelu-scalar-rr2-p6-x2.c23 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__scalar_rr2_p6_x2()
Dvelu-avx512f-rr1-lut16-p3-perm-x16.c23 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x16()
Dvelu-neonfma-rr1-p6-x4.c22 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN in xnn_f32_velu_ukernel__neonfma_rr1_p6_x4()
Dvelu-avx512f-rr1-p6-x16.c23 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__avx512f_rr1_p6_x16()
Dvelu-wasmsimd-arm-rr2-p6-x4.c22 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN in xnn_f32_velu_ukernel__wasmsimd_arm_rr2_p6_x4()
Dvelu-scalar-rr2-p6-x3.c23 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__scalar_rr2_p6_x3()
Dvelu-wasm-rr2-p6-x3.c23 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__wasm_rr2_p6_x3()
Dvelu-avx2-rr1-lut16-p3-gather-x8.c26 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x8()
Dvelu-avx2-rr1-lut4-p4-perm-x8.c24 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x8()
Dvelu-avx2-rr1-p6-x8.c24 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__avx2_rr1_p6_x8()
Dvelu-avx2-rr1-lut8-p4-perm-x8.c24 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x8()
Dvelu-neon-rr2-p6-x4.c22 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN in xnn_f32_velu_ukernel__neon_rr2_p6_x4()
Dvelu-scalar-rr2-lut16-p3-x3.c25 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x3()
Dvelu-sse41-rr2-p6-x4.c22 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN in xnn_f32_velu_ukernel__sse41_rr2_p6_x4()
Dvelu-wasm-rr2-lut16-p3-x3.c25 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x3()
Dvelu-sse2-rr2-p6-x4.c22 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN in xnn_f32_velu_ukernel__sse2_rr2_p6_x4()
Dvelu-wasmsimd-x86-rr2-p6-x4.c22 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_DISABLE_TSAN in xnn_f32_velu_ukernel__wasmsimd_x86_rr2_p6_x4()
Dvelu-avx-rr2-p6-x8.c24 const union xnn_f32_elu_params params[restrict XNN_MIN_ELEMENTS(1)]) in xnn_f32_velu_ukernel__avx_rr2_p6_x8()

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