| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-convert-v4f64.ll | 9 ; CHECK-DAG: xtn2 v[[MID]].4s, v[[RHS]].2d
23 ; CHECK-DAG: xtn2 v[[NA2]].4s, v[[CONV3]].2d
25 ; CHECK-DAG: xtn2 v[[NA0]].4s, v[[CONV1]].2d
27 ; CHECK-DAG: xtn2 v[[TMP1]].8h, v[[NA0]].4s
49 ; CHECK: xtn2
61 ; CHECK-DAG: xtn2 v[[MID]].4s, v[[RHS]].2d
|
| D | vcvt-oversize.ll | 11 ; CHECK-DAG: xtn2 v[[TMP]].8h, v[[MSB]].4s
|
| D | concat_vector-truncate-combine.ll | 35 ; CHECK-NEXT: xtn2.8h v0, v1
|
| D | arm64-vmovn.ll | 33 ;CHECK: xtn2.16b v0, v1
43 ;CHECK: xtn2.8h v0, v1
53 ;CHECK: xtn2.4s v0, v1
|
| D | fp16-v8-instructions.ll | 377 ; CHECK-DAG: xtn2 [[I16]].8h, [[HIF32]]
391 ; CHECK-NEXT: xtn2 [[I16]].8h, [[HIF32]]
404 ; CHECK-DAG: xtn2 [[I16]].8h, [[HIF32]]
418 ; CHECK-NEXT: xtn2 [[I16]].8h, [[HIF32]]
|
| /external/capstone/suite/MC/AArch64/ |
| D | neon-simd-misc.s.cs | 104 0xe0,0x2b,0x21,0x4e = xtn2 v0.16b, v31.8h
105 0x82,0x28,0x61,0x4e = xtn2 v2.8h, v4.4s
106 0x06,0x29,0xa1,0x4e = xtn2 v6.4s, v8.2d
|
| /external/libhevc/common/arm64/ |
| D | ihevc_sao_edge_offset_class1.s | 200 xtn2 v20.16b, v1.8h //vmovn_s16(pi2_tmp_cur_row.val[1])
213 xtn2 v30.16b, v28.8h //II vmovn_s16(pi2_tmp_cur_row.val[1])
246 xtn2 v30.16b, v28.8h //vmovn_s16(pi2_tmp_cur_row.val[1])
|
| D | ihevc_sao_edge_offset_class2.s | 353 xtn2 v20.16b, v22.8h //I vmovn_s16(pi2_tmp_cur_row.val[1])
456 xtn2 v26.16b, v28.8h //II vmovn_s16(pi2_tmp_cur_row.val[1])
467 xtn2 v20.16b, v18.8h //III vmovn_s16(pi2_tmp_cur_row.val[1])
527 xtn2 v20.16b, v5.8h //vmovn_s16(pi2_tmp_cur_row.val[1])
665 xtn2 v28.16b, v30.8h //vmovn_s16(pi2_tmp_cur_row.val[1])
|
| D | ihevc_sao_edge_offset_class3.s | 370 xtn2 v20.16b, v22.8h //I vmovn_s16(pi2_tmp_cur_row.val[1])
480 xtn2 v28.16b, v26.8h //II vmovn_s16(pi2_tmp_cur_row.val[1])
496 xtn2 v20.16b, v22.8h //III vmovn_s16(pi2_tmp_cur_row.val[1])
560 xtn2 v20.16b, v22.8h //vmovn_s16(pi2_tmp_cur_row.val[1])
703 xtn2 v28.16b, v30.8h //vmovn_s16(pi2_tmp_cur_row.val[1])
|
| D | ihevc_sao_edge_offset_class1_chroma.s | 246 xtn2 v20.16b, v28.8h //vmovn_s16(pi2_tmp_cur_row.val[1])
261 xtn2 v30.16b, v28.8h //II vmovn_s16(pi2_tmp_cur_row.val[1])
306 xtn2 v30.16b, v28.8h //vmovn_s16(pi2_tmp_cur_row.val[1])
|
| D | ihevc_sao_edge_offset_class2_chroma.s | 510 xtn2 v20.16b, v18.8h //I vmovn_s16(pi2_tmp_cur_row.val[1])
650 xtn2 v28.16b, v26.8h //II vmovn_s16(pi2_tmp_cur_row.val[1])
679 xtn2 v20.16b, v18.8h //III vmovn_s16(pi2_tmp_cur_row.val[1])
755 xtn2 v20.16b, v18.8h //vmovn_s16(pi2_tmp_cur_row.val[1])
917 xtn2 v28.16b, v26.8h //vmovn_s16(pi2_tmp_cur_row.val[1])
|
| D | ihevc_sao_edge_offset_class3_chroma.s | 488 xtn2 v20.16b, v18.8h //I vmovn_s16(pi2_tmp_cur_row.val[1])
642 xtn2 v28.16b, v26.8h //II vmovn_s16(pi2_tmp_cur_row.val[1])
661 xtn2 v20.16b, v18.8h //III vmovn_s16(pi2_tmp_cur_row.val[1])
746 xtn2 v20.16b, v18.8h //III vmovn_s16(pi2_tmp_cur_row.val[1])
930 xtn2 v28.16b, v30.8h //vmovn_s16(pi2_tmp_cur_row.val[1])
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | concat_vector-truncate-combine.ll | 35 ; CHECK-NEXT: xtn2.8h v0, v1
|
| D | arm64-vmovn.ll | 33 ;CHECK: xtn2.16b v0, v1
43 ;CHECK: xtn2.8h v0, v1
53 ;CHECK: xtn2.4s v0, v1
|
| D | dag-combine-trunc-build-vec.ll | 18 ; CHECK-NEXT: xtn2 v1.16b, v0.8h
|
| D | arm64-convert-v4f64.ll | 49 ; CHECK: xtn2
|
| D | fp16-v8-instructions.ll | 404 ; CHECK-CVT-DAG: xtn2 [[I16]].8h, [[HIF32]]
420 ; CHECK-CVT_DAG: xtn2 [[I16]].8h, [[HIF32]]
434 ; CHECK-CVT-DAG: xtn2 [[I16]].8h, [[HIF32]]
450 ; CHECK-CVT-DAG: xtn2 [[I16]].8h, [[HIF32]]
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-simd-misc.s | 333 xtn2 v0.16b, v31.8h
334 xtn2 v2.8h, v4.4s
335 xtn2 v6.4s, v8.2d
|
| D | arm64-advsimd.s | 2052 xtn2 v14.16b, v14.8h
2054 xtn2 v14.8h, v14.4s
2056 xtn2 v14.4s, v14.2d
2058 ; CHECK: xtn2.16b v14, v14 ; encoding: [0xce,0x29,0x21,0x4e]
2060 ; CHECK: xtn2.8h v14, v14 ; encoding: [0xce,0x29,0x61,0x4e]
2062 ; CHECK: xtn2.4s v14, v14 ; encoding: [0xce,0x29,0xa1,0x4e]
|
| D | neon-diagnostics.s | 5636 xtn2 v1.8b, v9.8h
5637 xtn2 v13.4h, v21.4s
5638 xtn2 v4.2s, v0.2d
|
| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | neon-simd-misc.s | 333 xtn2 v0.16b, v31.8h
334 xtn2 v2.8h, v4.4s
335 xtn2 v6.4s, v8.2d
|
| D | arm64-advsimd.s | 2052 xtn2 v14.16b, v14.8h
2054 xtn2 v14.8h, v14.4s
2056 xtn2 v14.4s, v14.2d
2058 ; CHECK: xtn2.16b v14, v14 ; encoding: [0xce,0x29,0x21,0x4e]
2060 ; CHECK: xtn2.8h v14, v14 ; encoding: [0xce,0x29,0x61,0x4e]
2062 ; CHECK: xtn2.4s v14, v14 ; encoding: [0xce,0x29,0xa1,0x4e]
|
| D | neon-diagnostics.s | 5576 xtn2 v1.8b, v9.8h
5577 xtn2 v13.4h, v21.4s
5578 xtn2 v4.2s, v0.2d
|
| /external/libavc/common/armv8/ |
| D | ih264_iquant_itrans_recon_av8.s | 700 xtn2 v1.8h, v23.4s
702 xtn2 v3.8h, v29.4s
704 xtn2 v5.8h, v27.4s
706 xtn2 v7.8h, v25.4s
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2495 __ xtn2(v0.V16B(), v0.V8H()); in GenerateTestSequenceNEON() local
2496 __ xtn2(v15.V4S(), v4.V2D()); in GenerateTestSequenceNEON() local
2497 __ xtn2(v31.V8H(), v18.V4S()); in GenerateTestSequenceNEON() local
|