Searched refs:zd_1 (Results 1 – 1 of 1) sorted by relevance
| /external/vixl/test/aarch64/ |
| D | test-assembler-sve-aarch64.cc | 4556 ZRegister zd_1 = z0.WithLaneSize(lane_size_in_bits); in IntBinArithHelper() local
4561 __ Mov(zd_1, src_a); in IntBinArithHelper()
4562 (masm.*macro)(zd_1, p0.Merging(), zd_1, src_b); in IntBinArithHelper()
4584 ASSERT_EQUAL_SVE(zd_expected, zd_1); in IntBinArithHelper()
4588 if (!core.HasSVELane(zd_1, lane)) break; in IntBinArithHelper()
4590 ASSERT_EQUAL_SVE_LANE(zd_expected[i], zd_1, lane); in IntBinArithHelper()
4592 ASSERT_EQUAL_SVE_LANE(zn_inputs[i], zd_1, lane); in IntBinArithHelper()
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