| /external/vixl/src/aarch64/ |
| D | macro-assembler-sve-aarch64.cc | 505 const ZRegister& zm, in NoncommutativeArithmeticHelper() argument
511 (this->*fn)(zd, pg, zn, zm); in NoncommutativeArithmeticHelper()
512 } else if (zd.Aliases(zm)) { in NoncommutativeArithmeticHelper()
515 (this->*rev_fn)(zd, pg, zm, zn); in NoncommutativeArithmeticHelper()
519 (this->*fn)(zd, pg, zd, zm); in NoncommutativeArithmeticHelper()
527 const ZRegister& zm, in FPCommutativeArithmeticHelper() argument
534 (this->*fn)(zd, pg, zd, zm); in FPCommutativeArithmeticHelper()
535 } else if (zd.Aliases(zm)) { in FPCommutativeArithmeticHelper()
550 (this->*fn)(scratch, pg, scratch, zm); in FPCommutativeArithmeticHelper()
561 (this->*fn)(zd, pg, zd, zm); in FPCommutativeArithmeticHelper()
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| D | assembler-sve-aarch64.cc | 132 const ZRegister& zm) { in and_() argument
135 VIXL_ASSERT(AreSameFormat(zd, zn, zm)); in and_()
136 Emit(AND_z_zz | Rd(zd) | Rn(zn) | Rm(zm)); in and_()
141 const ZRegister& zm) { in bic() argument
144 VIXL_ASSERT(AreSameFormat(zd, zn, zm)); in bic()
145 Emit(BIC_z_zz | Rd(zd) | Rn(zn) | Rm(zm)); in bic()
150 const ZRegister& zm) { in eor() argument
153 VIXL_ASSERT(AreSameFormat(zd, zn, zm)); in eor()
154 Emit(EOR_z_zz | Rd(zd) | Rn(zn) | Rm(zm)); in eor()
159 const ZRegister& zm) { in orr() argument
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| D | macro-assembler-aarch64.h | 3071 const ZRegister& zm) { \
3075 ASM(zd, pg, zd, zm); \
3076 } else if (zd.Aliases(zm)) { \
3081 ASM(zd, pg, zd, zm); \
3480 void Add(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Add() argument
3483 add(zd, zn, zm); in Add()
3515 void And(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in And() argument
3517 VIXL_ASSERT(AreSameLaneSize(zd, zn, zm)); in And()
3519 and_(zd.VnD(), zn.VnD(), zm.VnD()); in And()
3545 const ZRegister& zm);
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| D | assembler-aarch64.h | 3598 const ZRegister& zm);
3601 void add(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm);
3625 const ZRegister& zm);
3631 void and_(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm);
3652 const ZRegister& zm);
3658 void asr(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm);
3670 const ZRegister& zm);
3682 const ZRegister& zm);
3688 void bic(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm);
3756 const ZRegister& zm);
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| D | simulator-aarch64.cc | 7342 SimVRegister& zm = ReadVRegister(instr->GetRm()); in VisitSVEAddressGeneration() local
7346 mov(vform, temp, zm); in VisitSVEAddressGeneration()
7415 SimVRegister& zm = ReadVRegister(instr->GetRm()); in VisitSVEBitwiseLogicalUnpredicated() local
7439 SVEBitwiseLogicalUnpredicatedHelper(logical_op, kFormatVnD, zd, zn, zm); in VisitSVEBitwiseLogicalUnpredicated()
7493 SimVRegister& zm = ReadVRegister(instr->GetRn()); in VisitSVEBitwiseShiftByVector_Predicated() local
7502 mov(vform, shiftor, zm); in VisitSVEBitwiseShiftByVector_Predicated()
7506 mov(vform, shiftand, zm); in VisitSVEBitwiseShiftByVector_Predicated()
7512 mov(vform, shiftand, zm); in VisitSVEBitwiseShiftByVector_Predicated()
7519 mov(vform, shiftand, zm); in VisitSVEBitwiseShiftByVector_Predicated()
7542 SimVRegister& zm = ReadVRegister(instr->GetRn()); in VisitSVEBitwiseShiftByWideElements_Predicated() local
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| /external/tensorflow/tensorflow/lite/g3doc/inference_with_metadata/task_library/images/ |
| D | prebuilt_task_apis.svg | 1 …zm-1.234375 3.453125l0 -2.765625q-0.296875 -0.140625 -0.828125 -0.140625q-0.71875 0 -1.046875 0.57…
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| /external/tensorflow/tensorflow/lite/g3doc/r1/images/convert/ |
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| /external/python/cpython3/PC/icons/ |
| D | python.svg | 1 …zm-1 .2h.8v.8h-.8v-.8zm-1.139.8h-1v.2h1v-.2z"/><path class="icon-vs-green" d="M16 14H5v-1h11.031c-…
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| D | pyd.svg | 1 …zm-4.266 1.583c-1.296 0-2.35-1.054-2.35-2.35s1.054-2.35 2.35-2.35 2.35 1.054 2.35 2.35-1.054 2.35-…
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| D | pythonw.svg | 1 …zm-1 .2h.8v.8h-.8v-.8zm-1.139.8h-1v.2h1v-.2z"/><path class="st0" d="M3 7h26v19H3z"/><path class="s…
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| D | launcher.svg | 1 …zm-1 .2h.8v.8h-.8v-.8zm-1.139.8h-1v.2h1v-.2z"/><path class="graph-lightgrey" d="M6 5h23v2H6z"/></g…
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| D | setup.svg | 1 …zm-2.486 1.41c.475 0 .863.394.863.879a.87.87 0 0 1-.863.874.868.868 0 0 1-.863-.874c0-.485.386-.87…
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| /external/tensorflow/tensorflow/lite/g3doc/images/convert/ |
| D | workflow.svg | 1 …zm-0.296875 -6.484375q-0.859375 0 -1.375 0.5625q-0.5 0.5625 -0.59375 1.546875l3.734375 0q0 -1.0156…
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| /external/llvm-project/mlir/docs/includes/img/ |
| D | Use-list.svg | 1 …zm-0.140625 -3.671875q-0.890625 0.375 -2.671875 0.625q-1.015625 0.140625 -1.4375 0.328125q-0.42187…
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| D | DefUseChains.svg | 1 …zm-5.390625 -2.65625l5.40625 0q-0.109375 -1.21875 -0.625 -1.828125q-0.78125 -0.953125 -2.03125 -0.…
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| /external/llvm-project/libc/docs/ |
| D | redirectors_schematic.svg | 1 …zm-0.109375 -3.140625q-0.765625 0.3125 -2.296875 0.53125q-0.875 0.125 -1.234375 0.28125q-0.359375 …
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| D | header_gen_scheme.svg | 1 …zm-1.328125 5.65625q0 -0.828125 -0.59375 -1.390625q-0.578125 -0.578125 -1.40625 -0.578125q-0.84375…
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| /external/mesa3d/docs/ |
| D | favicon.svg | 4 …-.37-.751-.14-.1-.24.432-.633-.24-.28-.692.327-.22-.135-.024-.766-.358-.085zm-.447 1.828l.307.048.…
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| /external/tensorflow/tensorflow/compiler/mlir/g3doc/images/ |
| D | mlir-infra.svg | 1 …zm-12.203125 -9.671875l2.296875 0l0 1.265625l0.15625 0q0.375 -0.6875 1.140625 -1.109375q0.765625 -…
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| /external/python/cpython3/Doc/library/ |
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| /external/rust/crates/grpcio-sys/grpc/third_party/cares/cares/ |
| D | Makefile.Watcom | 41 CFLAGS = -3r -mf -hc -zff -zgf -zq -zm -zc -s -fr=con -w2 -fpi -oilrtfm &
132 $(RC) $(DEBUG) -q -r -zm -I..\include $(SYS_INCL) $[@ -fo=$^@
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| /external/mesa3d/src/gallium/drivers/zink/ |
| D | zink_program.c | 117 zink_destroy_shader_module(struct zink_screen *screen, struct zink_shader_module *zm) in zink_destroy_shader_module() argument
119 vkDestroyShaderModule(screen->dev, zm->shader, NULL); in zink_destroy_shader_module()
120 free(zm); in zink_destroy_shader_module()
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| /external/cldr/common/testData/transforms/ |
| D | ja-t-sk-fonipa.txt | 68 zmɪselnɔsc ズミセルノスチ
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