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Searched refs:zt4 (Results 1 – 3 of 3) sorted by relevance

/external/vixl/src/aarch64/
Dmacro-assembler-aarch64.h4975 const ZRegister& zt4, in Ld4b() argument
4980 ld4b(zt1, zt2, zt3, zt4, pg, addr); in Ld4b()
4985 const ZRegister& zt4, in Ld4h() argument
4990 ld4h(zt1, zt2, zt3, zt4, pg, addr); in Ld4h()
4995 const ZRegister& zt4, in Ld4w() argument
5000 ld4w(zt1, zt2, zt3, zt4, pg, addr); in Ld4w()
5005 const ZRegister& zt4, in Ld4d() argument
5010 ld4d(zt1, zt2, zt3, zt4, pg, addr); in Ld4d()
5949 const ZRegister& zt4, in St4b() argument
5954 st4b(zt1, zt2, zt3, zt4, pg, addr); in St4b()
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Dassembler-aarch64.h4675 const ZRegister& zt4,
4683 const ZRegister& zt4,
4691 const ZRegister& zt4,
4699 const ZRegister& zt4,
5497 const ZRegister& zt4,
5505 const ZRegister& zt4,
5513 const ZRegister& zt4,
5521 const ZRegister& zt4,
Dassembler-sve-aarch64.cc4080 const ZRegister& zt4, \
4083 USE(zt2, zt3, zt4); \
4085 VIXL_ASSERT(AreConsecutive(zt1, zt2, zt3, zt4)); \
4086 VIXL_ASSERT(AreSameFormat(zt1, zt2, zt3, zt4)); \
5138 const ZRegister& zt4, \
5141 USE(zt2, zt3, zt4); \
5143 VIXL_ASSERT(AreConsecutive(zt1, zt2, zt3, zt4)); \
5144 VIXL_ASSERT(AreSameFormat(zt1, zt2, zt3, zt4)); \