Home
last modified time | relevance | path

Searched defs:RU (Results 1 – 25 of 42) sorted by relevance

12

/external/llvm-project/llvm/tools/llvm-mca/Views/
DSummaryView.cpp57 for (const std::pair<uint64_t, ResourceUsage> &RU : Desc.Resources) { in onEvent() local
/external/libphonenumber/libphonenumber/test/com/google/i18n/phonenumbers/
DRegionCode.java54 static final String RU = "RU"; field in RegionCode
/external/llvm-project/flang/include/flang/Common/
Dformat.h42 L, O, P, RC, RD, RN, RP, RU, RZ, S, SP, SS, T, TL, TR, X, Z, Colon, Slash, in ENUM_CLASS() argument
/external/llvm/lib/CodeGen/
DRegisterScavenging.cpp110 for (unsigned RU = 0, RUEnd = TRI->getNumRegUnits(); RU != RUEnd; ++RU) { in determineKillsAndDefs() local
/external/llvm-project/flang/include/flang/Parser/
Dformat-specification.h89 RU, enumerator
/external/llvm-project/llvm/tools/verify-uselistorder/
Dverify-uselistorder.cpp319 auto RU = R->use_begin(), RE = R->use_end(); in matches() local
/external/llvm/tools/verify-uselistorder/
Dverify-uselistorder.cpp315 auto RU = R->use_begin(), RE = R->use_end(); in matches() local
/external/compiler-rt/test/tsan/
Ddeadlock_detector_stress_test.cc134 void RU(size_t i) { in RU() function in LockTest
/external/llvm-project/compiler-rt/test/tsan/
Ddeadlock_detector_stress_test.cpp134 void RU(size_t i) { in RU() function in LockTest
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonVectorLoopCarriedReuse.cpp157 raw_ostream &operator<<(raw_ostream &OS, const ReuseValue &RU) { in operator <<()
DBitTracker.cpp825 RegisterRef RU = PI.getOperand(i); in visitPHI() local
857 RegisterRef RU(MO); in visitNonBranch() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonVectorLoopCarriedReuse.cpp258 raw_ostream &operator<<(raw_ostream &OS, const ReuseValue &RU) { in operator <<()
DBitTracker.cpp826 RegisterRef RU = PI.getOperand(i); in visitPHI() local
858 RegisterRef RU(MO); in visitNonBranch() local
/external/llvm/lib/Target/Hexagon/
DBitTracker.cpp812 RegisterRef RU = PI.getOperand(i); in visitPHI() local
846 RegisterRef RU(MO); in visitNonBranch() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DRegisterScavenging.cpp123 for (unsigned RU = 0, RUEnd = TRI->getNumRegUnits(); RU != RUEnd; ++RU) { in determineKillsAndDefs() local
/external/llvm-project/llvm/lib/CodeGen/
DRegisterScavenging.cpp123 for (unsigned RU = 0, RUEnd = TRI->getNumRegUnits(); RU != RUEnd; ++RU) { in determineKillsAndDefs() local
/external/llvm/include/llvm/MC/
DMCRegisterInfo.h556 unsigned RU = MCRI->get(Reg).RegUnits; in MCRegUnitIterator() local
/external/llvm-project/llvm/include/llvm/MC/
DMCRegisterInfo.h680 unsigned RU = MCRI->get(Reg).RegUnits; in MCRegUnitIterator() local
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCRegisterInfo.h679 unsigned RU = MCRI->get(Reg).RegUnits; in MCRegUnitIterator() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Bitcode/Writer/
DValueEnumerator.cpp188 const Use *RU = R.first; in predictValueUseListOrderImpl() local
/external/llvm/lib/Bitcode/Writer/
DValueEnumerator.cpp158 const Use *RU = R.first; in predictValueUseListOrderImpl() local
/external/llvm-project/llvm/utils/TableGen/
DCodeGenRegisters.cpp1095 const RegUnit &RU = RegBank.getRegUnit(*UnitI); in buildRegUnitSet() local
2083 for (unsigned RU : RegUnits) { in computeRegUnitLaneMasks() local
DRegisterInfoEmitter.cpp250 const RegUnit &RU = RegBank.getRegUnit(UnitIdx); in EmitRegUnitPressure() local
/external/llvm/utils/TableGen/
DRegisterInfoEmitter.cpp232 const RegUnit &RU = RegBank.getRegUnit(UnitIdx); in EmitRegUnitPressure() local
/external/llvm-project/llvm/lib/Bitcode/Writer/
DValueEnumerator.cpp219 const Use *RU = R.first; in predictValueUseListOrderImpl() local

12