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/external/rust/crates/ahash/smhasher/
DahashOutput.txt91 Testing collisions (low 32-bit) - Expected 0.3, actual 0 (0.00x)
92 Testing collisions (low 19-25 bits) - Worst is 25 bits: 39/38 (1.02x)
93 Testing collisions (low 12-bit) - Expected 46547.0, actual 46547 (1.00x)
94 Testing collisions (low 8-bit) - Expected 50387.0, actual 50387 (1.00x)
103 Testing collisions (low 32-bit) - Expected 188.2, actual 201 (1.07x) (13)
104 Testing collisions (low 24-35 bits) - Worst is 32 bits: 201/188 (1.07x)
105 Testing collisions (low 12-bit) - Expected 1267530.0, actual 1267530 (1.00x)
106 Testing collisions (low 8-bit) - Expected 1271370.0, actual 1271370 (1.00x)
115 Testing collisions (low 32-bit) - Expected 2373.0, actual 2295 (0.97x)
116 Testing collisions (low 25-38 bits) - Worst is 30 bits: 9493/9492 (1.00x)
[all …]
DfallbackOutput.txt91 Testing collisions (low 32-bit) - Expected 0.6, actual 1 (1.67x) (1)
92 Testing collisions (low 19-26 bits) - Worst is 20 bits: 1168/2445 (0.48x)
93 Testing collisions (low 12-bit) - Expected 50643.0, actual 46547 (0.92x)
94 Testing collisions (low 8-bit) - Expected 50643.0, actual 50387 (0.99x) (-256)
103 Testing collisions (low 32-bit) - Expected 376.5, actual 184 (0.49x)
104 Testing collisions (low 24-36 bits) - Worst is 34 bits: 52/94 (0.55x)
105 Testing collisions (low 12-bit) - Expected 1271626.0, actual 1267530 (1.00x) (-4096)
106 Testing collisions (low 8-bit) - Expected 1271626.0, actual 1271370 (1.00x) (-256)
115 Testing collisions (low 32-bit) - Expected 4746.0, actual 2445 (0.52x)
116 Testing collisions (low 26-39 bits) - Worst is 34 bits: 630/1186 (0.53x)
[all …]
/external/clang/test/CodeGen/
Daarch64-neon-vcombine.c7 // CHECK-LABEL: define <16 x i8> @test_vcombine_s8(<8 x i8> %low, <8 x i8> %high) #0 {
8 // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> <i32 0, i32…
10 int8x16_t test_vcombine_s8(int8x8_t low, int8x8_t high) { in test_vcombine_s8() argument
11 return vcombine_s8(low, high); in test_vcombine_s8()
14 // CHECK-LABEL: define <8 x i16> @test_vcombine_s16(<4 x i16> %low, <4 x i16> %high) #0 {
15 // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> <i32 0, i3…
17 int16x8_t test_vcombine_s16(int16x4_t low, int16x4_t high) { in test_vcombine_s16() argument
18 return vcombine_s16(low, high); in test_vcombine_s16()
21 // CHECK-LABEL: define <4 x i32> @test_vcombine_s32(<2 x i32> %low, <2 x i32> %high) #0 {
22 // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> %low, <2 x i32> %high, <4 x i32> <i32 0, i3…
[all …]
/external/llvm-project/clang/test/CodeGen/
Daarch64-neon-vcombine.c7 // CHECK-LABEL: define <16 x i8> @test_vcombine_s8(<8 x i8> %low, <8 x i8> %high) #0 {
8 // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> <i32 0, i32…
10 int8x16_t test_vcombine_s8(int8x8_t low, int8x8_t high) { in test_vcombine_s8() argument
11 return vcombine_s8(low, high); in test_vcombine_s8()
14 // CHECK-LABEL: define <8 x i16> @test_vcombine_s16(<4 x i16> %low, <4 x i16> %high) #0 {
15 // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> <i32 0, i3…
17 int16x8_t test_vcombine_s16(int16x4_t low, int16x4_t high) { in test_vcombine_s16() argument
18 return vcombine_s16(low, high); in test_vcombine_s16()
21 // CHECK-LABEL: define <4 x i32> @test_vcombine_s32(<2 x i32> %low, <2 x i32> %high) #0 {
22 // CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> %low, <2 x i32> %high, <4 x i32> <i32 0, i3…
[all …]
/external/eigen/unsupported/Eigen/CXX11/src/Tensor/
DTensorUInt128.h31 template <typename HIGH = uint64_t, typename LOW = uint64_t>
35 LOW low; member
39 …nsorUInt128(const TensorUInt128<OTHER_HIGH, OTHER_LOW>& other) : high(other.high), low(other.low) { in TensorUInt128()
41 EIGEN_STATIC_ASSERT(sizeof(OTHER_LOW) <= sizeof(LOW), YOU_MADE_A_PROGRAMMING_MISTAKE); in TensorUInt128()
48 EIGEN_STATIC_ASSERT(sizeof(OTHER_LOW) <= sizeof(LOW), YOU_MADE_A_PROGRAMMING_MISTAKE);
50 low = other.low;
56 explicit TensorUInt128(const T& x) : high(0), low(x) { in TensorUInt128()
62 TensorUInt128(HIGH y, LOW x) : high(y), low(x) { } in TensorUInt128()
64 EIGEN_DEVICE_FUNC EIGEN_ALWAYS_INLINE operator LOW() const { in LOW() function
65 return low; in LOW()
[all …]
/external/compiler-rt/lib/builtins/
Dudivmoddi4.c45 *rem = n.s.low % d.s.low; in __udivmoddi4()
46 return n.s.low / d.s.low; in __udivmoddi4()
53 *rem = n.s.low; in __udivmoddi4()
57 if (d.s.low == 0) in __udivmoddi4()
66 *rem = n.s.high % d.s.low; in __udivmoddi4()
67 return n.s.high / d.s.low; in __udivmoddi4()
70 if (n.s.low == 0) in __udivmoddi4()
79 r.s.low = 0; in __udivmoddi4()
92 r.s.low = n.s.low; in __udivmoddi4()
113 q.s.low = 0; in __udivmoddi4()
[all …]
Dudivmodti4.c47 *rem = n.s.low % d.s.low; in __udivmodti4()
48 return n.s.low / d.s.low; in __udivmodti4()
55 *rem = n.s.low; in __udivmodti4()
59 if (d.s.low == 0) in __udivmodti4()
68 *rem = n.s.high % d.s.low; in __udivmodti4()
69 return n.s.high / d.s.low; in __udivmodti4()
72 if (n.s.low == 0) in __udivmodti4()
81 r.s.low = 0; in __udivmodti4()
94 r.s.low = n.s.low; in __udivmodti4()
115 q.s.low = 0; in __udivmodti4()
[all …]
/external/llvm-project/compiler-rt/lib/builtins/
Dudivmoddi4.c44 *rem = n.s.low % d.s.low; in __udivmoddi4()
45 return n.s.low / d.s.low; in __udivmoddi4()
51 *rem = n.s.low; in __udivmoddi4()
55 if (d.s.low == 0) { in __udivmoddi4()
61 *rem = n.s.high % d.s.low; in __udivmoddi4()
62 return n.s.high / d.s.low; in __udivmoddi4()
65 if (n.s.low == 0) { in __udivmoddi4()
71 r.s.low = 0; in __udivmoddi4()
81 r.s.low = n.s.low; in __udivmoddi4()
100 q.s.low = 0; in __udivmoddi4()
[all …]
/external/mesa3d/src/freedreno/registers/mdp/
Dmdp5.xml14 <bitfield name="STEP" low="0" high="15" type="uint"/>
15 <bitfield name="MINOR" low="16" high="27" type="uint"/>
16 <bitfield name="MAJOR" low="28" high="31" type="uint"/>
142 <bitfield name="CLIENT0" low="0" high="7" type="uint"/>
143 <bitfield name="CLIENT1" low="8" high="15" type="uint"/>
144 <bitfield name="CLIENT2" low="16" high="23" type="uint"/>
148 <bitfield name="STEP" low="0" high="15" type="uint"/>
149 <bitfield name="MINOR" low="16" high="27" type="uint"/>
150 <bitfield name="MAJOR" low="28" high="31" type="uint"/>
154 <bitfield name="INTF0" low="0" high="7" type="mdp5_intf_type"/>
[all …]
/external/eigen/test/
Dnullary.cpp37 void check_extremity_accuracy(const VectorType &v, const typename VectorType::Scalar &low, const ty… in check_extremity_accuracy() argument
52 …Scalar ref = (low*RealScalar(size-i-1))/RealScalar(size-1) + (high*RealScalar(i))/RealScalar(size-… in check_extremity_accuracy()
56 …((v(i)-ref)/ref) << " ; required precision: " << prec << " ; range: " << low << "," << high << "… in check_extremity_accuracy()
57 …VERIFY(internal::isApprox(v(i), (low*RealScalar(size-i-1))/RealScalar(size-1) + (high*RealScalar(i… in check_extremity_accuracy()
72 Scalar low = (size == 1 ? high : internal::random<Scalar>(-500,500)); in testVectorType() local
73 if (low>high) std::swap(low,high); in testVectorType()
75 // check low==high in testVectorType()
77 low = high; in testVectorType()
78 // check abs(low) >> abs(high) in testVectorType()
80 …low = -internal::random<Scalar>(1,2) * RealScalar(std::pow(RealScalar(10),std::numeric_limits<Real… in testVectorType()
[all …]
/external/selinux/libsepol/src/
Dport_record.c9 /* Low - High range. Same for single ports. */
10 int low, high; member
20 /* Low - High range. Same for single ports. */
21 int low, high; member
29 int low, int high, int proto, in sepol_port_key_create() argument
41 tmp_key->low = low; in sepol_port_key_create()
52 int *low, int *high, int *proto) in hidden_def()
55 *low = key->low; in hidden_def()
68 (handle, port->low, port->high, port->proto, key_ptr) < 0) { in hidden_def()
72 port->low, port->high); in hidden_def()
[all …]
Dibpkey_record.c16 /* Low - High range. Same for single ibpkeys. */
17 int low, high; member
27 /* Low - High range. Same for single ibpkeys. */
28 int low, high; member
101 int low, int high, in sepol_ibpkey_key_create() argument
115 tmp_key->low = low; in sepol_ibpkey_key_create()
127 subnet_prefix, low, high); in sepol_ibpkey_key_create()
134 uint64_t *subnet_prefix, int *low, int *high) in hidden_def()
137 *low = key->low; in hidden_def()
152 (handle, subnet_prefix_str, ibpkey->low, ibpkey->high, key_ptr) < 0) { in hidden_def()
[all …]
/external/mesa3d/src/freedreno/registers/adreno/
Dadreno_pm4.xml513 <bitfield name="DST_OFF" low="0" high="15" type="uint"/>
514 <bitfield name="STATE_SRC" low="16" high="18" type="adreno_state_src"/>
515 <bitfield name="STATE_BLOCK" low="19" high="21" type="adreno_state_block"/>
516 <bitfield name="NUM_UNIT" low="22" high="31" type="uint"/>
519 <bitfield name="STATE_TYPE" low="0" high="1" type="adreno_state_type"/>
520 <bitfield name="EXT_SRC_ADDR" low="2" high="31" shr="2"/>
593 <bitfield name="DST_OFF" low="0" high="13" type="uint"/>
594 <bitfield name="STATE_SRC" low="16" high="17" type="a4xx_state_src"/>
595 <bitfield name="STATE_BLOCK" low="18" high="21" type="a4xx_state_block"/>
596 <bitfield name="NUM_UNIT" low="22" high="31" type="uint"/>
[all …]
Da3xx.xml799 <bitfield name="NUM_USER_CLIP_PLANES" low="26" high="28" type="uint"/>
802 <bitfield name="HORZ" low="0" high="9" type="uint"/>
803 <bitfield name="VERT" low="10" high="19" type="uint"/>
812 <bitfield name="MIN" low="0" high="15" type="ufixed" radix="4"/>
813 <bitfield name="MAX" low="16" high="31" type="ufixed" radix="4"/>
817 <bitfield name="VAL" low="0" high="23" type="fixed" radix="20"/>
827 <bitfield name="LINEHALFWIDTH" low="3" high="10" radix="2" type="fixed"/>
832 <bitfield name="RENDER_MODE" low="4" high="7" type="a3xx_render_mode"/>
833 <bitfield name="MSAA_SAMPLES" low="8" high="11" type="a3xx_msaa_samples"/>
834 <bitfield name="RASTER_MODE" low="12" high="15"/>
[all …]
Da6xx.xml176 <bitfield name="BASE_ADDR" low="0" high="17"/>
177 <bitfield name="MASK_LEN" low="18" high="30"/>
989 RB level cmdstream.. it's possible that it is a low threshold
996 <bitfield name="RB_LO" low="0" high="7" shr="2"/>
997 <bitfield name="RB_HI" low="8" high="15" shr="2"/>
998 <bitfield name="IB1_START" low="16" high="23" shr="2"/>
999 <bitfield name="IB2_START" low="24" high="31" shr="2"/>
1003 low bits identify where CP_SET_DRAW_STATE stateobj
1013 <bitfield name="SDS_START" low="0" high="8" shr="2"/>
1015 <bitfield name="ROQ_SIZE" low="16" high="31" shr="2"/>
[all …]
/external/llvm-project/llvm/test/CodeGen/SystemZ/
Dinsert-06.ll1 ; Test insertions of i32s into the low half of an i64.
11 %low = zext i32 %b to i64
13 %res = or i64 %high, %low
23 %low = zext i32 %b to i64
25 %res = or i64 %low, %high
35 %low = and i64 %b, 4294967295
37 %res = or i64 %high, %low
47 %low = and i64 %b, 4294967295
49 %res = or i64 %low, %high
53 ; Unary operations can be done directly into the low half.
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dinsert-06.ll1 ; Test insertions of i32s into the low half of an i64.
11 %low = zext i32 %b to i64
13 %res = or i64 %high, %low
23 %low = zext i32 %b to i64
25 %res = or i64 %low, %high
35 %low = and i64 %b, 4294967295
37 %res = or i64 %high, %low
47 %low = and i64 %b, 4294967295
49 %res = or i64 %low, %high
53 ; Unary operations can be done directly into the low half.
[all …]
/external/tensorflow/tensorflow/python/ops/distributions/
Duniform.py38 """Uniform distribution with `low` and `high` parameters.
51 - `low = a`,
57 The parameters `low` and `high` must be shaped in a way that supports
58 broadcasting (e.g., `high - low` is a valid operation).
64 u1 = Uniform(low=3.0, high=4.0) # a single uniform distribution [3, 4]
65 u2 = Uniform(low=[1.0, 2.0],
67 u3 = Uniform(low=[[1.0, 2.0],
75 u1 = Uniform(low=3.0, high=[5.0, 6.0, 7.0]) # 3 distributions
89 low=0., argument
97 low: Floating point tensor, lower boundary of the output interval. Must
[all …]
/external/llvm-project/lldb/source/Plugins/Process/Utility/
Dlldb-x86-register-enums.h176 lldb_r8d_x86_64, // Low 32 bits of r8
177 lldb_r9d_x86_64, // Low 32 bits of r9
178 lldb_r10d_x86_64, // Low 32 bits of r10
179 lldb_r11d_x86_64, // Low 32 bits of r11
180 lldb_r12d_x86_64, // Low 32 bits of r12
181 lldb_r13d_x86_64, // Low 32 bits of r13
182 lldb_r14d_x86_64, // Low 32 bits of r14
183 lldb_r15d_x86_64, // Low 32 bits of r15
192 lldb_r8w_x86_64, // Low 16 bits of r8
193 lldb_r9w_x86_64, // Low 16 bits of r9
[all …]
/external/rust/crates/rand/src/distributions/
Duniform.rs53 //! `low < high`). The example below merely wraps another back-end.
73 //! fn new<B1, B2>(low: B1, high: B2) -> Self
77 //! UniformMyF32(UniformFloat::<f32>::new(low.borrow().0, high.borrow().0))
79 //! fn new_inclusive<B1, B2>(low: B1, high: B2) -> Self
83 //! UniformSampler::new(low, high)
94 //! let (low, high) = (MyF32(17.0f32), MyF32(22.0f32));
95 //! let uniform = Uniform::new(low, high);
140 /// generated by the RNG than the low bits, since with some RNGs the low-bits
143 /// Implementations must sample in `[low, high)` range for
144 /// `Uniform::new(low, high)`, i.e., excluding `high`. In particular, care must
[all …]
/external/ltp/testcases/open_posix_testsuite/Documentation/
DCOVERAGE.threads32 pthread_condattr_destroy YES LOW
33 pthread_condattr_init YES LOW
34 pthread_condattr_getpshared YES LOW
35 pthread_condattr_setpshared YES LOW
70 pthread_atfork YES LOW
78 pthread_mutexattr_getpshared YES LOW
79 pthread_mutexattr_setpshared YES LOW
80 pthread_rwlock_destroy YES LOW
81 pthread_rwlock_init YES LOW
82 pthread_rwlock_rdlock YES LOW
[all …]
/external/gemmlowp/meta/generators/
Dmul_1x8_Mx8_neon.py63 emitter.EmitVLoadA('1.32', [emitter.AllLanes(registers.Low(register)),
112 emitter.EmitVPadd('u32', registers.Low(aggregator),
113 registers.Low(aggregator), registers.High(aggregator))
116 emitter.EmitVPadd('u32', registers.Low(temp), registers.Low(aggregators[0]),
117 registers.Low(aggregators[1]))
118 emitter.EmitVPadd('u32', registers.High(temp), registers.Low(aggregators[2]),
119 registers.Low(aggregators[3]))
122 temp_2 = registers.Low(aggregators[1])
123 emitter.EmitVPadd('u32', temp_2, registers.Low(aggregators[4]),
124 registers.Low(aggregators[4]))
[all …]
/external/strace/debian/
Dchangelog1 strace (4.25-1) experimental; urgency=low
92 strace (4.12-1) unstable; urgency=low
103 strace (4.11-1) unstable; urgency=low
137 strace (4.10-1) unstable; urgency=low
171 strace (4.8-1.1) unstable; urgency=low
187 strace (4.8-1) experimental; urgency=low
195 strace (4.7-1) experimental; urgency=low
205 strace (4.6-1) unstable; urgency=low
214 strace (4.5.20-2.3) unstable; urgency=low
222 strace (4.5.20-2.2) unstable; urgency=low
[all …]
Dchangelog.in1 strace (@PACKAGE_VERSION@-1) experimental; urgency=low
92 strace (4.12-1) unstable; urgency=low
103 strace (4.11-1) unstable; urgency=low
137 strace (4.10-1) unstable; urgency=low
171 strace (4.8-1.1) unstable; urgency=low
187 strace (4.8-1) experimental; urgency=low
195 strace (4.7-1) experimental; urgency=low
205 strace (4.6-1) unstable; urgency=low
214 strace (4.5.20-2.3) unstable; urgency=low
222 strace (4.5.20-2.2) unstable; urgency=low
[all …]
/external/icu/icu4c/source/data/translit/
Dmy_my_FONIPA.txt45 $low = \u0300;
46 $coda = [$creaky $high $low ɴ ʔ ə]; # TODO: remove if unused
54 # Hmm, what would happen if the syllable ending in kinzi had non-low tone?
85 င\u103A → ɪ $low ɴ;
89 ဉ\u103A → ɪ $low ɴ;
92 ည\u103A → ɛ $low;
95 ဏ\u103A → a $low ɴ;
99 န\u103A → a $low ɴ;
103 မ\u103A → a $low ɴ;
106 ယ\u103A → ɛ $low;
[all …]

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