Searched refs:BRW_OPCODE_BFREV (Results 1 – 11 of 11) sorted by relevance
| /external/mesa3d/src/intel/compiler/ |
| D | brw_eu.cpp | 630 { BRW_OPCODE_BFREV, 23, "bfrev", 1, 1, GEN_GE(GEN7) & GEN_LT(GEN12) },
631 { BRW_OPCODE_BFREV, 119, "bfrev", 1, 1, GEN_GE(GEN12) },
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| D | brw_eu_defines.h | 222 BRW_OPCODE_BFREV, /**< Gen7+ */ enumerator
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| D | brw_shader.cpp | 936 case BRW_OPCODE_BFREV: in can_do_source_mods()
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| D | brw_ir_performance.cpp | 307 case BRW_OPCODE_BFREV: in instruction_desc()
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| D | brw_vec4_generator.cpp | 1632 case BRW_OPCODE_BFREV: in generate_code()
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| D | brw_fs_generator.cpp | 2126 case BRW_OPCODE_BFREV: in generate_code()
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| D | brw_fs.cpp | 6528 case BRW_OPCODE_BFREV: in get_lowered_simd_width()
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| /external/igt-gpu-tools/assembler/ |
| D | lex.l | 107 "bfrev" { yylval.integer = BRW_OPCODE_BFREV; return BFREV; }
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| D | brw_defines.h | 652 BRW_OPCODE_BFREV = 23, enumerator
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| /external/mesa3d/src/intel/tools/ |
| D | i965_lex.l | 60 bfrev { yylval.integer = BRW_OPCODE_BFREV; return BFREV; }
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| D | i965_gram.y | 104 case BRW_OPCODE_BFREV: in i965_asm_unary_instruction()
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