| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 850 enum CondCode { enum
883 inline bool isSignedIntSetCC(CondCode Code) { in isSignedIntSetCC()
889 inline bool isUnsignedIntSetCC(CondCode Code) { in isUnsignedIntSetCC()
896 inline bool isTrueWhenEqual(CondCode Cond) { in isTrueWhenEqual()
903 inline unsigned getUnorderedFlavor(CondCode Cond) { in getUnorderedFlavor()
909 CondCode getSetCCInverse(CondCode Operation, bool isInteger);
913 CondCode getSetCCSwappedOperands(CondCode Operation);
918 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger);
923 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger);
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| D | Analysis.h | 89 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
93 ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
98 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1047 enum CondCode { enum
1080 inline bool isSignedIntSetCC(CondCode Code) { in isSignedIntSetCC()
1086 inline bool isUnsignedIntSetCC(CondCode Code) { in isUnsignedIntSetCC()
1093 inline bool isTrueWhenEqual(CondCode Cond) { in isTrueWhenEqual()
1100 inline unsigned getUnorderedFlavor(CondCode Cond) { in getUnorderedFlavor()
1106 CondCode getSetCCInverse(CondCode Operation, EVT Type);
1115 CondCode getSetCCInverse(CondCode Operation, bool isIntegerLike);
1120 CondCode getSetCCSwappedOperands(CondCode Operation);
1125 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, EVT Type);
1130 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, EVT Type);
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| D | Analysis.h | 108 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
112 ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
117 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1263 enum CondCode { enum
1296 inline bool isSignedIntSetCC(CondCode Code) { in isSignedIntSetCC()
1302 inline bool isUnsignedIntSetCC(CondCode Code) { in isUnsignedIntSetCC()
1309 inline bool isTrueWhenEqual(CondCode Cond) { return ((int)Cond & 1) != 0; } in isTrueWhenEqual()
1314 inline unsigned getUnorderedFlavor(CondCode Cond) { in getUnorderedFlavor()
1320 CondCode getSetCCInverse(CondCode Operation, EVT Type);
1329 CondCode getSetCCInverse(CondCode Operation, bool isIntegerLike);
1334 CondCode getSetCCSwappedOperands(CondCode Operation);
1339 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, EVT Type);
1344 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, EVT Type);
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| D | Analysis.h | 104 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
108 ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
113 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ConditionOptimizer.cpp | 102 using CmpInfo = std::tuple<int, unsigned, AArch64CC::CondCode>;
112 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp);
114 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To,
229 static AArch64CC::CondCode getAdjustedCmp(AArch64CC::CondCode Cmp) { in getAdjustedCmp()
243 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp()
274 AArch64CC::CondCode Cmp; in modifyCmp()
305 static bool parseCond(ArrayRef<MachineOperand> Cond, AArch64CC::CondCode &CC) { in parseCond()
309 CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); in parseCond()
319 AArch64CC::CondCode Cmp, MachineInstr *To, int ToImm) in adjustTo()
376 AArch64CC::CondCode HeadCmp; in runOnMachineFunction()
[all …]
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| D | AArch64SpeculationHardening.cpp | 154 AArch64CC::CondCode &CondCode) const;
156 AArch64CC::CondCode &CondCode, DebugLoc DL) const;
188 AArch64CC::CondCode &CondCode) const { in endsWithCondControlFlow()
213 CondCode = AArch64CC::CondCode(analyzeBranchCondCode[0].getImm()); in endsWithCondControlFlow()
226 MachineBasicBlock &SplitEdgeBB, AArch64CC::CondCode &CondCode, in insertTrackingCode() argument
235 .addImm(CondCode); in insertTrackingCode()
247 AArch64CC::CondCode CondCode; in instrumentControlFlow() local
249 if (!endsWithCondControlFlow(MBB, TBB, FBB, CondCode)) { in instrumentControlFlow()
256 AArch64CC::CondCode InvCondCode = AArch64CC::getInvertedCondCode(CondCode); in instrumentControlFlow()
268 insertTrackingCode(*SplitEdgeTBB, CondCode, DL); in instrumentControlFlow()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ConditionOptimizer.cpp | 95 typedef std::tuple<int, unsigned, AArch64CC::CondCode> CmpInfo;
101 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp);
103 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To,
218 static AArch64CC::CondCode getAdjustedCmp(AArch64CC::CondCode Cmp) { in getAdjustedCmp()
232 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp()
263 AArch64CC::CondCode Cmp; in modifyCmp()
294 static bool parseCond(ArrayRef<MachineOperand> Cond, AArch64CC::CondCode &CC) { in parseCond()
298 CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); in parseCond()
308 AArch64CC::CondCode Cmp, MachineInstr *To, int ToImm) in adjustTo()
365 AArch64CC::CondCode HeadCmp; in runOnMachineFunction()
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64SpeculationHardening.cpp | 154 AArch64CC::CondCode &CondCode) const;
156 AArch64CC::CondCode &CondCode, DebugLoc DL) const;
188 AArch64CC::CondCode &CondCode) const { in endsWithCondControlFlow()
213 CondCode = AArch64CC::CondCode(analyzeBranchCondCode[0].getImm()); in endsWithCondControlFlow()
226 MachineBasicBlock &SplitEdgeBB, AArch64CC::CondCode &CondCode, in insertTrackingCode() argument
235 .addImm(CondCode); in insertTrackingCode()
247 AArch64CC::CondCode CondCode; in instrumentControlFlow() local
249 if (!endsWithCondControlFlow(MBB, TBB, FBB, CondCode)) { in instrumentControlFlow()
256 AArch64CC::CondCode InvCondCode = AArch64CC::getInvertedCondCode(CondCode); in instrumentControlFlow()
268 insertTrackingCode(*SplitEdgeTBB, CondCode, DL); in instrumentControlFlow()
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| D | AArch64ConditionOptimizer.cpp | 102 using CmpInfo = std::tuple<int, unsigned, AArch64CC::CondCode>;
112 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp);
114 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To,
230 static AArch64CC::CondCode getAdjustedCmp(AArch64CC::CondCode Cmp) { in getAdjustedCmp()
244 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp()
275 AArch64CC::CondCode Cmp; in modifyCmp()
304 static bool parseCond(ArrayRef<MachineOperand> Cond, AArch64CC::CondCode &CC) { in parseCond()
308 CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); in parseCond()
318 AArch64CC::CondCode Cmp, MachineInstr *To, int ToImm) in adjustTo()
375 AArch64CC::CondCode HeadCmp; in runOnMachineFunction()
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| /external/llvm-project/llvm/lib/Target/VE/ |
| D | VE.h | 42 enum CondCode { enum
85 inline static const char *VECondCodeToString(VECC::CondCode CC) { in VECondCodeToString()
114 inline static VECC::CondCode stringToVEICondCode(StringRef S) { in stringToVEICondCode()
115 return StringSwitch<VECC::CondCode>(S) in stringToVEICondCode()
128 inline static VECC::CondCode stringToVEFCondCode(StringRef S) { in stringToVEFCondCode()
129 return StringSwitch<VECC::CondCode>(S) in stringToVEFCondCode()
150 inline static unsigned VECondCodeToVal(VECC::CondCode CC) { in VECondCodeToVal()
201 inline static VECC::CondCode VEValToCondCode(unsigned Val, bool IsInteger) { in VEValToCondCode()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.cpp | 38 enum CondCode { enum
134 static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc) in GetCondFromBranchOpc()
147 static inline unsigned GetCondBranchFromCond(XCore::CondCode CC) in GetCondBranchFromCond()
158 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC) in GetOppositeBranchCondition()
213 XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode()); in analyzeBranch()
234 XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc); in analyzeBranch()
288 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in InsertBranch()
297 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in InsertBranch()
405 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm())); in ReverseBranchCondition()
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| /external/llvm-project/llvm/lib/Target/Lanai/ |
| D | LanaiCondCode.h | 10 enum CondCode { enum
34 inline static StringRef lanaiCondCodeToString(LPCC::CondCode CC) { in lanaiCondCodeToString()
73 inline static CondCode suffixToLanaiCondCode(StringRef S) { in suffixToLanaiCondCode()
74 return StringSwitch<CondCode>(S) in suffixToLanaiCondCode()
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| D | LanaiInstrInfo.cpp | 123 static LPCC::CondCode getOppositeCondition(LPCC::CondCode CC) { in getOppositeCondition()
351 SmallVector<std::pair<MachineOperand *, LPCC::CondCode>, 4> in optimizeCompareInstr()
371 LPCC::CondCode CC; in optimizeCompareInstr()
372 CC = (LPCC::CondCode)Instr.getOperand(IO - 1).getImm(); in optimizeCompareInstr()
375 LPCC::CondCode NewCC = getOppositeCondition(CC); in optimizeCompareInstr()
522 unsigned CondCode = MI.getOperand(3).getImm(); in optimizeSelect() local
524 NewMI.addImm(getOppositeCondition(LPCC::CondCode(CondCode))); in optimizeSelect()
526 NewMI.addImm(CondCode); in optimizeSelect()
625 LPCC::CondCode BranchCond = in analyzeBranch()
626 static_cast<LPCC::CondCode>(Instruction->getOperand(1).getImm()); in analyzeBranch()
[all …]
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiCondCode.h | 10 enum CondCode { enum
34 inline static StringRef lanaiCondCodeToString(LPCC::CondCode CC) { in lanaiCondCodeToString()
73 inline static CondCode suffixToLanaiCondCode(StringRef S) { in suffixToLanaiCondCode()
74 return StringSwitch<CondCode>(S) in suffixToLanaiCondCode()
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| D | LanaiInstrInfo.cpp | 125 static LPCC::CondCode getOppositeCondition(LPCC::CondCode CC) { in getOppositeCondition()
353 SmallVector<std::pair<MachineOperand *, LPCC::CondCode>, 4> in optimizeCompareInstr()
373 LPCC::CondCode CC; in optimizeCompareInstr()
374 CC = (LPCC::CondCode)Instr.getOperand(IO - 1).getImm(); in optimizeCompareInstr()
377 LPCC::CondCode NewCC = getOppositeCondition(CC); in optimizeCompareInstr()
525 unsigned CondCode = MI.getOperand(3).getImm(); in optimizeSelect() local
527 NewMI.addImm(getOppositeCondition(LPCC::CondCode(CondCode))); in optimizeSelect()
529 NewMI.addImm(CondCode); in optimizeSelect()
628 LPCC::CondCode BranchCond = in analyzeBranch()
629 static_cast<LPCC::CondCode>(Instruction->getOperand(1).getImm()); in analyzeBranch()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiCondCode.h | 10 enum CondCode { enum
34 inline static StringRef lanaiCondCodeToString(LPCC::CondCode CC) { in lanaiCondCodeToString()
73 inline static CondCode suffixToLanaiCondCode(StringRef S) { in suffixToLanaiCondCode()
74 return StringSwitch<CondCode>(S) in suffixToLanaiCondCode()
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| D | LanaiInstrInfo.cpp | 123 static LPCC::CondCode getOppositeCondition(LPCC::CondCode CC) { in getOppositeCondition()
351 SmallVector<std::pair<MachineOperand *, LPCC::CondCode>, 4> in optimizeCompareInstr()
371 LPCC::CondCode CC; in optimizeCompareInstr()
372 CC = (LPCC::CondCode)Instr.getOperand(IO - 1).getImm(); in optimizeCompareInstr()
375 LPCC::CondCode NewCC = getOppositeCondition(CC); in optimizeCompareInstr()
522 unsigned CondCode = MI.getOperand(3).getImm(); in optimizeSelect() local
524 NewMI.addImm(getOppositeCondition(LPCC::CondCode(CondCode))); in optimizeSelect()
526 NewMI.addImm(CondCode); in optimizeSelect()
625 LPCC::CondCode BranchCond = in analyzeBranch()
626 static_cast<LPCC::CondCode>(Instruction->getOperand(1).getImm()); in analyzeBranch()
[all …]
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| /external/llvm-project/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.cpp | 37 enum CondCode { enum
133 static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc) in GetCondFromBranchOpc()
146 static inline unsigned GetCondBranchFromCond(XCore::CondCode CC) in GetCondBranchFromCond()
157 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC) in GetOppositeBranchCondition()
212 XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode()); in analyzeBranch()
233 XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc); in analyzeBranch()
289 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
298 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
406 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm())); in reverseBranchCondition()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.cpp | 37 enum CondCode { enum
133 static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc) in GetCondFromBranchOpc()
146 static inline unsigned GetCondBranchFromCond(XCore::CondCode CC) in GetCondBranchFromCond()
157 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC) in GetOppositeBranchCondition()
212 XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode()); in analyzeBranch()
233 XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc); in analyzeBranch()
289 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
298 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
406 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm())); in reverseBranchCondition()
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| /external/llvm-project/llvm/lib/Target/MSP430/AsmParser/ |
| D | MSP430AsmParser.cpp | 335 unsigned CondCode; in parseJccInstruction() local
337 CondCode = MSP430CC::COND_NE; in parseJccInstruction()
339 CondCode = MSP430CC::COND_E; in parseJccInstruction()
341 CondCode = MSP430CC::COND_LO; in parseJccInstruction()
343 CondCode = MSP430CC::COND_HS; in parseJccInstruction()
345 CondCode = MSP430CC::COND_N; in parseJccInstruction()
347 CondCode = MSP430CC::COND_GE; in parseJccInstruction()
349 CondCode = MSP430CC::COND_L; in parseJccInstruction()
351 CondCode = MSP430CC::COND_NONE; in parseJccInstruction()
355 if (CondCode == (unsigned)MSP430CC::COND_NONE) in parseJccInstruction()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/AsmParser/ |
| D | MSP430AsmParser.cpp | 318 unsigned CondCode; in parseJccInstruction() local
320 CondCode = MSP430CC::COND_NE; in parseJccInstruction()
322 CondCode = MSP430CC::COND_E; in parseJccInstruction()
324 CondCode = MSP430CC::COND_LO; in parseJccInstruction()
326 CondCode = MSP430CC::COND_HS; in parseJccInstruction()
328 CondCode = MSP430CC::COND_N; in parseJccInstruction()
330 CondCode = MSP430CC::COND_GE; in parseJccInstruction()
332 CondCode = MSP430CC::COND_L; in parseJccInstruction()
334 CondCode = MSP430CC::COND_NONE; in parseJccInstruction()
338 if (CondCode == (unsigned)MSP430CC::COND_NONE) in parseJccInstruction()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 33 enum CondCode { enum
64 unsigned GetCondBranchFromCond(CondCode CC);
68 unsigned getSETFromCond(CondCode CC, bool HasMemoryOperand = false);
72 unsigned getCMovFromCond(CondCode CC, unsigned RegBytes,
76 CondCode getCondFromCMovOpc(unsigned Opc);
80 CondCode GetOppositeBranchCondition(CondCode CC);
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| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_inlines.h | 26 static inline CondCode reverseCondCode(CondCode cc) in reverseCondCode()
30 return static_cast<CondCode>(ccRev[cc & 7] | (cc & ~7)); in reverseCondCode()
33 static inline CondCode inverseCondCode(CondCode cc) in inverseCondCode()
35 return static_cast<CondCode>(cc ^ 7); in inverseCondCode()
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