| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstX8664.cpp | 89 int32_t Disp = Var->getStackOffset(); in getRematerializableOffset() local
92 Disp += Target->getFrameFixedAllocaOffset(); in getRematerializableOffset()
96 return Disp; in getRematerializableOffset()
108 int32_t Disp = 0; in emit() local
110 Disp += getRematerializableOffset(getBase(), Target); in emit()
120 if (getOffset() == nullptr && Disp == 0) { in emit()
122 } else if (getOffset() == nullptr && Disp != 0) { in emit()
123 Str << Disp; in emit()
125 if (Base == nullptr || CI->getValue() || Disp != 0) in emit()
127 Str << CI->getValue() + Disp; in emit()
[all …]
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| D | IceInstX8632.cpp | 99 int32_t Disp = Var->getStackOffset(); in getRematerializableOffset() local
102 Disp += Target->getFrameFixedAllocaOffset(); in getRematerializableOffset()
106 return Disp; in getRematerializableOffset()
135 int32_t Disp = 0; in emit() local
137 Disp += getRematerializableOffset(getBase(), Target); in emit()
151 if (getOffset() == nullptr && Disp == 0) { in emit()
153 } else if (getOffset() == nullptr && Disp != 0) { in emit()
154 Str << Disp; in emit()
156 if (getBase() == nullptr || CI->getValue() || Disp != 0) in emit()
158 Str << CI->getValue() + Disp; in emit()
[all …]
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| /external/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| D | SystemZMCCodeEmitter.cpp | 187 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding() local
188 assert(isUInt<4>(Base) && isUInt<12>(Disp)); in getBDAddr12Encoding()
189 return (Base << 12) | Disp; in getBDAddr12Encoding()
197 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding() local
198 assert(isUInt<4>(Base) && isInt<20>(Disp)); in getBDAddr20Encoding()
199 return (Base << 20) | ((Disp & 0xfff) << 8) | ((Disp & 0xff000) >> 12); in getBDAddr20Encoding()
207 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding() local
209 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Index)); in getBDXAddr12Encoding()
210 return (Index << 16) | (Base << 12) | Disp; in getBDXAddr12Encoding()
218 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr20Encoding() local
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| D | SystemZMCCodeEmitter.cpp | 187 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding() local
188 assert(isUInt<4>(Base) && isUInt<12>(Disp)); in getBDAddr12Encoding()
189 return (Base << 12) | Disp; in getBDAddr12Encoding()
197 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding() local
198 assert(isUInt<4>(Base) && isInt<20>(Disp)); in getBDAddr20Encoding()
199 return (Base << 20) | ((Disp & 0xfff) << 8) | ((Disp & 0xff000) >> 12); in getBDAddr20Encoding()
207 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding() local
209 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Index)); in getBDXAddr12Encoding()
210 return (Index << 16) | (Base << 12) | Disp; in getBDXAddr12Encoding()
218 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr20Encoding() local
[all …]
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| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| D | SystemZMCCodeEmitter.cpp | 152 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding() local
153 assert(isUInt<4>(Base) && isUInt<12>(Disp)); in getBDAddr12Encoding()
154 return (Base << 12) | Disp; in getBDAddr12Encoding()
162 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding() local
163 assert(isUInt<4>(Base) && isInt<20>(Disp)); in getBDAddr20Encoding()
164 return (Base << 20) | ((Disp & 0xfff) << 8) | ((Disp & 0xff000) >> 12); in getBDAddr20Encoding()
172 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding() local
174 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Index)); in getBDXAddr12Encoding()
175 return (Index << 16) | (Base << 12) | Disp; in getBDXAddr12Encoding()
183 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr20Encoding() local
[all …]
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 59 int64_t Disp; member
64 : Form(form), DR(dr), Base(), Disp(0), Index(), in SystemZAddressingMode()
90 errs() << " Disp " << Disp; in dump()
158 SDValue &Base, SDValue &Disp) const;
160 SDValue &Base, SDValue &Disp, SDValue &Index) const;
166 SDValue &Base, SDValue &Disp) const;
172 SDValue &Base, SDValue &Disp) const;
179 SDValue &Base, SDValue &Disp, SDValue &Index) const;
191 bool selectBDAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp) const { in selectBDAddr12Only()
192 return selectBDAddr(SystemZAddressingMode::Disp12Only, Addr, Base, Disp); in selectBDAddr12Only()
[all …]
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| /external/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| D | GPRArith.cpp | 112 #define TestLeaBaseDisp(Base, BaseValue, Disp, Dst) \ in TEST_F() argument
121 Address(Encoded_GPR_##Base(), Disp, AssemblerFixup::NoFixup)); \ in TEST_F()
124 ASSERT_EQ(test.Base##d() + (Disp), test.Dst##d()) \ in TEST_F()
125 << TestString << " with Disp " << Disp; \ in TEST_F()
129 #define TestLeaIndex32bitDisp(Index, IndexValue, Disp, Dst0, Dst1, Dst2, Dst3) \ in TEST_F() argument
138 Address(Encoded_GPR_##Index(), Traits::TIMES_1, Disp, \ in TEST_F()
141 Address(Encoded_GPR_##Index(), Traits::TIMES_2, Disp, \ in TEST_F()
144 Address(Encoded_GPR_##Index(), Traits::TIMES_4, Disp, \ in TEST_F()
147 Address(Encoded_GPR_##Index(), Traits::TIMES_8, Disp, \ in TEST_F()
151 ASSERT_EQ((test.Index##d() << Traits::TIMES_1) + (Disp), test.Dst0##d()) \ in TEST_F()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 60 int64_t Disp; member
65 : Form(form), DR(dr), Base(), Disp(0), Index(), in SystemZAddressingMode()
91 errs() << " Disp " << Disp; in dump()
159 SDValue &Base, SDValue &Disp) const;
161 SDValue &Base, SDValue &Disp, SDValue &Index) const;
167 SDValue &Base, SDValue &Disp) const;
173 SDValue &Base, SDValue &Disp) const;
180 SDValue &Base, SDValue &Disp, SDValue &Index) const;
192 bool selectBDAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp) const { in selectBDAddr12Only()
193 return selectBDAddr(SystemZAddressingMode::Disp12Only, Addr, Base, Disp); in selectBDAddr12Only()
[all …]
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| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 60 int64_t Disp; member
65 : Form(form), DR(dr), Base(), Disp(0), Index(), in SystemZAddressingMode()
91 errs() << " Disp " << Disp; in dump()
159 SDValue &Base, SDValue &Disp) const;
161 SDValue &Base, SDValue &Disp, SDValue &Index) const;
167 SDValue &Base, SDValue &Disp) const;
173 SDValue &Base, SDValue &Disp) const;
180 SDValue &Base, SDValue &Disp, SDValue &Index) const;
192 bool selectBDAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp) const { in selectBDAddr12Only()
193 return selectBDAddr(SystemZAddressingMode::Disp12Only, Addr, Base, Disp); in selectBDAddr12Only()
[all …]
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelDAGToDAG.cpp | 47 int16_t Disp; member
56 : BaseType(RegBase), Disp(0), GV(nullptr), CP(nullptr), in MSP430ISelAddressMode()
72 errs() << " Disp " << Disp << '\n'; in dump()
118 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
144 AM.Disp += G->getOffset(); in MatchWrapper()
149 AM.Disp += CP->getOffset(); in MatchWrapper()
186 AM.Disp += Val; in MatchAddress()
229 AM.Disp += Offset; in MatchAddress()
244 SDValue &Base, SDValue &Disp) { in SelectAddr() argument
263 Disp = CurDAG->getTargetGlobalAddress(AM.GV, SDLoc(N), in SelectAddr()
[all …]
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| /external/llvm-project/llvm/lib/Target/MSP430/ |
| D | MSP430ISelDAGToDAG.cpp | 47 int16_t Disp = 0; member
70 errs() << " Disp " << Disp << '\n'; in dump()
119 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
145 AM.Disp += G->getOffset(); in MatchWrapper()
150 AM.Disp += CP->getOffset(); in MatchWrapper()
187 AM.Disp += Val; in MatchAddress()
230 AM.Disp += Offset; in MatchAddress()
245 SDValue &Base, SDValue &Disp) { in SelectAddr() argument
262 Disp = CurDAG->getTargetGlobalAddress(AM.GV, SDLoc(N), in SelectAddr()
263 MVT::i16, AM.Disp, in SelectAddr()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelDAGToDAG.cpp | 47 int16_t Disp = 0; member
70 errs() << " Disp " << Disp << '\n'; in dump()
119 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
145 AM.Disp += G->getOffset(); in MatchWrapper()
150 AM.Disp += CP->getOffset(); in MatchWrapper()
187 AM.Disp += Val; in MatchAddress()
230 AM.Disp += Offset; in MatchAddress()
245 SDValue &Base, SDValue &Disp) { in SelectAddr() argument
262 Disp = CurDAG->getTargetGlobalAddress(AM.GV, SDLoc(N), in SelectAddr()
263 MVT::i16, AM.Disp, in SelectAddr()
[all …]
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| /external/llvm/lib/Target/X86/ |
| D | X86OptimizeLEAs.cpp | 71 const MachineOperand *Disp) in MemOpKey() argument
72 : Disp(Disp) { in MemOpKey()
89 return isSimilarDispOp(*Disp, *Other.Disp); in operator ==()
96 const MachineOperand *Disp; member in MemOpKey
119 assert(Val.Disp != PtrInfo::getEmptyKey() && "Cannot hash the empty key"); in getHashValue()
120 assert(Val.Disp != PtrInfo::getTombstoneKey() && in getHashValue()
130 switch (Val.Disp->getType()) { in getHashValue()
135 Hash = hash_combine(Hash, Val.Disp->getIndex()); in getHashValue()
138 Hash = hash_combine(Hash, Val.Disp->getSymbolName()); in getHashValue()
141 Hash = hash_combine(Hash, Val.Disp->getGlobal()); in getHashValue()
[all …]
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| D | X86InstrBuilder.h | 50 int Disp; member
55 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr), in X86AddressMode()
77 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags)); in getFullAddress()
79 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
109 AM.Disp = Op.getImm(); in getAddressFromInstr()
164 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); in addFullAddress()
166 MIB.addImm(AM.Disp); in addFullAddress()
|
| /external/llvm-project/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 230 uint64_t Disp = Imm & 0xFFFF; in decodeMemRIOperands() local
254 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp))); in decodeMemRIOperands()
265 uint64_t Disp = Imm & 0x3FFF; in decodeMemRIXOperands() local
275 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 2))); in decodeMemRIXOperands()
286 uint64_t Disp = Imm & 0xFFF; in decodeMemRIX16Operands() local
290 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 4))); in decodeMemRIX16Operands()
301 uint64_t Disp = Imm & 0x3FFFFFFFFUL; in decodeMemRI34PCRelOperands() local
305 Inst.addOperand(MCOperand::createImm(SignExtend64<34>(Disp))); in decodeMemRI34PCRelOperands()
315 uint64_t Disp = Imm & 0x3FFFFFFFFUL; in decodeMemRI34Operands() local
319 Inst.addOperand(MCOperand::createImm(SignExtend64<34>(Disp))); in decodeMemRI34Operands()
[all …]
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86OptimizeLEAs.cpp | 85 const MachineOperand *Disp) in MemOpKey() argument
86 : Disp(Disp) { in MemOpKey()
103 return isSimilarDispOp(*Disp, *Other.Disp); in operator ==()
110 const MachineOperand *Disp; member in __anonf99cb9470111::MemOpKey
136 assert(Val.Disp != PtrInfo::getEmptyKey() && "Cannot hash the empty key"); in getHashValue()
137 assert(Val.Disp != PtrInfo::getTombstoneKey() && in getHashValue()
147 switch (Val.Disp->getType()) { in getHashValue()
152 Hash = hash_combine(Hash, Val.Disp->getIndex()); in getHashValue()
155 Hash = hash_combine(Hash, Val.Disp->getSymbolName()); in getHashValue()
158 Hash = hash_combine(Hash, Val.Disp->getGlobal()); in getHashValue()
[all …]
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| D | X86InstrBuilder.h | 55 int Disp; member
60 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr), in X86AddressMode()
81 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags)); in getFullAddress()
83 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
114 AM.Disp = Op3.getImm(); in getAddressFromInstr()
185 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); in addFullAddress()
187 MIB.addImm(AM.Disp); in addFullAddress()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86OptimizeLEAs.cpp | 85 const MachineOperand *Disp) in MemOpKey() argument
86 : Disp(Disp) { in MemOpKey()
103 return isSimilarDispOp(*Disp, *Other.Disp); in operator ==()
110 const MachineOperand *Disp; member in __anon2037c35b0111::MemOpKey
136 assert(Val.Disp != PtrInfo::getEmptyKey() && "Cannot hash the empty key"); in getHashValue()
137 assert(Val.Disp != PtrInfo::getTombstoneKey() && in getHashValue()
147 switch (Val.Disp->getType()) { in getHashValue()
152 Hash = hash_combine(Hash, Val.Disp->getIndex()); in getHashValue()
155 Hash = hash_combine(Hash, Val.Disp->getSymbolName()); in getHashValue()
158 Hash = hash_combine(Hash, Val.Disp->getGlobal()); in getHashValue()
[all …]
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| D | X86InstrBuilder.h | 55 int Disp; member
60 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr), in X86AddressMode()
81 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags)); in getFullAddress()
83 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
114 AM.Disp = Op3.getImm(); in getAddressFromInstr()
185 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); in addFullAddress()
187 MIB.addImm(AM.Disp); in addFullAddress()
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| /external/capstone/arch/SystemZ/ |
| D | SystemZDisassembler.c | 261 uint64_t Disp = Field & 0xfff; in decodeBDAddr12Operand() local
265 MCOperand_CreateImm0(Inst, Disp); in decodeBDAddr12Operand()
274 uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff); in decodeBDAddr20Operand() local
278 MCOperand_CreateImm0(Inst, SignExtend64(Disp, 20)); in decodeBDAddr20Operand()
287 uint64_t Disp = Field & 0xfff; in decodeBDXAddr12Operand() local
291 MCOperand_CreateImm0(Inst, Disp); in decodeBDXAddr12Operand()
302 uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12); in decodeBDXAddr20Operand() local
306 MCOperand_CreateImm0(Inst, SignExtend64(Disp, 20)); in decodeBDXAddr20Operand()
317 uint64_t Disp = Field & 0xfff; in decodeBDLAddr12Len8Operand() local
321 MCOperand_CreateImm0(Inst, Disp); in decodeBDLAddr12Len8Operand()
[all …]
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| /external/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| D | GPRArith.cpp | 124 #define TestLeaBaseDisp(Base, BaseValue, Disp, Dst) \ in TEST_F() argument
134 Address(GPRRegister::Encoded_Reg_##Base, Disp, \ in TEST_F()
138 ASSERT_EQ(test.Base() + (Disp), test.Dst()) \ in TEST_F()
139 << TestString << " with Disp " << Disp; \ in TEST_F()
143 #define TestLeaIndex32bitDisp(Index, IndexValue, Disp, Dst0, Dst1, Dst2, Dst3) \ in TEST_F() argument
151 Address(GPRRegister::Encoded_Reg_##Index, Traits::TIMES_1, Disp, \ in TEST_F()
154 Address(GPRRegister::Encoded_Reg_##Index, Traits::TIMES_2, Disp, \ in TEST_F()
157 Address(GPRRegister::Encoded_Reg_##Index, Traits::TIMES_4, Disp, \ in TEST_F()
160 Address(GPRRegister::Encoded_Reg_##Index, Traits::TIMES_8, Disp, \ in TEST_F()
164 ASSERT_EQ((test.Index() << Traits::TIMES_1) + (Disp), test.Dst0()) \ in TEST_F()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 200 uint64_t Disp = Imm & 0xFFFF; in decodeMemRIOperands() local
224 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp))); in decodeMemRIOperands()
235 uint64_t Disp = Imm & 0x3FFF; in decodeMemRIXOperands() local
245 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 2))); in decodeMemRIXOperands()
256 uint64_t Disp = Imm & 0xFFF; in decodeMemRIX16Operands() local
260 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Disp << 4))); in decodeMemRIX16Operands()
271 uint64_t Disp = Imm & 0x1F; in decodeSPE8Operands() local
275 Inst.addOperand(MCOperand::createImm(Disp << 3)); in decodeSPE8Operands()
286 uint64_t Disp = Imm & 0x1F; in decodeSPE4Operands() local
290 Inst.addOperand(MCOperand::createImm(Disp << 2)); in decodeSPE4Operands()
[all …]
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| /external/llvm-project/llvm/lib/Target/SystemZ/Disassembler/ |
| D | SystemZDisassembler.cpp | 294 uint64_t Disp = Field & 0xfff; in decodeBDAddr12Operand() local
297 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDAddr12Operand()
304 uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff); in decodeBDAddr20Operand() local
307 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand()
315 uint64_t Disp = Field & 0xfff; in decodeBDXAddr12Operand() local
318 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDXAddr12Operand()
327 uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12); in decodeBDXAddr20Operand() local
330 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDXAddr20Operand()
339 uint64_t Disp = Field & 0xfff; in decodeBDLAddr12Len4Operand() local
342 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDLAddr12Len4Operand()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/Disassembler/ |
| D | SystemZDisassembler.cpp | 294 uint64_t Disp = Field & 0xfff; in decodeBDAddr12Operand() local
297 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDAddr12Operand()
304 uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff); in decodeBDAddr20Operand() local
307 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand()
315 uint64_t Disp = Field & 0xfff; in decodeBDXAddr12Operand() local
318 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDXAddr12Operand()
327 uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12); in decodeBDXAddr20Operand() local
330 Inst.addOperand(MCOperand::createImm(SignExtend64<20>(Disp))); in decodeBDXAddr20Operand()
339 uint64_t Disp = Field & 0xfff; in decodeBDLAddr12Len4Operand() local
342 Inst.addOperand(MCOperand::createImm(Disp)); in decodeBDLAddr12Len4Operand()
[all …]
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| /external/llvm/lib/Target/MSP430/InstPrinter/ |
| D | MSP430InstPrinter.cpp | 65 const MCOperand &Disp = MI->getOperand(OpNo+1); in printSrcMemOperand() local
78 if (Disp.isExpr()) in printSrcMemOperand()
79 Disp.getExpr()->print(O, &MAI); in printSrcMemOperand()
81 assert(Disp.isImm() && "Expected immediate in displacement field"); in printSrcMemOperand()
82 O << Disp.getImm(); in printSrcMemOperand()
|